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eap.c revision 1.27.4.1
      1  1.27.4.1      fvdl /*	$NetBSD: eap.c,v 1.27.4.1 1999/11/15 00:40:58 fvdl Exp $	*/
      2  1.27.4.1      fvdl /*      $OpenBSD: eap.c,v 1.6 1999/10/05 19:24:42 csapuntz Exp $ */
      3       1.1  augustss 
      4       1.1  augustss /*
      5      1.22   mycroft  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
      6       1.1  augustss  * All rights reserved.
      7       1.1  augustss  *
      8      1.19  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9      1.22   mycroft  * by Lennart Augustsson <augustss (at) netbsd.org> and Charles M. Hannum.
     10       1.1  augustss  *
     11       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     12       1.1  augustss  * modification, are permitted provided that the following conditions
     13       1.1  augustss  * are met:
     14       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     15       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     16       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     17       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     18       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     19       1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     20       1.1  augustss  *    must display the following acknowledgement:
     21       1.1  augustss  *        This product includes software developed by the NetBSD
     22       1.1  augustss  *        Foundation, Inc. and its contributors.
     23       1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24       1.1  augustss  *    contributors may be used to endorse or promote products derived
     25       1.1  augustss  *    from this software without specific prior written permission.
     26       1.1  augustss  *
     27       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28       1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29       1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30       1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37       1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     38      1.19  augustss  */
     39      1.22   mycroft 
     40      1.19  augustss /*
     41      1.19  augustss  * Debugging:   Andreas Gustafsson <gson (at) araneus.fi>
     42      1.19  augustss  * Testing:     Chuck Cranor       <chuck (at) maria.wustl.edu>
     43      1.19  augustss  *              Phil Nelson        <phil (at) cs.wwu.edu>
     44  1.27.4.1      fvdl  *
     45  1.27.4.1      fvdl  * ES1371/AC97:	Ezra Story         <ezy (at) panix.com>
     46       1.1  augustss  */
     47       1.1  augustss 
     48       1.1  augustss /*
     49  1.27.4.1      fvdl  * Ensoniq ES1370 + AK4531 and ES1371/ES1373 + AC97
     50  1.27.4.1      fvdl  *
     51  1.27.4.1      fvdl  * Documentation links:
     52  1.27.4.1      fvdl  *
     53       1.1  augustss  * http://www.ensoniq.com/multimedia/semi_html/html/es1370.zip
     54  1.27.4.1      fvdl  * ftp://ftp.alsa-project.org/pub/manuals/asahi_kasei/4531.pdf
     55  1.27.4.1      fvdl  * http://www.ensoniq.com/multimedia/semi_html/html/es1371.zip
     56  1.27.4.1      fvdl  * ftp://download.intel.com/pc-supp/platform/ac97/ac97r21.pdf
     57       1.1  augustss  */
     58  1.27.4.1      fvdl 
     59  1.27.4.1      fvdl 
     60  1.27.4.1      fvdl #include "midi.h"
     61       1.1  augustss 
     62       1.1  augustss #include <sys/param.h>
     63       1.1  augustss #include <sys/systm.h>
     64       1.1  augustss #include <sys/kernel.h>
     65  1.27.4.1      fvdl #include <sys/fcntl.h>
     66       1.1  augustss #include <sys/malloc.h>
     67       1.1  augustss #include <sys/device.h>
     68       1.1  augustss 
     69       1.1  augustss #include <dev/pci/pcidevs.h>
     70       1.1  augustss #include <dev/pci/pcivar.h>
     71       1.1  augustss 
     72       1.1  augustss #include <sys/audioio.h>
     73       1.1  augustss #include <dev/audio_if.h>
     74  1.27.4.1      fvdl #include <dev/midi_if.h>
     75       1.1  augustss #include <dev/mulaw.h>
     76       1.1  augustss #include <dev/auconv.h>
     77  1.27.4.1      fvdl #include <dev/ic/ac97.h>
     78       1.1  augustss 
     79       1.1  augustss #include <machine/bus.h>
     80       1.1  augustss 
     81       1.1  augustss #define	PCI_CBIO		0x10
     82       1.1  augustss 
     83       1.1  augustss #define EAP_ICSC		0x00    /* interrupt / chip select control */
     84       1.1  augustss #define  EAP_SERR_DISABLE	0x00000001
     85       1.1  augustss #define  EAP_CDC_EN		0x00000002
     86       1.1  augustss #define  EAP_JYSTK_EN		0x00000004
     87       1.1  augustss #define  EAP_UART_EN		0x00000008
     88       1.1  augustss #define  EAP_ADC_EN		0x00000010
     89       1.1  augustss #define  EAP_DAC2_EN		0x00000020
     90       1.1  augustss #define  EAP_DAC1_EN		0x00000040
     91       1.1  augustss #define  EAP_BREQ		0x00000080
     92       1.1  augustss #define  EAP_XTCL0		0x00000100
     93       1.1  augustss #define  EAP_M_CB		0x00000200
     94       1.1  augustss #define  EAP_CCB_INTRM		0x00000400
     95       1.1  augustss #define  EAP_DAC_SYNC		0x00000800
     96       1.1  augustss #define  EAP_WTSRSEL		0x00003000
     97       1.1  augustss #define   EAP_WTSRSEL_5		0x00000000
     98       1.1  augustss #define   EAP_WTSRSEL_11	0x00001000
     99       1.1  augustss #define   EAP_WTSRSEL_22	0x00002000
    100       1.1  augustss #define   EAP_WTSRSEL_44	0x00003000
    101       1.1  augustss #define  EAP_M_SBB		0x00004000
    102       1.1  augustss #define  EAP_MSFMTSEL		0x00008000
    103       1.1  augustss #define  EAP_SET_PCLKDIV(n)	(((n)&0x1fff)<<16)
    104       1.1  augustss #define  EAP_GET_PCLKDIV(n)	(((n)>>16)&0x1fff)
    105       1.1  augustss #define  EAP_PCLKBITS		0x1fff0000
    106       1.1  augustss #define  EAP_XTCL1		0x40000000
    107       1.1  augustss #define  EAP_ADC_STOP		0x80000000
    108  1.27.4.1      fvdl #define  E1371_SYNC_RES		(1<<14)
    109       1.1  augustss 
    110       1.1  augustss #define EAP_ICSS		0x04	/* interrupt / chip select status */
    111       1.1  augustss #define  EAP_I_ADC		0x00000001
    112       1.1  augustss #define  EAP_I_DAC2		0x00000002
    113       1.1  augustss #define  EAP_I_DAC1		0x00000004
    114       1.1  augustss #define  EAP_I_UART		0x00000008
    115       1.1  augustss #define  EAP_I_MCCB		0x00000010
    116       1.1  augustss #define  EAP_VC			0x00000060
    117       1.1  augustss #define  EAP_CWRIP		0x00000100
    118       1.1  augustss #define  EAP_CBUSY		0x00000200
    119       1.1  augustss #define  EAP_CSTAT		0x00000400
    120       1.1  augustss #define  EAP_INTR		0x80000000
    121       1.1  augustss 
    122       1.1  augustss #define EAP_UART_DATA		0x08
    123       1.1  augustss #define EAP_UART_STATUS		0x09
    124  1.27.4.1      fvdl #define  EAP_US_RXRDY		0x01
    125  1.27.4.1      fvdl #define  EAP_US_TXRDY		0x02
    126  1.27.4.1      fvdl #define  EAP_US_TXINT		0x04
    127  1.27.4.1      fvdl #define  EAP_US_RXINT		0x80
    128       1.1  augustss #define EAP_UART_CONTROL	0x09
    129  1.27.4.1      fvdl #define  EAP_UC_CNTRL		0x03
    130  1.27.4.1      fvdl #define  EAP_UC_TXINTEN		0x20
    131  1.27.4.1      fvdl #define  EAP_UC_RXINTEN		0x80
    132       1.1  augustss #define EAP_MEMPAGE		0x0c
    133       1.1  augustss #define EAP_CODEC		0x10
    134       1.1  augustss #define  EAP_SET_CODEC(a,d)	(((a)<<8) | (d))
    135       1.1  augustss 
    136  1.27.4.1      fvdl /* ES1371 Registers */
    137  1.27.4.1      fvdl #define E1371_CODEC		0x14
    138  1.27.4.1      fvdl #define  E1371_CODEC_WIP	(1<<30)
    139  1.27.4.1      fvdl #define  E1371_CODEC_VALID      (1<<31)
    140  1.27.4.1      fvdl #define  E1371_CODEC_READ       (1<<23)
    141  1.27.4.1      fvdl #define  E1371_SET_CODEC(a,d)	(((a)<<16) | (d))
    142  1.27.4.1      fvdl #define E1371_SRC		0x10
    143  1.27.4.1      fvdl #define  E1371_SRC_RAMWE	(1<<24)
    144  1.27.4.1      fvdl #define  E1371_SRC_RBUSY	(1<<23)
    145  1.27.4.1      fvdl #define  E1371_SRC_DISABLE	(1<<22)
    146  1.27.4.1      fvdl #define  E1371_SRC_DISP1	(1<<21)
    147  1.27.4.1      fvdl #define  E1371_SRC_DISP2        (1<<20)
    148  1.27.4.1      fvdl #define  E1371_SRC_DISREC       (1<<19)
    149  1.27.4.1      fvdl #define  E1371_SRC_ADDR(a)	((a)<<25)
    150  1.27.4.1      fvdl #define  E1371_SRC_DATA(d)	(d)
    151  1.27.4.1      fvdl #define  E1371_SRC_DATAMASK	0xffff
    152  1.27.4.1      fvdl #define E1371_LEGACY		0x18
    153  1.27.4.1      fvdl 
    154  1.27.4.1      fvdl /* ES1371 Sample rate converter registers */
    155  1.27.4.1      fvdl #define ESRC_ADC		0x78
    156  1.27.4.1      fvdl #define ESRC_DAC1		0x74
    157  1.27.4.1      fvdl #define ESRC_DAC2		0x70
    158  1.27.4.1      fvdl #define ESRC_ADC_VOLL		0x6c
    159  1.27.4.1      fvdl #define ESRC_ADC_VOLR		0x6d
    160  1.27.4.1      fvdl #define ESRC_DAC1_VOLL		0x7c
    161  1.27.4.1      fvdl #define ESRC_DAC1_VOLR		0x7d
    162  1.27.4.1      fvdl #define ESRC_DAC2_VOLL		0x7e
    163  1.27.4.1      fvdl #define ESRC_DAC2_VOLR		0x7f
    164  1.27.4.1      fvdl #define  ESRC_TRUNC_N		0x00
    165  1.27.4.1      fvdl #define  ESRC_IREGS		0x01
    166  1.27.4.1      fvdl #define  ESRC_ACF		0x02
    167  1.27.4.1      fvdl #define  ESRC_VFF		0x03
    168  1.27.4.1      fvdl #define ESRC_SET_TRUNC(n)	((n)<<9)
    169  1.27.4.1      fvdl #define ESRC_SET_N(n)		((n)<<4)
    170  1.27.4.1      fvdl #define ESRC_SMF		0x8000
    171  1.27.4.1      fvdl #define ESRC_SET_VFI(n)		((n)<<10)
    172  1.27.4.1      fvdl #define ESRC_SET_ACI(n)		(n)
    173  1.27.4.1      fvdl #define ESRC_SET_ADC_VOL(n)	((n)<<8)
    174  1.27.4.1      fvdl #define ESRC_SET_DAC_VOLI(n)	((n)<<12)
    175  1.27.4.1      fvdl #define ESRC_SET_DAC_VOLF(n)	(n)
    176  1.27.4.1      fvdl #define  SRC_MAGIC ((1<15)|(1<<13)|(1<<11)|(1<<9))
    177  1.27.4.1      fvdl 
    178  1.27.4.1      fvdl 
    179       1.1  augustss #define EAP_SIC			0x20
    180       1.1  augustss #define  EAP_P1_S_MB		0x00000001
    181       1.1  augustss #define  EAP_P1_S_EB		0x00000002
    182       1.1  augustss #define  EAP_P2_S_MB		0x00000004
    183       1.1  augustss #define  EAP_P2_S_EB		0x00000008
    184       1.1  augustss #define  EAP_R1_S_MB		0x00000010
    185       1.1  augustss #define  EAP_R1_S_EB		0x00000020
    186       1.1  augustss #define  EAP_P2_DAC_SEN		0x00000040
    187       1.1  augustss #define  EAP_P1_SCT_RLD		0x00000080
    188       1.1  augustss #define  EAP_P1_INTR_EN		0x00000100
    189       1.1  augustss #define  EAP_P2_INTR_EN		0x00000200
    190       1.1  augustss #define  EAP_R1_INTR_EN		0x00000400
    191       1.1  augustss #define  EAP_P1_PAUSE		0x00000800
    192       1.1  augustss #define  EAP_P2_PAUSE		0x00001000
    193       1.1  augustss #define  EAP_P1_LOOP_SEL	0x00002000
    194       1.1  augustss #define  EAP_P2_LOOP_SEL	0x00004000
    195       1.1  augustss #define  EAP_R1_LOOP_SEL	0x00008000
    196       1.1  augustss #define  EAP_SET_P2_ST_INC(i)	((i) << 16)
    197       1.1  augustss #define  EAP_SET_P2_END_INC(i)	((i) << 19)
    198       1.1  augustss #define  EAP_INC_BITS		0x003f0000
    199       1.1  augustss 
    200       1.1  augustss #define EAP_DAC1_CSR		0x24
    201       1.1  augustss #define EAP_DAC2_CSR		0x28
    202       1.1  augustss #define EAP_ADC_CSR		0x2c
    203       1.1  augustss #define  EAP_GET_CURRSAMP(r)	((r) >> 16)
    204       1.1  augustss 
    205       1.1  augustss #define EAP_DAC_PAGE		0xc
    206       1.1  augustss #define EAP_ADC_PAGE		0xd
    207       1.1  augustss #define EAP_UART_PAGE1		0xe
    208       1.1  augustss #define EAP_UART_PAGE2		0xf
    209       1.1  augustss 
    210       1.1  augustss #define EAP_DAC1_ADDR		0x30
    211       1.1  augustss #define EAP_DAC1_SIZE		0x34
    212       1.1  augustss #define EAP_DAC2_ADDR		0x38
    213       1.1  augustss #define EAP_DAC2_SIZE		0x3c
    214       1.1  augustss #define EAP_ADC_ADDR		0x30
    215       1.1  augustss #define EAP_ADC_SIZE		0x34
    216       1.1  augustss #define  EAP_SET_SIZE(c,s)	(((c)<<16) | (s))
    217       1.1  augustss 
    218  1.27.4.1      fvdl #define EAP_READ_TIMEOUT	5000000
    219  1.27.4.1      fvdl #define EAP_WRITE_TIMEOUT	5000000
    220  1.27.4.1      fvdl 
    221  1.27.4.1      fvdl 
    222       1.1  augustss #define EAP_XTAL_FREQ 1411200 /* 22.5792 / 16 MHz */
    223       1.1  augustss 
    224       1.1  augustss /* AK4531 registers */
    225       1.1  augustss #define AK_MASTER_L		0x00
    226       1.1  augustss #define AK_MASTER_R		0x01
    227       1.1  augustss #define AK_VOICE_L		0x02
    228       1.1  augustss #define AK_VOICE_R		0x03
    229       1.1  augustss #define AK_FM_L			0x04
    230       1.1  augustss #define AK_FM_R			0x05
    231       1.1  augustss #define AK_CD_L			0x06
    232       1.1  augustss #define AK_CD_R			0x07
    233       1.1  augustss #define AK_LINE_L		0x08
    234       1.1  augustss #define AK_LINE_R		0x09
    235       1.1  augustss #define AK_AUX_L		0x0a
    236       1.1  augustss #define AK_AUX_R		0x0b
    237       1.1  augustss #define AK_MONO1		0x0c
    238       1.1  augustss #define AK_MONO2		0x0d
    239       1.1  augustss #define AK_MIC			0x0e
    240       1.1  augustss #define AK_MONO			0x0f
    241       1.1  augustss #define AK_OUT_MIXER1		0x10
    242       1.1  augustss #define  AK_M_FM_L		0x40
    243       1.1  augustss #define  AK_M_FM_R		0x20
    244       1.1  augustss #define  AK_M_LINE_L		0x10
    245       1.1  augustss #define  AK_M_LINE_R		0x08
    246       1.1  augustss #define  AK_M_CD_L		0x04
    247       1.1  augustss #define  AK_M_CD_R		0x02
    248       1.1  augustss #define  AK_M_MIC		0x01
    249       1.1  augustss #define AK_OUT_MIXER2		0x11
    250       1.1  augustss #define  AK_M_AUX_L		0x20
    251       1.1  augustss #define  AK_M_AUX_R		0x10
    252       1.1  augustss #define  AK_M_VOICE_L		0x08
    253       1.1  augustss #define  AK_M_VOICE_R		0x04
    254       1.1  augustss #define  AK_M_MONO2		0x02
    255       1.1  augustss #define  AK_M_MONO1		0x01
    256       1.1  augustss #define AK_IN_MIXER1_L		0x12
    257       1.1  augustss #define AK_IN_MIXER1_R		0x13
    258       1.1  augustss #define AK_IN_MIXER2_L		0x14
    259       1.1  augustss #define AK_IN_MIXER2_R		0x15
    260       1.1  augustss #define  AK_M_TMIC		0x80
    261       1.1  augustss #define  AK_M_TMONO1		0x40
    262       1.1  augustss #define  AK_M_TMONO2		0x20
    263       1.1  augustss #define  AK_M2_AUX_L		0x10
    264       1.1  augustss #define  AK_M2_AUX_R		0x08
    265       1.1  augustss #define  AK_M_VOICE		0x04
    266       1.1  augustss #define  AK_M2_MONO2		0x02
    267       1.1  augustss #define  AK_M2_MONO1		0x01
    268       1.1  augustss #define AK_RESET		0x16
    269       1.1  augustss #define  AK_PD			0x02
    270       1.1  augustss #define  AK_NRST		0x01
    271       1.1  augustss #define AK_CS			0x17
    272       1.1  augustss #define AK_ADSEL		0x18
    273       1.1  augustss #define AK_MGAIN		0x19
    274  1.27.4.1      fvdl #define AK_NPORTS               0x20
    275       1.1  augustss 
    276  1.27.4.1      fvdl #define MAX_NPORTS              AK_NPORTS
    277       1.1  augustss 
    278  1.27.4.1      fvdl /* Not sensical for AC97? */
    279       1.1  augustss #define VOL_TO_ATT5(v) (0x1f - ((v) >> 3))
    280       1.5  augustss #define VOL_TO_GAIN5(v) VOL_TO_ATT5(v)
    281       1.1  augustss #define ATT5_TO_VOL(v) ((0x1f - (v)) << 3)
    282       1.1  augustss #define GAIN5_TO_VOL(v) ATT5_TO_VOL(v)
    283       1.1  augustss #define VOL_0DB 200
    284       1.1  augustss 
    285  1.27.4.1      fvdl /* Futzable parms */
    286       1.1  augustss #define EAP_MASTER_VOL		0
    287       1.1  augustss #define EAP_VOICE_VOL		1
    288  1.27.4.1      fvdl #define EAP_FM_VOL		2
    289  1.27.4.1      fvdl #define EAP_VIDEO_VOL		2 /* ES1371 */
    290       1.1  augustss #define EAP_CD_VOL		3
    291       1.1  augustss #define EAP_LINE_VOL		4
    292       1.1  augustss #define EAP_AUX_VOL		5
    293       1.1  augustss #define EAP_MIC_VOL		6
    294       1.1  augustss #define	EAP_RECORD_SOURCE 	7
    295       1.8  augustss #define EAP_OUTPUT_SELECT	8
    296  1.27.4.1      fvdl #define	EAP_MIC_PREAMP		9
    297      1.12   mycroft #define EAP_OUTPUT_CLASS	10
    298      1.12   mycroft #define EAP_RECORD_CLASS	11
    299      1.12   mycroft #define EAP_INPUT_CLASS		12
    300       1.1  augustss 
    301  1.27.4.1      fvdl #define MIDI_BUSY_WAIT		100
    302  1.27.4.1      fvdl #define MIDI_BUSY_DELAY		100	/* Delay when UART is busy */
    303  1.27.4.1      fvdl 
    304  1.27.4.1      fvdl /* Debug */
    305       1.1  augustss #ifdef AUDIO_DEBUG
    306       1.1  augustss #define DPRINTF(x)	if (eapdebug) printf x
    307       1.1  augustss #define DPRINTFN(n,x)	if (eapdebug>(n)) printf x
    308       1.1  augustss int	eapdebug = 0;
    309       1.1  augustss #else
    310       1.1  augustss #define DPRINTF(x)
    311       1.1  augustss #define DPRINTFN(n,x)
    312       1.1  augustss #endif
    313       1.1  augustss 
    314       1.1  augustss int	eap_match __P((struct device *, struct cfdata *, void *));
    315       1.1  augustss void	eap_attach __P((struct device *, struct device *, void *));
    316       1.1  augustss int	eap_intr __P((void *));
    317       1.1  augustss 
    318       1.1  augustss struct eap_dma {
    319       1.1  augustss 	bus_dmamap_t map;
    320       1.9   mycroft 	caddr_t addr;
    321       1.9   mycroft 	bus_dma_segment_t segs[1];
    322       1.9   mycroft 	int nsegs;
    323       1.9   mycroft 	size_t size;
    324       1.9   mycroft 	struct eap_dma *next;
    325       1.1  augustss };
    326      1.25   mycroft #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
    327      1.25   mycroft #define KERNADDR(p) ((void *)((p)->addr))
    328       1.1  augustss 
    329       1.1  augustss struct eap_softc {
    330       1.1  augustss 	struct device sc_dev;		/* base device */
    331       1.1  augustss 	void *sc_ih;			/* interrupt vectoring */
    332       1.1  augustss 	bus_space_tag_t iot;
    333       1.1  augustss 	bus_space_handle_t ioh;
    334       1.1  augustss 	bus_dma_tag_t sc_dmatag;	/* DMA tag */
    335       1.1  augustss 
    336       1.9   mycroft 	struct eap_dma *sc_dmas;
    337       1.1  augustss 
    338       1.1  augustss 	void	(*sc_pintr)(void *);	/* dma completion intr handler */
    339       1.1  augustss 	void	*sc_parg;		/* arg for sc_intr() */
    340       1.9   mycroft #ifdef DIAGNOSTIC
    341       1.1  augustss 	char	sc_prun;
    342       1.9   mycroft #endif
    343       1.1  augustss 
    344       1.1  augustss 	void	(*sc_rintr)(void *);	/* dma completion intr handler */
    345       1.1  augustss 	void	*sc_rarg;		/* arg for sc_intr() */
    346       1.9   mycroft #ifdef DIAGNOSTIC
    347       1.1  augustss 	char	sc_rrun;
    348       1.9   mycroft #endif
    349       1.1  augustss 
    350  1.27.4.1      fvdl #if NMIDI > 0
    351  1.27.4.1      fvdl 	void	(*sc_iintr)(void *, int); /* midi input ready handler */
    352  1.27.4.1      fvdl 	void	(*sc_ointr)(void *);	/* midi output ready handler */
    353  1.27.4.1      fvdl 	void	*sc_arg;
    354  1.27.4.1      fvdl #endif
    355  1.27.4.1      fvdl 
    356  1.27.4.1      fvdl 	u_short	sc_port[MAX_NPORTS];	/* mirror of the hardware setting */
    357       1.1  augustss 	u_int	sc_record_source;	/* recording source mask */
    358       1.8  augustss 	u_int	sc_output_source;	/* output source mask */
    359      1.12   mycroft 	u_int	sc_mic_preamp;
    360  1.27.4.1      fvdl         char    sc_1371;                /* Using ES1371/AC97 codec */
    361  1.27.4.1      fvdl 
    362  1.27.4.1      fvdl 	struct ac97_codec_if *codec_if;
    363  1.27.4.1      fvdl 	struct ac97_host_if host_if;
    364       1.1  augustss };
    365       1.1  augustss 
    366       1.1  augustss int	eap_allocmem __P((struct eap_softc *, size_t, size_t, struct eap_dma *));
    367       1.1  augustss int	eap_freemem __P((struct eap_softc *, struct eap_dma *));
    368       1.1  augustss 
    369  1.27.4.1      fvdl #define EWRITE1(sc, r, x) bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x))
    370       1.1  augustss #define EWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
    371       1.1  augustss #define EWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
    372  1.27.4.1      fvdl #define EREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r))
    373       1.1  augustss #define EREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
    374       1.1  augustss #define EREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
    375       1.1  augustss 
    376       1.1  augustss struct cfattach eap_ca = {
    377       1.1  augustss 	sizeof(struct eap_softc), eap_match, eap_attach
    378       1.1  augustss };
    379       1.1  augustss 
    380       1.1  augustss int	eap_open __P((void *, int));
    381       1.1  augustss void	eap_close __P((void *));
    382       1.1  augustss int	eap_query_encoding __P((void *, struct audio_encoding *));
    383       1.1  augustss int	eap_set_params __P((void *, int, int, struct audio_params *, struct audio_params *));
    384       1.1  augustss int	eap_round_blocksize __P((void *, int));
    385       1.9   mycroft int	eap_trigger_output __P((void *, void *, void *, int, void (*)(void *),
    386       1.9   mycroft 	    void *, struct audio_params *));
    387       1.9   mycroft int	eap_trigger_input __P((void *, void *, void *, int, void (*)(void *),
    388       1.9   mycroft 	    void *, struct audio_params *));
    389       1.9   mycroft int	eap_halt_output __P((void *));
    390       1.9   mycroft int	eap_halt_input __P((void *));
    391  1.27.4.1      fvdl void    eap_write_codec __P((struct eap_softc *, int, int));
    392       1.1  augustss int	eap_getdev __P((void *, struct audio_device *));
    393       1.1  augustss int	eap_mixer_set_port __P((void *, mixer_ctrl_t *));
    394       1.1  augustss int	eap_mixer_get_port __P((void *, mixer_ctrl_t *));
    395  1.27.4.1      fvdl int	eap1371_mixer_set_port __P((void *, mixer_ctrl_t *));
    396  1.27.4.1      fvdl int	eap1371_mixer_get_port __P((void *, mixer_ctrl_t *));
    397       1.1  augustss int	eap_query_devinfo __P((void *, mixer_devinfo_t *));
    398      1.21   mycroft void   *eap_malloc __P((void *, int, size_t, int, int));
    399       1.1  augustss void	eap_free __P((void *, void *, int));
    400      1.21   mycroft size_t	eap_round_buffersize __P((void *, int, size_t));
    401       1.1  augustss int	eap_mappage __P((void *, void *, int, int));
    402       1.1  augustss int	eap_get_props __P((void *));
    403       1.1  augustss void	eap_set_mixer __P((struct eap_softc *sc, int a, int d));
    404  1.27.4.1      fvdl void	eap1371_src_wait __P((struct eap_softc *sc));
    405  1.27.4.1      fvdl void 	eap1371_set_adc_rate __P((struct eap_softc *sc, int rate));
    406  1.27.4.1      fvdl void 	eap1371_set_dac_rate __P((struct eap_softc *sc, int rate, int which));
    407  1.27.4.1      fvdl int	eap1371_src_read __P((struct eap_softc *sc, int a));
    408  1.27.4.1      fvdl void	eap1371_src_write __P((struct eap_softc *sc, int a, int d));
    409  1.27.4.1      fvdl int	eap1371_query_devinfo __P((void *addr, mixer_devinfo_t *dip));
    410  1.27.4.1      fvdl 
    411  1.27.4.1      fvdl int     eap1371_attach_codec __P((void *sc, struct ac97_codec_if *));
    412  1.27.4.1      fvdl int	eap1371_read_codec __P((void *sc, u_int8_t a, u_int16_t *d));
    413  1.27.4.1      fvdl int	eap1371_write_codec __P((void *sc, u_int8_t a, u_int16_t d));
    414  1.27.4.1      fvdl void    eap1371_reset_codec __P((void *sc));
    415  1.27.4.1      fvdl int     eap1371_get_portnum_by_name __P((struct eap_softc *, char *, char *,
    416  1.27.4.1      fvdl 					 char *));
    417  1.27.4.1      fvdl #if NMIDI > 0
    418  1.27.4.1      fvdl void	eap_midi_close __P((void *));
    419  1.27.4.1      fvdl void	eap_midi_getinfo __P((void *, struct midi_info *));
    420  1.27.4.1      fvdl int	eap_midi_open __P((void *, int, void (*)(void *, int),
    421  1.27.4.1      fvdl 			   void (*)(void *), void *));
    422  1.27.4.1      fvdl int	eap_midi_output __P((void *, int));
    423  1.27.4.1      fvdl #endif
    424       1.1  augustss 
    425  1.27.4.1      fvdl struct audio_hw_if eap1370_hw_if = {
    426       1.1  augustss 	eap_open,
    427       1.1  augustss 	eap_close,
    428       1.1  augustss 	NULL,
    429       1.1  augustss 	eap_query_encoding,
    430       1.1  augustss 	eap_set_params,
    431       1.1  augustss 	eap_round_blocksize,
    432       1.1  augustss 	NULL,
    433       1.9   mycroft 	NULL,
    434       1.9   mycroft 	NULL,
    435       1.9   mycroft 	NULL,
    436       1.9   mycroft 	NULL,
    437       1.9   mycroft 	eap_halt_output,
    438       1.9   mycroft 	eap_halt_input,
    439       1.1  augustss 	NULL,
    440       1.1  augustss 	eap_getdev,
    441       1.1  augustss 	NULL,
    442       1.1  augustss 	eap_mixer_set_port,
    443       1.1  augustss 	eap_mixer_get_port,
    444       1.1  augustss 	eap_query_devinfo,
    445       1.1  augustss 	eap_malloc,
    446       1.1  augustss 	eap_free,
    447      1.21   mycroft 	eap_round_buffersize,
    448       1.1  augustss 	eap_mappage,
    449       1.1  augustss 	eap_get_props,
    450       1.9   mycroft 	eap_trigger_output,
    451       1.9   mycroft 	eap_trigger_input,
    452       1.1  augustss };
    453       1.1  augustss 
    454  1.27.4.1      fvdl struct audio_hw_if eap1371_hw_if = {
    455  1.27.4.1      fvdl 	eap_open,
    456  1.27.4.1      fvdl 	eap_close,
    457  1.27.4.1      fvdl 	NULL,
    458  1.27.4.1      fvdl 	eap_query_encoding,
    459  1.27.4.1      fvdl 	eap_set_params,
    460  1.27.4.1      fvdl 	eap_round_blocksize,
    461  1.27.4.1      fvdl 	NULL,
    462  1.27.4.1      fvdl 	NULL,
    463  1.27.4.1      fvdl 	NULL,
    464  1.27.4.1      fvdl 	NULL,
    465  1.27.4.1      fvdl 	NULL,
    466  1.27.4.1      fvdl 	eap_halt_output,
    467  1.27.4.1      fvdl 	eap_halt_input,
    468  1.27.4.1      fvdl 	NULL,
    469  1.27.4.1      fvdl 	eap_getdev,
    470  1.27.4.1      fvdl 	NULL,
    471  1.27.4.1      fvdl 	eap1371_mixer_set_port,
    472  1.27.4.1      fvdl 	eap1371_mixer_get_port,
    473  1.27.4.1      fvdl 	eap1371_query_devinfo,
    474  1.27.4.1      fvdl 	eap_malloc,
    475  1.27.4.1      fvdl 	eap_free,
    476  1.27.4.1      fvdl 	eap_round_buffersize,
    477  1.27.4.1      fvdl 	eap_mappage,
    478  1.27.4.1      fvdl 	eap_get_props,
    479  1.27.4.1      fvdl 	eap_trigger_output,
    480  1.27.4.1      fvdl 	eap_trigger_input,
    481  1.27.4.1      fvdl };
    482  1.27.4.1      fvdl 
    483  1.27.4.1      fvdl #if NMIDI > 0
    484  1.27.4.1      fvdl struct midi_hw_if eap_midi_hw_if = {
    485  1.27.4.1      fvdl 	eap_midi_open,
    486  1.27.4.1      fvdl 	eap_midi_close,
    487  1.27.4.1      fvdl 	eap_midi_output,
    488  1.27.4.1      fvdl 	eap_midi_getinfo,
    489  1.27.4.1      fvdl 	0,				/* ioctl */
    490  1.27.4.1      fvdl };
    491  1.27.4.1      fvdl #endif
    492  1.27.4.1      fvdl 
    493       1.1  augustss struct audio_device eap_device = {
    494       1.1  augustss 	"Ensoniq AudioPCI",
    495       1.1  augustss 	"",
    496       1.1  augustss 	"eap"
    497       1.1  augustss };
    498       1.1  augustss 
    499       1.1  augustss int
    500       1.1  augustss eap_match(parent, match, aux)
    501       1.1  augustss 	struct device *parent;
    502       1.1  augustss 	struct cfdata *match;
    503       1.1  augustss 	void *aux;
    504       1.1  augustss {
    505       1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
    506       1.1  augustss 
    507       1.1  augustss 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_ENSONIQ)
    508       1.1  augustss 		return (0);
    509  1.27.4.1      fvdl 	if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI ||
    510  1.27.4.1      fvdl 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97) {
    511  1.27.4.1      fvdl 		return (1);
    512  1.27.4.1      fvdl         }
    513       1.1  augustss 
    514  1.27.4.1      fvdl 	return (0);
    515       1.1  augustss }
    516       1.1  augustss 
    517       1.1  augustss void
    518       1.1  augustss eap_write_codec(sc, a, d)
    519       1.1  augustss 	struct eap_softc *sc;
    520       1.1  augustss 	int a, d;
    521       1.1  augustss {
    522  1.27.4.1      fvdl 	int icss, to;
    523       1.1  augustss 
    524  1.27.4.1      fvdl 	to = EAP_WRITE_TIMEOUT;
    525       1.1  augustss 	do {
    526       1.9   mycroft 		icss = EREAD4(sc, EAP_ICSS);
    527       1.1  augustss 		DPRINTFN(5,("eap: codec %d prog: icss=0x%08x\n", a, icss));
    528  1.27.4.1      fvdl                 if (!to--) {
    529  1.27.4.1      fvdl                         printf("eap: timeout writing to codec\n");
    530  1.27.4.1      fvdl                         return;
    531  1.27.4.1      fvdl                 }
    532  1.27.4.1      fvdl 	} while(icss & EAP_CWRIP);  /* XXX could use CSTAT here */
    533  1.27.4.1      fvdl         EWRITE4(sc, EAP_CODEC, EAP_SET_CODEC(a, d));
    534  1.27.4.1      fvdl }
    535  1.27.4.1      fvdl 
    536  1.27.4.1      fvdl int
    537  1.27.4.1      fvdl eap1371_read_codec(sc_, a, d)
    538  1.27.4.1      fvdl         void *sc_;
    539  1.27.4.1      fvdl 	u_int8_t a;
    540  1.27.4.1      fvdl 	u_int16_t *d;
    541  1.27.4.1      fvdl {
    542  1.27.4.1      fvdl 	struct eap_softc *sc = sc_;
    543  1.27.4.1      fvdl         int to;
    544  1.27.4.1      fvdl         int cdc;
    545  1.27.4.1      fvdl 
    546  1.27.4.1      fvdl         to = EAP_WRITE_TIMEOUT;
    547  1.27.4.1      fvdl         do {
    548  1.27.4.1      fvdl                 cdc = EREAD4(sc, E1371_CODEC);
    549  1.27.4.1      fvdl                 if (!to--) {
    550  1.27.4.1      fvdl                         printf("eap: timeout writing to codec\n");
    551  1.27.4.1      fvdl                         return 1;
    552  1.27.4.1      fvdl                 }
    553  1.27.4.1      fvdl         } while (cdc & E1371_CODEC_WIP);
    554  1.27.4.1      fvdl 
    555  1.27.4.1      fvdl         /* just do it */
    556  1.27.4.1      fvdl 	eap1371_src_wait(sc);
    557  1.27.4.1      fvdl         EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, 0) | E1371_CODEC_READ);
    558  1.27.4.1      fvdl 
    559  1.27.4.1      fvdl 	for (to = 0; to < EAP_WRITE_TIMEOUT; to++) {
    560  1.27.4.1      fvdl 		if ((cdc = EREAD4(sc, E1371_CODEC)) & E1371_CODEC_VALID)
    561  1.27.4.1      fvdl 			break;
    562  1.27.4.1      fvdl 	}
    563  1.27.4.1      fvdl 
    564  1.27.4.1      fvdl 	if (to == EAP_WRITE_TIMEOUT) {
    565  1.27.4.1      fvdl 		DPRINTF(("eap1371: read codec timeout\n"));
    566  1.27.4.1      fvdl 	}
    567  1.27.4.1      fvdl 
    568  1.27.4.1      fvdl 	*d = cdc & 0xffff;
    569  1.27.4.1      fvdl 
    570  1.27.4.1      fvdl         DPRINTFN(10, ("eap1371: reading codec (%x) = %x\n", a, *d));
    571  1.27.4.1      fvdl 
    572  1.27.4.1      fvdl 	return (0);
    573  1.27.4.1      fvdl }
    574  1.27.4.1      fvdl 
    575  1.27.4.1      fvdl int
    576  1.27.4.1      fvdl eap1371_write_codec(sc_, a, d)
    577  1.27.4.1      fvdl         void *sc_;
    578  1.27.4.1      fvdl 	u_int8_t a;
    579  1.27.4.1      fvdl 	u_int16_t d;
    580  1.27.4.1      fvdl {
    581  1.27.4.1      fvdl 	struct eap_softc *sc = sc_;
    582  1.27.4.1      fvdl         int to;
    583  1.27.4.1      fvdl         int cdc;
    584  1.27.4.1      fvdl 
    585  1.27.4.1      fvdl         to = EAP_WRITE_TIMEOUT;
    586  1.27.4.1      fvdl         do {
    587  1.27.4.1      fvdl                 cdc = EREAD4(sc, E1371_CODEC);
    588  1.27.4.1      fvdl                 if (!to--) {
    589  1.27.4.1      fvdl                         printf("eap: timeout writing to codec\n");
    590  1.27.4.1      fvdl                         return (1);
    591  1.27.4.1      fvdl                 }
    592  1.27.4.1      fvdl         } while (cdc & E1371_CODEC_WIP);
    593  1.27.4.1      fvdl 
    594  1.27.4.1      fvdl         /* just do it */
    595  1.27.4.1      fvdl 	eap1371_src_wait(sc);
    596  1.27.4.1      fvdl         EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, d));
    597  1.27.4.1      fvdl         DPRINTFN(10, ("eap1371: writing codec %x --> %x\n", d, a));
    598  1.27.4.1      fvdl 
    599  1.27.4.1      fvdl         return (0);
    600  1.27.4.1      fvdl }
    601  1.27.4.1      fvdl 
    602  1.27.4.1      fvdl void
    603  1.27.4.1      fvdl eap1371_src_wait(sc)
    604  1.27.4.1      fvdl 	struct eap_softc *sc;
    605  1.27.4.1      fvdl {
    606  1.27.4.1      fvdl         int to;
    607  1.27.4.1      fvdl         int src;
    608  1.27.4.1      fvdl 
    609  1.27.4.1      fvdl         to = EAP_READ_TIMEOUT;
    610  1.27.4.1      fvdl         do {
    611  1.27.4.1      fvdl                 src = EREAD4(sc, E1371_SRC);
    612  1.27.4.1      fvdl                 if (!to--) {
    613  1.27.4.1      fvdl                         printf("eap: timeout waiting for sample rate"
    614  1.27.4.1      fvdl                                 "converter\n");
    615  1.27.4.1      fvdl                         return;
    616  1.27.4.1      fvdl                 }
    617  1.27.4.1      fvdl         } while (src & E1371_SRC_RBUSY);
    618  1.27.4.1      fvdl }
    619  1.27.4.1      fvdl 
    620  1.27.4.1      fvdl int
    621  1.27.4.1      fvdl eap1371_src_read(sc, a)
    622  1.27.4.1      fvdl 	struct eap_softc *sc;
    623  1.27.4.1      fvdl 	int a;
    624  1.27.4.1      fvdl {
    625  1.27.4.1      fvdl 	int r;
    626  1.27.4.1      fvdl 
    627  1.27.4.1      fvdl 	eap1371_src_wait(sc);
    628  1.27.4.1      fvdl 	r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 |
    629  1.27.4.1      fvdl 				     E1371_SRC_DISP2 | E1371_SRC_DISREC);
    630  1.27.4.1      fvdl 	r |= E1371_SRC_ADDR(a);
    631  1.27.4.1      fvdl 	EWRITE4(sc, E1371_SRC, r);
    632  1.27.4.1      fvdl 	r = EREAD4(sc, E1371_SRC) & E1371_SRC_DATAMASK;
    633  1.27.4.1      fvdl 	return r;
    634  1.27.4.1      fvdl }
    635  1.27.4.1      fvdl 
    636  1.27.4.1      fvdl void
    637  1.27.4.1      fvdl eap1371_src_write(sc, a, d)
    638  1.27.4.1      fvdl 	struct eap_softc *sc;
    639  1.27.4.1      fvdl 	int a,d;
    640  1.27.4.1      fvdl {
    641  1.27.4.1      fvdl 	int r;
    642  1.27.4.1      fvdl 
    643  1.27.4.1      fvdl 	eap1371_src_wait(sc);
    644  1.27.4.1      fvdl 	r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 |
    645  1.27.4.1      fvdl 				     E1371_SRC_DISP2 | E1371_SRC_DISREC);
    646  1.27.4.1      fvdl 	r |= E1371_SRC_RAMWE | E1371_SRC_ADDR(a) | E1371_SRC_DATA(d);
    647  1.27.4.1      fvdl 	EWRITE4(sc, E1371_SRC, r);
    648  1.27.4.1      fvdl }
    649  1.27.4.1      fvdl 
    650  1.27.4.1      fvdl void
    651  1.27.4.1      fvdl eap1371_set_adc_rate(sc, rate)
    652  1.27.4.1      fvdl 	struct eap_softc *sc;
    653  1.27.4.1      fvdl 	int rate;
    654  1.27.4.1      fvdl {
    655  1.27.4.1      fvdl 	int freq, n, truncm;
    656  1.27.4.1      fvdl 	int out;
    657  1.27.4.1      fvdl 
    658  1.27.4.1      fvdl         /* Whatever, it works, so I'll leave it :) */
    659  1.27.4.1      fvdl 
    660  1.27.4.1      fvdl         if (rate > 48000)
    661  1.27.4.1      fvdl             rate = 48000;
    662  1.27.4.1      fvdl         if (rate < 4000)
    663  1.27.4.1      fvdl             rate = 4000;
    664  1.27.4.1      fvdl         n = rate / 3000;
    665  1.27.4.1      fvdl         if ((1 << n) & SRC_MAGIC)
    666  1.27.4.1      fvdl                 n--;
    667  1.27.4.1      fvdl         truncm = ((21 * n) - 1) | 1;
    668  1.27.4.1      fvdl         freq = ((48000 << 15) / rate) * n;
    669  1.27.4.1      fvdl         if (rate >= 24000) {
    670  1.27.4.1      fvdl                 if (truncm > 239)
    671  1.27.4.1      fvdl                         truncm = 239;
    672  1.27.4.1      fvdl 		out = ESRC_SET_TRUNC((239 - truncm) / 2);
    673  1.27.4.1      fvdl         } else {
    674  1.27.4.1      fvdl                 if (truncm > 119)
    675  1.27.4.1      fvdl                         truncm = 119;
    676  1.27.4.1      fvdl 		out = ESRC_SMF | ESRC_SET_TRUNC((119 - truncm) / 2);
    677  1.27.4.1      fvdl         }
    678  1.27.4.1      fvdl  	out |= ESRC_SET_N(n);
    679  1.27.4.1      fvdl         eap1371_src_write(sc, ESRC_ADC+ESRC_TRUNC_N, out);
    680  1.27.4.1      fvdl 
    681  1.27.4.1      fvdl 
    682  1.27.4.1      fvdl         out = eap1371_src_read(sc, ESRC_ADC+ESRC_IREGS) & 0xff;
    683  1.27.4.1      fvdl         eap1371_src_write(sc, ESRC_ADC+ESRC_IREGS, out |
    684  1.27.4.1      fvdl 			  ESRC_SET_VFI(freq >> 15));
    685  1.27.4.1      fvdl         eap1371_src_write(sc, ESRC_ADC+ESRC_VFF, freq & 0x7fff);
    686  1.27.4.1      fvdl         eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(n));
    687  1.27.4.1      fvdl         eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(n));
    688  1.27.4.1      fvdl }
    689  1.27.4.1      fvdl 
    690  1.27.4.1      fvdl void
    691  1.27.4.1      fvdl eap1371_set_dac_rate(sc, rate, which)
    692  1.27.4.1      fvdl 	struct eap_softc *sc;
    693  1.27.4.1      fvdl 	int rate;
    694  1.27.4.1      fvdl 	int which;
    695  1.27.4.1      fvdl {
    696  1.27.4.1      fvdl         int dac = (which == 1) ? ESRC_DAC1 : ESRC_DAC2;
    697  1.27.4.1      fvdl 	int freq, r;
    698  1.27.4.1      fvdl 
    699  1.27.4.1      fvdl         /* Whatever, it works, so I'll leave it :) */
    700  1.27.4.1      fvdl 
    701  1.27.4.1      fvdl         if (rate > 48000)
    702  1.27.4.1      fvdl             rate = 48000;
    703  1.27.4.1      fvdl         if (rate < 4000)
    704  1.27.4.1      fvdl             rate = 4000;
    705  1.27.4.1      fvdl         freq = (rate << 15) / 3000;
    706  1.27.4.1      fvdl 
    707  1.27.4.1      fvdl         eap1371_src_wait(sc);
    708  1.27.4.1      fvdl         r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE |
    709  1.27.4.1      fvdl             E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC);
    710  1.27.4.1      fvdl         r |= (which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2;
    711  1.27.4.1      fvdl         EWRITE4(sc, E1371_SRC, r);
    712  1.27.4.1      fvdl         r = eap1371_src_read(sc, dac + ESRC_IREGS) & 0x00ff;
    713  1.27.4.1      fvdl         eap1371_src_write(sc, dac + ESRC_IREGS, r | ((freq >> 5) & 0xfc00));
    714  1.27.4.1      fvdl         eap1371_src_write(sc, dac + ESRC_VFF, freq & 0x7fff);
    715  1.27.4.1      fvdl         r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE |
    716  1.27.4.1      fvdl             E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC);
    717  1.27.4.1      fvdl         r &= ~((which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2);
    718  1.27.4.1      fvdl         EWRITE4(sc, E1371_SRC, r);
    719       1.1  augustss }
    720       1.1  augustss 
    721       1.1  augustss void
    722       1.1  augustss eap_attach(parent, self, aux)
    723       1.1  augustss 	struct device *parent;
    724       1.1  augustss 	struct device *self;
    725       1.1  augustss 	void *aux;
    726       1.1  augustss {
    727       1.1  augustss 	struct eap_softc *sc = (struct eap_softc *)self;
    728       1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    729       1.1  augustss 	pci_chipset_tag_t pc = pa->pa_pc;
    730  1.27.4.1      fvdl 	struct audio_hw_if *eap_hw_if;
    731       1.1  augustss 	char const *intrstr;
    732       1.1  augustss 	pci_intr_handle_t ih;
    733       1.1  augustss 	pcireg_t csr;
    734  1.27.4.1      fvdl 	char devinfo[256];
    735       1.1  augustss 	mixer_ctrl_t ctl;
    736  1.27.4.1      fvdl 	int i;
    737  1.27.4.1      fvdl 
    738  1.27.4.1      fvdl 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
    739  1.27.4.1      fvdl 	printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
    740       1.1  augustss 
    741  1.27.4.1      fvdl         /* Flag if we're "creative" */
    742  1.27.4.1      fvdl 	sc->sc_1371 = PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97;
    743       1.1  augustss 
    744       1.1  augustss 	/* Map I/O register */
    745       1.1  augustss 	if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
    746       1.1  augustss 	      &sc->iot, &sc->ioh, NULL, NULL)) {
    747       1.1  augustss 		printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
    748       1.1  augustss 		return;
    749       1.1  augustss 	}
    750       1.1  augustss 
    751       1.1  augustss 	sc->sc_dmatag = pa->pa_dmat;
    752       1.1  augustss 
    753       1.1  augustss 	/* Enable the device. */
    754       1.1  augustss 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    755       1.1  augustss 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    756       1.1  augustss 		       csr | PCI_COMMAND_MASTER_ENABLE);
    757       1.1  augustss 
    758       1.1  augustss 	/* Map and establish the interrupt. */
    759       1.1  augustss 	if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
    760       1.1  augustss 	    pa->pa_intrline, &ih)) {
    761       1.1  augustss 		printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
    762       1.1  augustss 		return;
    763       1.1  augustss 	}
    764       1.1  augustss 	intrstr = pci_intr_string(pc, ih);
    765       1.1  augustss 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, eap_intr, sc);
    766       1.1  augustss 	if (sc->sc_ih == NULL) {
    767       1.1  augustss 		printf("%s: couldn't establish interrupt",
    768       1.1  augustss 		    sc->sc_dev.dv_xname);
    769       1.1  augustss 		if (intrstr != NULL)
    770       1.1  augustss 			printf(" at %s", intrstr);
    771       1.1  augustss 		printf("\n");
    772       1.1  augustss 		return;
    773       1.1  augustss 	}
    774       1.1  augustss 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
    775       1.1  augustss 
    776  1.27.4.1      fvdl 	if (!sc->sc_1371) {
    777  1.27.4.1      fvdl 		/* Enable interrupts and looping mode. */
    778  1.27.4.1      fvdl 		/* enable the parts we need */
    779  1.27.4.1      fvdl 		EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN);
    780  1.27.4.1      fvdl 		EWRITE4(sc, EAP_ICSC, EAP_CDC_EN);
    781  1.27.4.1      fvdl 
    782  1.27.4.1      fvdl 		/* reset codec */
    783  1.27.4.1      fvdl 		/* normal operation */
    784  1.27.4.1      fvdl 		/* select codec clocks */
    785  1.27.4.1      fvdl 		eap_write_codec(sc, AK_RESET, AK_PD);
    786  1.27.4.1      fvdl 		eap_write_codec(sc, AK_RESET, AK_PD | AK_NRST);
    787  1.27.4.1      fvdl 		eap_write_codec(sc, AK_CS, 0x0);
    788  1.27.4.1      fvdl 
    789  1.27.4.1      fvdl 		eap_hw_if = &eap1370_hw_if;
    790  1.27.4.1      fvdl 
    791  1.27.4.1      fvdl 		/* Enable all relevant mixer switches. */
    792  1.27.4.1      fvdl 		ctl.dev = EAP_OUTPUT_SELECT;
    793  1.27.4.1      fvdl 		ctl.type = AUDIO_MIXER_SET;
    794  1.27.4.1      fvdl 		ctl.un.mask = 1 << EAP_VOICE_VOL | 1 << EAP_FM_VOL |
    795  1.27.4.1      fvdl 			1 << EAP_CD_VOL | 1 << EAP_LINE_VOL | 1 << EAP_AUX_VOL |
    796  1.27.4.1      fvdl 			1 << EAP_MIC_VOL;
    797  1.27.4.1      fvdl 		eap_hw_if->set_port(sc, &ctl);
    798  1.27.4.1      fvdl 
    799  1.27.4.1      fvdl 		ctl.type = AUDIO_MIXER_VALUE;
    800  1.27.4.1      fvdl 		ctl.un.value.num_channels = 1;
    801  1.27.4.1      fvdl 		for (ctl.dev = EAP_MASTER_VOL; ctl.dev < EAP_MIC_VOL;
    802  1.27.4.1      fvdl 		     ctl.dev++) {
    803  1.27.4.1      fvdl 			ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = VOL_0DB;
    804  1.27.4.1      fvdl 			eap_hw_if->set_port(sc, &ctl);
    805  1.27.4.1      fvdl 		}
    806  1.27.4.1      fvdl 		ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = 0;
    807  1.27.4.1      fvdl 		eap_hw_if->set_port(sc, &ctl);
    808  1.27.4.1      fvdl 		ctl.dev = EAP_MIC_PREAMP;
    809  1.27.4.1      fvdl 		ctl.type = AUDIO_MIXER_ENUM;
    810  1.27.4.1      fvdl 		ctl.un.ord = 0;
    811  1.27.4.1      fvdl 		eap_hw_if->set_port(sc, &ctl);
    812  1.27.4.1      fvdl 		ctl.dev = EAP_RECORD_SOURCE;
    813  1.27.4.1      fvdl 		ctl.type = AUDIO_MIXER_SET;
    814  1.27.4.1      fvdl 		ctl.un.mask = 1 << EAP_MIC_VOL;
    815  1.27.4.1      fvdl 		eap_hw_if->set_port(sc, &ctl);
    816  1.27.4.1      fvdl 	} else {
    817  1.27.4.1      fvdl                 /* clean slate */
    818  1.27.4.1      fvdl                 EWRITE4(sc, EAP_SIC, 0);
    819  1.27.4.1      fvdl                 EWRITE4(sc, EAP_ICSC, 0);
    820  1.27.4.1      fvdl                 EWRITE4(sc, E1371_LEGACY, 0);
    821  1.27.4.1      fvdl 
    822  1.27.4.1      fvdl                 /* Reset from es1371's perspective */
    823  1.27.4.1      fvdl                 EWRITE4(sc, EAP_ICSC, E1371_SYNC_RES);
    824  1.27.4.1      fvdl                 delay(20);
    825  1.27.4.1      fvdl                 EWRITE4(sc, EAP_ICSC, 0);
    826  1.27.4.1      fvdl 
    827  1.27.4.1      fvdl                 /* must properly reprogram sample rate converter,
    828  1.27.4.1      fvdl                  * or it locks up.  Set some defaults for the life of the
    829  1.27.4.1      fvdl                  * machine, and set up a sb default sample rate.
    830  1.27.4.1      fvdl                  */
    831  1.27.4.1      fvdl                 EWRITE4(sc, E1371_SRC, E1371_SRC_DISABLE);
    832  1.27.4.1      fvdl                 for (i=0; i<0x80; i++)
    833  1.27.4.1      fvdl                         eap1371_src_write(sc, i, 0);
    834  1.27.4.1      fvdl 		eap1371_src_write(sc, ESRC_DAC1+ESRC_TRUNC_N, ESRC_SET_N(16));
    835  1.27.4.1      fvdl 		eap1371_src_write(sc, ESRC_DAC2+ESRC_TRUNC_N, ESRC_SET_N(16));
    836  1.27.4.1      fvdl                 eap1371_src_write(sc, ESRC_DAC1+ESRC_IREGS, ESRC_SET_VFI(16));
    837  1.27.4.1      fvdl                 eap1371_src_write(sc, ESRC_DAC2+ESRC_IREGS, ESRC_SET_VFI(16));
    838  1.27.4.1      fvdl                 eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(16));
    839  1.27.4.1      fvdl                 eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(16));
    840  1.27.4.1      fvdl 		eap1371_src_write(sc, ESRC_DAC1_VOLL, ESRC_SET_DAC_VOLI(1));
    841  1.27.4.1      fvdl 		eap1371_src_write(sc, ESRC_DAC1_VOLR, ESRC_SET_DAC_VOLI(1));
    842  1.27.4.1      fvdl 		eap1371_src_write(sc, ESRC_DAC2_VOLL, ESRC_SET_DAC_VOLI(1));
    843  1.27.4.1      fvdl 		eap1371_src_write(sc, ESRC_DAC2_VOLR, ESRC_SET_DAC_VOLI(1));
    844  1.27.4.1      fvdl                 eap1371_set_adc_rate(sc, 22050);
    845  1.27.4.1      fvdl                 eap1371_set_dac_rate(sc, 22050, 1);
    846  1.27.4.1      fvdl                 eap1371_set_dac_rate(sc, 22050, 2);
    847  1.27.4.1      fvdl 
    848  1.27.4.1      fvdl                 EWRITE4(sc, E1371_SRC, 0);
    849  1.27.4.1      fvdl 
    850  1.27.4.1      fvdl                 /* Reset codec */
    851  1.27.4.1      fvdl 
    852  1.27.4.1      fvdl 		/* Interrupt enable */
    853  1.27.4.1      fvdl 		sc->host_if.arg = sc;
    854  1.27.4.1      fvdl 		sc->host_if.attach = eap1371_attach_codec;
    855  1.27.4.1      fvdl 		sc->host_if.read = eap1371_read_codec;
    856  1.27.4.1      fvdl 		sc->host_if.write = eap1371_write_codec;
    857  1.27.4.1      fvdl 		sc->host_if.reset = eap1371_reset_codec;
    858  1.27.4.1      fvdl 
    859  1.27.4.1      fvdl 		if (ac97_attach(&sc->host_if) == 0) {
    860  1.27.4.1      fvdl 			/* Interrupt enable */
    861  1.27.4.1      fvdl 			EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN);
    862  1.27.4.1      fvdl 		} else
    863  1.27.4.1      fvdl 			return;
    864  1.27.4.1      fvdl 
    865  1.27.4.1      fvdl 		eap_hw_if = &eap1371_hw_if;
    866  1.27.4.1      fvdl 
    867  1.27.4.1      fvdl 		/* Just enable the DAC and master volumes by default */
    868  1.27.4.1      fvdl 		ctl.type = AUDIO_MIXER_ENUM;
    869  1.27.4.1      fvdl 		ctl.un.ord = 0;  /* off */
    870  1.27.4.1      fvdl 		ctl.dev = eap1371_get_portnum_by_name(sc, AudioCoutputs,
    871  1.27.4.1      fvdl 		       AudioNmaster, AudioNmute);
    872  1.27.4.1      fvdl 		eap1371_mixer_set_port(sc, &ctl);
    873  1.27.4.1      fvdl 		ctl.dev = eap1371_get_portnum_by_name(sc, AudioCinputs,
    874  1.27.4.1      fvdl 		       AudioNdac, AudioNmute);
    875  1.27.4.1      fvdl 		eap1371_mixer_set_port(sc, &ctl);
    876  1.27.4.1      fvdl 		ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord,
    877  1.27.4.1      fvdl 		       AudioNvolume, AudioNmute);
    878  1.27.4.1      fvdl 		eap1371_mixer_set_port(sc, &ctl);
    879  1.27.4.1      fvdl 
    880  1.27.4.1      fvdl 
    881  1.27.4.1      fvdl 		ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord,
    882  1.27.4.1      fvdl 		       AudioNsource, NULL);
    883  1.27.4.1      fvdl 		ctl.type = AUDIO_MIXER_ENUM;
    884  1.27.4.1      fvdl 		ctl.un.ord = 0;
    885  1.27.4.1      fvdl 		eap1371_mixer_set_port(sc, &ctl);
    886  1.27.4.1      fvdl 
    887  1.27.4.1      fvdl         }
    888  1.27.4.1      fvdl 
    889  1.27.4.1      fvdl 	audio_attach_mi(eap_hw_if, sc, &sc->sc_dev);
    890  1.27.4.1      fvdl 
    891  1.27.4.1      fvdl #if NMIDI > 0
    892  1.27.4.1      fvdl 	midi_attach_mi(&eap_midi_hw_if, sc, &sc->sc_dev);
    893  1.27.4.1      fvdl #endif
    894  1.27.4.1      fvdl }
    895  1.27.4.1      fvdl 
    896  1.27.4.1      fvdl int
    897  1.27.4.1      fvdl eap1371_attach_codec(sc_, codec_if)
    898  1.27.4.1      fvdl 	void *sc_;
    899  1.27.4.1      fvdl 	struct ac97_codec_if  *codec_if;
    900  1.27.4.1      fvdl {
    901  1.27.4.1      fvdl 	struct eap_softc *sc = sc_;
    902  1.27.4.1      fvdl 
    903  1.27.4.1      fvdl 	sc->codec_if = codec_if;
    904  1.27.4.1      fvdl 	return (0);
    905  1.27.4.1      fvdl }
    906  1.27.4.1      fvdl 
    907  1.27.4.1      fvdl void
    908  1.27.4.1      fvdl eap1371_reset_codec(sc_)
    909  1.27.4.1      fvdl 	void *sc_;
    910  1.27.4.1      fvdl {
    911  1.27.4.1      fvdl 	struct eap_softc *sc = sc_;
    912  1.27.4.1      fvdl 	u_int32_t icsc = EREAD4(sc, EAP_ICSC);
    913  1.27.4.1      fvdl 
    914  1.27.4.1      fvdl 	EWRITE4(sc, EAP_ICSC, icsc | E1371_SYNC_RES);
    915  1.27.4.1      fvdl 	delay(2);
    916  1.27.4.1      fvdl 	EWRITE4(sc, EAP_ICSC, icsc & ~E1371_SYNC_RES);
    917  1.27.4.1      fvdl 	delay(1);
    918       1.1  augustss 
    919  1.27.4.1      fvdl 	return;
    920       1.1  augustss }
    921       1.1  augustss 
    922       1.1  augustss int
    923       1.1  augustss eap_intr(p)
    924       1.1  augustss 	void *p;
    925       1.1  augustss {
    926       1.1  augustss 	struct eap_softc *sc = p;
    927       1.1  augustss 	u_int32_t intr, sic;
    928       1.1  augustss 
    929       1.9   mycroft 	intr = EREAD4(sc, EAP_ICSS);
    930       1.9   mycroft 	if (!(intr & EAP_INTR))
    931       1.9   mycroft 		return (0);
    932       1.1  augustss 	sic = EREAD4(sc, EAP_SIC);
    933       1.1  augustss 	DPRINTFN(5, ("eap_intr: ICSS=0x%08x, SIC=0x%08x\n", intr, sic));
    934       1.9   mycroft 	if (intr & EAP_I_ADC) {
    935       1.9   mycroft 		/*
    936       1.9   mycroft 		 * XXX This is a hack!
    937       1.9   mycroft 		 * The EAP chip sometimes generates the recording interrupt
    938       1.9   mycroft 		 * while it is still transferring the data.  To make sure
    939       1.9   mycroft 		 * it has all arrived we busy wait until the count is right.
    940       1.9   mycroft 		 * The transfer we are waiting for is 8 longwords.
    941       1.9   mycroft 		 */
    942       1.9   mycroft 		int s, nw, n;
    943       1.9   mycroft 		EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE);
    944       1.9   mycroft 		s = EREAD4(sc, EAP_ADC_CSR);
    945       1.9   mycroft 		nw = ((s & 0xffff) + 1) >> 2; /* # of words in DMA */
    946       1.9   mycroft 		n = 0;
    947       1.9   mycroft 		while (((EREAD4(sc, EAP_ADC_SIZE) >> 16) + 8) % nw == 0) {
    948       1.9   mycroft 			delay(10);
    949       1.9   mycroft 			if (++n > 100) {
    950       1.9   mycroft 				printf("eapintr: dma fix timeout");
    951       1.9   mycroft 				break;
    952       1.9   mycroft 			}
    953       1.9   mycroft 		}
    954       1.9   mycroft 		/* Continue with normal interrupt handling. */
    955       1.1  augustss 		EWRITE4(sc, EAP_SIC, sic & ~EAP_R1_INTR_EN);
    956       1.1  augustss 		EWRITE4(sc, EAP_SIC, sic);
    957       1.9   mycroft 		if (sc->sc_rintr)
    958       1.9   mycroft 			sc->sc_rintr(sc->sc_rarg);
    959       1.9   mycroft 	}
    960       1.9   mycroft 	if (intr & EAP_I_DAC2) {
    961       1.1  augustss 		EWRITE4(sc, EAP_SIC, sic & ~EAP_P2_INTR_EN);
    962       1.1  augustss 		EWRITE4(sc, EAP_SIC, sic);
    963       1.9   mycroft 		if (sc->sc_pintr)
    964       1.9   mycroft 			sc->sc_pintr(sc->sc_parg);
    965       1.9   mycroft 	}
    966  1.27.4.1      fvdl #if NMIDI > 0
    967  1.27.4.1      fvdl 	if (intr & EAP_I_UART) {
    968  1.27.4.1      fvdl 		u_int32_t data;
    969  1.27.4.1      fvdl 
    970  1.27.4.1      fvdl 		if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXINT) {
    971  1.27.4.1      fvdl 			while (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXRDY) {
    972  1.27.4.1      fvdl 				data = EREAD1(sc, EAP_UART_DATA);
    973  1.27.4.1      fvdl 				if (sc->sc_iintr)
    974  1.27.4.1      fvdl 					sc->sc_iintr(sc->sc_arg, data);
    975  1.27.4.1      fvdl 			}
    976  1.27.4.1      fvdl 		}
    977  1.27.4.1      fvdl 	}
    978  1.27.4.1      fvdl #endif
    979       1.1  augustss 	return (1);
    980       1.1  augustss }
    981       1.1  augustss 
    982       1.1  augustss int
    983       1.1  augustss eap_allocmem(sc, size, align, p)
    984       1.1  augustss 	struct eap_softc *sc;
    985       1.1  augustss 	size_t size;
    986       1.1  augustss 	size_t align;
    987       1.9   mycroft 	struct eap_dma *p;
    988       1.1  augustss {
    989       1.1  augustss 	int error;
    990       1.1  augustss 
    991       1.1  augustss 	p->size = size;
    992       1.1  augustss 	error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
    993       1.1  augustss 				 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
    994       1.1  augustss 				 &p->nsegs, BUS_DMA_NOWAIT);
    995       1.1  augustss 	if (error)
    996       1.1  augustss 		return (error);
    997       1.1  augustss 
    998       1.1  augustss 	error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
    999       1.1  augustss 			       &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
   1000       1.1  augustss 	if (error)
   1001       1.1  augustss 		goto free;
   1002       1.1  augustss 
   1003       1.1  augustss 	error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
   1004       1.1  augustss 				  0, BUS_DMA_NOWAIT, &p->map);
   1005       1.1  augustss 	if (error)
   1006       1.1  augustss 		goto unmap;
   1007       1.1  augustss 
   1008       1.1  augustss 	error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
   1009       1.1  augustss 				BUS_DMA_NOWAIT);
   1010       1.1  augustss 	if (error)
   1011       1.1  augustss 		goto destroy;
   1012       1.1  augustss 	return (0);
   1013       1.1  augustss 
   1014       1.1  augustss destroy:
   1015       1.1  augustss 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
   1016       1.1  augustss unmap:
   1017       1.1  augustss 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
   1018       1.1  augustss free:
   1019       1.1  augustss 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
   1020       1.1  augustss 	return (error);
   1021       1.1  augustss }
   1022       1.1  augustss 
   1023       1.1  augustss int
   1024       1.1  augustss eap_freemem(sc, p)
   1025       1.1  augustss 	struct eap_softc *sc;
   1026       1.9   mycroft 	struct eap_dma *p;
   1027       1.1  augustss {
   1028       1.1  augustss 	bus_dmamap_unload(sc->sc_dmatag, p->map);
   1029       1.1  augustss 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
   1030       1.1  augustss 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
   1031       1.1  augustss 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
   1032       1.1  augustss 	return (0);
   1033       1.1  augustss }
   1034       1.1  augustss 
   1035       1.1  augustss int
   1036       1.1  augustss eap_open(addr, flags)
   1037       1.1  augustss 	void *addr;
   1038       1.1  augustss 	int flags;
   1039       1.1  augustss {
   1040       1.9   mycroft 	return (0);
   1041       1.1  augustss }
   1042       1.1  augustss 
   1043       1.1  augustss /*
   1044       1.1  augustss  * Close function is called at splaudio().
   1045       1.1  augustss  */
   1046       1.1  augustss void
   1047       1.1  augustss eap_close(addr)
   1048       1.1  augustss 	void *addr;
   1049       1.1  augustss {
   1050       1.1  augustss 	struct eap_softc *sc = addr;
   1051       1.1  augustss 
   1052       1.9   mycroft 	eap_halt_output(sc);
   1053       1.9   mycroft 	eap_halt_input(sc);
   1054       1.1  augustss 
   1055       1.9   mycroft 	sc->sc_pintr = 0;
   1056       1.9   mycroft 	sc->sc_rintr = 0;
   1057       1.1  augustss }
   1058       1.1  augustss 
   1059       1.1  augustss int
   1060       1.1  augustss eap_query_encoding(addr, fp)
   1061       1.1  augustss 	void *addr;
   1062       1.1  augustss 	struct audio_encoding *fp;
   1063       1.1  augustss {
   1064       1.1  augustss 	switch (fp->index) {
   1065       1.1  augustss 	case 0:
   1066       1.1  augustss 		strcpy(fp->name, AudioEulinear);
   1067       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR;
   1068       1.1  augustss 		fp->precision = 8;
   1069       1.1  augustss 		fp->flags = 0;
   1070       1.1  augustss 		return (0);
   1071       1.1  augustss 	case 1:
   1072       1.1  augustss 		strcpy(fp->name, AudioEmulaw);
   1073       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULAW;
   1074       1.1  augustss 		fp->precision = 8;
   1075       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1076       1.1  augustss 		return (0);
   1077       1.1  augustss 	case 2:
   1078       1.1  augustss 		strcpy(fp->name, AudioEalaw);
   1079       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ALAW;
   1080       1.1  augustss 		fp->precision = 8;
   1081       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1082       1.1  augustss 		return (0);
   1083       1.1  augustss 	case 3:
   1084       1.1  augustss 		strcpy(fp->name, AudioEslinear);
   1085       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR;
   1086       1.1  augustss 		fp->precision = 8;
   1087       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1088       1.1  augustss 		return (0);
   1089       1.9   mycroft 	case 4:
   1090       1.1  augustss 		strcpy(fp->name, AudioEslinear_le);
   1091       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
   1092       1.1  augustss 		fp->precision = 16;
   1093       1.1  augustss 		fp->flags = 0;
   1094       1.1  augustss 		return (0);
   1095       1.1  augustss 	case 5:
   1096       1.1  augustss 		strcpy(fp->name, AudioEulinear_le);
   1097       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
   1098       1.1  augustss 		fp->precision = 16;
   1099       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1100       1.1  augustss 		return (0);
   1101       1.1  augustss 	case 6:
   1102       1.1  augustss 		strcpy(fp->name, AudioEslinear_be);
   1103       1.1  augustss 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
   1104       1.1  augustss 		fp->precision = 16;
   1105       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1106       1.1  augustss 		return (0);
   1107       1.1  augustss 	case 7:
   1108       1.1  augustss 		strcpy(fp->name, AudioEulinear_be);
   1109       1.1  augustss 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
   1110       1.1  augustss 		fp->precision = 16;
   1111       1.1  augustss 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1112       1.1  augustss 		return (0);
   1113       1.1  augustss 	default:
   1114       1.1  augustss 		return (EINVAL);
   1115       1.1  augustss 	}
   1116       1.1  augustss }
   1117       1.1  augustss 
   1118       1.1  augustss int
   1119       1.9   mycroft eap_set_params(addr, setmode, usemode, play, rec)
   1120       1.1  augustss 	void *addr;
   1121       1.1  augustss 	int setmode, usemode;
   1122       1.9   mycroft 	struct audio_params *play, *rec;
   1123       1.1  augustss {
   1124       1.1  augustss 	struct eap_softc *sc = addr;
   1125       1.9   mycroft 	struct audio_params *p;
   1126      1.23   mycroft 	int mode;
   1127      1.23   mycroft 	u_int32_t div;
   1128       1.9   mycroft 
   1129       1.9   mycroft 	/*
   1130  1.27.4.1      fvdl 	 * The es1370 only has one clock, so make the sample rates match.
   1131       1.9   mycroft 	 */
   1132  1.27.4.1      fvdl 	if (!sc->sc_1371) {
   1133  1.27.4.1      fvdl 	    if (play->sample_rate != rec->sample_rate &&
   1134  1.27.4.1      fvdl 		usemode == (AUMODE_PLAY | AUMODE_RECORD)) {
   1135  1.27.4.1      fvdl 	    	if (setmode == AUMODE_PLAY) {
   1136  1.27.4.1      fvdl 		    rec->sample_rate = play->sample_rate;
   1137  1.27.4.1      fvdl 		    setmode |= AUMODE_RECORD;
   1138      1.11   mycroft 		} else if (setmode == AUMODE_RECORD) {
   1139  1.27.4.1      fvdl 		    play->sample_rate = rec->sample_rate;
   1140  1.27.4.1      fvdl 		    setmode |= AUMODE_PLAY;
   1141      1.11   mycroft 		} else
   1142  1.27.4.1      fvdl 		    return (EINVAL);
   1143  1.27.4.1      fvdl 	    }
   1144       1.9   mycroft 	}
   1145       1.9   mycroft 
   1146       1.9   mycroft 	for (mode = AUMODE_RECORD; mode != -1;
   1147       1.9   mycroft 	     mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
   1148       1.9   mycroft 		if ((setmode & mode) == 0)
   1149       1.9   mycroft 			continue;
   1150       1.9   mycroft 
   1151       1.9   mycroft 		p = mode == AUMODE_PLAY ? play : rec;
   1152       1.9   mycroft 
   1153  1.27.4.1      fvdl 		if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
   1154       1.9   mycroft 		    (p->precision != 8 && p->precision != 16) ||
   1155       1.9   mycroft 		    (p->channels != 1 && p->channels != 2))
   1156       1.9   mycroft 			return (EINVAL);
   1157       1.9   mycroft 
   1158       1.9   mycroft 		p->factor = 1;
   1159       1.9   mycroft 		p->sw_code = 0;
   1160       1.9   mycroft 		switch (p->encoding) {
   1161       1.9   mycroft 		case AUDIO_ENCODING_SLINEAR_BE:
   1162       1.9   mycroft 			if (p->precision == 16)
   1163       1.9   mycroft 				p->sw_code = swap_bytes;
   1164       1.9   mycroft 			else
   1165       1.9   mycroft 				p->sw_code = change_sign8;
   1166       1.9   mycroft 			break;
   1167       1.9   mycroft 		case AUDIO_ENCODING_SLINEAR_LE:
   1168       1.9   mycroft 			if (p->precision != 16)
   1169       1.9   mycroft 				p->sw_code = change_sign8;
   1170       1.9   mycroft 			break;
   1171       1.9   mycroft 		case AUDIO_ENCODING_ULINEAR_BE:
   1172      1.17   thorpej 			if (p->precision == 16) {
   1173       1.9   mycroft 				if (mode == AUMODE_PLAY)
   1174  1.27.4.1      fvdl 					p->sw_code = swap_bytes_change_sign16_le;
   1175       1.9   mycroft 				else
   1176  1.27.4.1      fvdl 					p->sw_code = change_sign16_swap_bytes_le;
   1177      1.17   thorpej 			}
   1178       1.9   mycroft 			break;
   1179       1.9   mycroft 		case AUDIO_ENCODING_ULINEAR_LE:
   1180       1.9   mycroft 			if (p->precision == 16)
   1181  1.27.4.1      fvdl 				p->sw_code = change_sign16_le;
   1182       1.9   mycroft 			break;
   1183       1.9   mycroft 		case AUDIO_ENCODING_ULAW:
   1184       1.9   mycroft 			if (mode == AUMODE_PLAY) {
   1185       1.9   mycroft 				p->factor = 2;
   1186  1.27.4.1      fvdl 				p->sw_code = mulaw_to_slinear16_le;
   1187       1.9   mycroft 			} else
   1188       1.9   mycroft 				p->sw_code = ulinear8_to_mulaw;
   1189       1.9   mycroft 			break;
   1190       1.9   mycroft 		case AUDIO_ENCODING_ALAW:
   1191       1.9   mycroft 			if (mode == AUMODE_PLAY) {
   1192       1.9   mycroft 				p->factor = 2;
   1193  1.27.4.1      fvdl 				p->sw_code = alaw_to_slinear16_le;
   1194       1.9   mycroft 			} else
   1195       1.9   mycroft 				p->sw_code = ulinear8_to_alaw;
   1196       1.9   mycroft 			break;
   1197       1.9   mycroft 		default:
   1198       1.9   mycroft 			return (EINVAL);
   1199       1.1  augustss 		}
   1200       1.9   mycroft 	}
   1201       1.1  augustss 
   1202  1.27.4.1      fvdl         if (sc->sc_1371) {
   1203  1.27.4.1      fvdl 		eap1371_set_dac_rate(sc, play->sample_rate, 1);
   1204  1.27.4.1      fvdl 		eap1371_set_dac_rate(sc, play->sample_rate, 2);
   1205  1.27.4.1      fvdl 		eap1371_set_adc_rate(sc, rec->sample_rate);
   1206  1.27.4.1      fvdl 	} else {
   1207  1.27.4.1      fvdl                 /* Set the speed */
   1208  1.27.4.1      fvdl                 DPRINTFN(2, ("eap_set_params: old ICSC = 0x%08x\n",
   1209  1.27.4.1      fvdl                              EREAD4(sc, EAP_ICSC)));
   1210  1.27.4.1      fvdl                 div = EREAD4(sc, EAP_ICSC) & ~EAP_PCLKBITS;
   1211  1.27.4.1      fvdl                 /*
   1212  1.27.4.1      fvdl                  * XXX
   1213  1.27.4.1      fvdl                  * The -2 isn't documented, but seemed to make the wall
   1214  1.27.4.1      fvdl                  * time match
   1215  1.27.4.1      fvdl                  * what I expect.  - mycroft
   1216  1.27.4.1      fvdl                  */
   1217  1.27.4.1      fvdl                 if (usemode == AUMODE_RECORD)
   1218  1.27.4.1      fvdl                         div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ /
   1219  1.27.4.1      fvdl                                 rec->sample_rate - 2);
   1220  1.27.4.1      fvdl                 else
   1221  1.27.4.1      fvdl                         div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ /
   1222  1.27.4.1      fvdl                                 play->sample_rate - 2);
   1223  1.27.4.1      fvdl                 div |= EAP_CCB_INTRM;
   1224  1.27.4.1      fvdl                 EWRITE4(sc, EAP_ICSC, div);
   1225  1.27.4.1      fvdl                 DPRINTFN(2, ("eap_set_params: set ICSC = 0x%08x\n", div));
   1226  1.27.4.1      fvdl         }
   1227       1.1  augustss 
   1228       1.9   mycroft 	return (0);
   1229       1.1  augustss }
   1230       1.1  augustss 
   1231       1.1  augustss int
   1232       1.1  augustss eap_round_blocksize(addr, blk)
   1233       1.1  augustss 	void *addr;
   1234       1.1  augustss 	int blk;
   1235       1.1  augustss {
   1236       1.6  augustss 	return (blk & -32);	/* keep good alignment */
   1237       1.1  augustss }
   1238       1.1  augustss 
   1239       1.1  augustss int
   1240       1.9   mycroft eap_trigger_output(addr, start, end, blksize, intr, arg, param)
   1241       1.1  augustss 	void *addr;
   1242       1.9   mycroft 	void *start, *end;
   1243       1.9   mycroft 	int blksize;
   1244       1.9   mycroft 	void (*intr) __P((void *));
   1245       1.9   mycroft 	void *arg;
   1246       1.9   mycroft 	struct audio_params *param;
   1247       1.1  augustss {
   1248       1.1  augustss 	struct eap_softc *sc = addr;
   1249       1.1  augustss 	struct eap_dma *p;
   1250      1.24   mycroft 	u_int32_t icsc, sic;
   1251       1.9   mycroft 	int sampshift;
   1252       1.1  augustss 
   1253       1.9   mycroft #ifdef DIAGNOSTIC
   1254       1.9   mycroft 	if (sc->sc_prun)
   1255       1.9   mycroft 		panic("eap_trigger_output: already running");
   1256      1.10   mycroft 	sc->sc_prun = 1;
   1257       1.9   mycroft #endif
   1258       1.9   mycroft 
   1259  1.27.4.1      fvdl 	DPRINTFN(1, ("eap_trigger_output: sc=%p start=%p end=%p "
   1260  1.27.4.1      fvdl             "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
   1261       1.9   mycroft 	sc->sc_pintr = intr;
   1262       1.9   mycroft 	sc->sc_parg = arg;
   1263       1.9   mycroft 
   1264      1.24   mycroft 	icsc = EREAD4(sc, EAP_ICSC);
   1265      1.24   mycroft 	EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN);
   1266      1.24   mycroft 
   1267      1.24   mycroft 	sic = EREAD4(sc, EAP_SIC);
   1268      1.24   mycroft 	sic &= ~(EAP_P2_S_EB | EAP_P2_S_MB | EAP_INC_BITS);
   1269      1.24   mycroft 	sic |= EAP_SET_P2_ST_INC(0) | EAP_SET_P2_END_INC(param->precision * param->factor / 8);
   1270       1.9   mycroft 	sampshift = 0;
   1271       1.9   mycroft 	if (param->precision * param->factor == 16) {
   1272      1.24   mycroft 		sic |= EAP_P2_S_EB;
   1273       1.9   mycroft 		sampshift++;
   1274       1.9   mycroft 	}
   1275       1.9   mycroft 	if (param->channels == 2) {
   1276      1.24   mycroft 		sic |= EAP_P2_S_MB;
   1277       1.9   mycroft 		sampshift++;
   1278       1.1  augustss 	}
   1279      1.24   mycroft 	EWRITE4(sc, EAP_SIC, sic);
   1280       1.1  augustss 
   1281       1.9   mycroft 	for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
   1282       1.1  augustss 		;
   1283       1.1  augustss 	if (!p) {
   1284       1.9   mycroft 		printf("eap_trigger_output: bad addr %p\n", start);
   1285       1.1  augustss 		return (EINVAL);
   1286       1.1  augustss 	}
   1287       1.9   mycroft 
   1288       1.9   mycroft 	DPRINTF(("eap_trigger_output: DAC2_ADDR=0x%x, DAC2_SIZE=0x%x\n",
   1289      1.20  augustss 		 (int)DMAADDR(p),
   1290      1.20  augustss 		 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)));
   1291       1.1  augustss 	EWRITE4(sc, EAP_MEMPAGE, EAP_DAC_PAGE);
   1292       1.1  augustss 	EWRITE4(sc, EAP_DAC2_ADDR, DMAADDR(p));
   1293      1.20  augustss 	EWRITE4(sc, EAP_DAC2_SIZE,
   1294      1.20  augustss 		EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1));
   1295       1.9   mycroft 
   1296       1.9   mycroft 	EWRITE2(sc, EAP_DAC2_CSR, (blksize >> sampshift) - 1);
   1297      1.24   mycroft 
   1298      1.24   mycroft 	EWRITE4(sc, EAP_ICSC, icsc | EAP_DAC2_EN);
   1299      1.24   mycroft 
   1300      1.24   mycroft 	DPRINTFN(1, ("eap_trigger_output: set ICSC = 0x%08x\n", icsc));
   1301       1.9   mycroft 
   1302       1.1  augustss 	return (0);
   1303       1.1  augustss }
   1304       1.1  augustss 
   1305       1.1  augustss int
   1306       1.9   mycroft eap_trigger_input(addr, start, end, blksize, intr, arg, param)
   1307       1.1  augustss 	void *addr;
   1308       1.9   mycroft 	void *start, *end;
   1309       1.9   mycroft 	int blksize;
   1310       1.1  augustss 	void (*intr) __P((void *));
   1311       1.1  augustss 	void *arg;
   1312       1.9   mycroft 	struct audio_params *param;
   1313       1.1  augustss {
   1314       1.1  augustss 	struct eap_softc *sc = addr;
   1315       1.9   mycroft 	struct eap_dma *p;
   1316      1.24   mycroft 	u_int32_t icsc, sic;
   1317       1.9   mycroft 	int sampshift;
   1318       1.1  augustss 
   1319       1.9   mycroft #ifdef DIAGNOSTIC
   1320       1.9   mycroft 	if (sc->sc_rrun)
   1321       1.9   mycroft 		panic("eap_trigger_input: already running");
   1322      1.10   mycroft 	sc->sc_rrun = 1;
   1323       1.1  augustss #endif
   1324       1.9   mycroft 
   1325      1.10   mycroft 	DPRINTFN(1, ("eap_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
   1326      1.10   mycroft 	    addr, start, end, blksize, intr, arg));
   1327       1.9   mycroft 	sc->sc_rintr = intr;
   1328       1.9   mycroft 	sc->sc_rarg = arg;
   1329       1.9   mycroft 
   1330      1.24   mycroft 	icsc = EREAD4(sc, EAP_ICSC);
   1331      1.24   mycroft 	EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN);
   1332      1.24   mycroft 
   1333      1.24   mycroft 	sic = EREAD4(sc, EAP_SIC);
   1334      1.24   mycroft 	sic &= ~(EAP_R1_S_EB | EAP_R1_S_MB);
   1335       1.9   mycroft 	sampshift = 0;
   1336       1.9   mycroft 	if (param->precision * param->factor == 16) {
   1337      1.24   mycroft 		sic |= EAP_R1_S_EB;
   1338       1.9   mycroft 		sampshift++;
   1339       1.1  augustss 	}
   1340       1.9   mycroft 	if (param->channels == 2) {
   1341      1.24   mycroft 		sic |= EAP_R1_S_MB;
   1342       1.9   mycroft 		sampshift++;
   1343       1.9   mycroft 	}
   1344      1.24   mycroft 	EWRITE4(sc, EAP_SIC, sic);
   1345       1.9   mycroft 
   1346       1.9   mycroft 	for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
   1347       1.9   mycroft 		;
   1348       1.9   mycroft 	if (!p) {
   1349       1.9   mycroft 		printf("eap_trigger_input: bad addr %p\n", start);
   1350       1.9   mycroft 		return (EINVAL);
   1351       1.9   mycroft 	}
   1352       1.9   mycroft 
   1353       1.9   mycroft 	DPRINTF(("eap_trigger_input: ADC_ADDR=0x%x, ADC_SIZE=0x%x\n",
   1354      1.20  augustss 		 (int)DMAADDR(p),
   1355      1.20  augustss 		 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)));
   1356       1.9   mycroft 	EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE);
   1357       1.9   mycroft 	EWRITE4(sc, EAP_ADC_ADDR, DMAADDR(p));
   1358      1.20  augustss 	EWRITE4(sc, EAP_ADC_SIZE,
   1359      1.20  augustss 		EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1));
   1360       1.1  augustss 
   1361       1.9   mycroft 	EWRITE2(sc, EAP_ADC_CSR, (blksize >> sampshift) - 1);
   1362      1.24   mycroft 
   1363      1.24   mycroft 	EWRITE4(sc, EAP_ICSC, icsc | EAP_ADC_EN);
   1364      1.24   mycroft 
   1365      1.24   mycroft 	DPRINTFN(1, ("eap_trigger_input: set ICSC = 0x%08x\n", icsc));
   1366       1.9   mycroft 
   1367       1.9   mycroft 	return (0);
   1368       1.1  augustss }
   1369       1.1  augustss 
   1370       1.1  augustss int
   1371       1.9   mycroft eap_halt_output(addr)
   1372       1.1  augustss 	void *addr;
   1373       1.1  augustss {
   1374       1.1  augustss 	struct eap_softc *sc = addr;
   1375      1.24   mycroft 	u_int32_t icsc;
   1376       1.1  augustss 
   1377       1.9   mycroft 	DPRINTF(("eap: eap_halt_output\n"));
   1378      1.24   mycroft 	icsc = EREAD4(sc, EAP_ICSC);
   1379      1.24   mycroft 	EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN);
   1380       1.9   mycroft #ifdef DIAGNOSTIC
   1381       1.1  augustss 	sc->sc_prun = 0;
   1382       1.9   mycroft #endif
   1383       1.9   mycroft 	return (0);
   1384       1.1  augustss }
   1385       1.1  augustss 
   1386       1.1  augustss int
   1387       1.9   mycroft eap_halt_input(addr)
   1388       1.1  augustss 	void *addr;
   1389       1.1  augustss {
   1390       1.1  augustss 	struct eap_softc *sc = addr;
   1391      1.24   mycroft 	u_int32_t icsc;
   1392       1.1  augustss 
   1393       1.9   mycroft 	DPRINTF(("eap: eap_halt_input\n"));
   1394      1.24   mycroft 	icsc = EREAD4(sc, EAP_ICSC);
   1395      1.24   mycroft 	EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN);
   1396       1.9   mycroft #ifdef DIAGNOSTIC
   1397       1.1  augustss 	sc->sc_rrun = 0;
   1398       1.9   mycroft #endif
   1399       1.9   mycroft 	return (0);
   1400       1.1  augustss }
   1401       1.1  augustss 
   1402       1.1  augustss int
   1403       1.1  augustss eap_getdev(addr, retp)
   1404       1.1  augustss 	void *addr;
   1405       1.9   mycroft 	struct audio_device *retp;
   1406       1.1  augustss {
   1407       1.1  augustss 	*retp = eap_device;
   1408       1.9   mycroft 	return (0);
   1409       1.1  augustss }
   1410       1.1  augustss 
   1411  1.27.4.1      fvdl int
   1412  1.27.4.1      fvdl eap1371_mixer_set_port(addr, cp)
   1413  1.27.4.1      fvdl 	void *addr;
   1414  1.27.4.1      fvdl 	mixer_ctrl_t *cp;
   1415  1.27.4.1      fvdl {
   1416  1.27.4.1      fvdl 	struct eap_softc *sc = addr;
   1417  1.27.4.1      fvdl 
   1418  1.27.4.1      fvdl 	return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp));
   1419  1.27.4.1      fvdl }
   1420  1.27.4.1      fvdl 
   1421  1.27.4.1      fvdl int
   1422  1.27.4.1      fvdl eap1371_mixer_get_port(addr, cp)
   1423  1.27.4.1      fvdl 	void *addr;
   1424  1.27.4.1      fvdl 	mixer_ctrl_t *cp;
   1425  1.27.4.1      fvdl {
   1426  1.27.4.1      fvdl 	struct eap_softc *sc = addr;
   1427  1.27.4.1      fvdl 
   1428  1.27.4.1      fvdl 	return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp));
   1429  1.27.4.1      fvdl }
   1430  1.27.4.1      fvdl 
   1431  1.27.4.1      fvdl int
   1432  1.27.4.1      fvdl eap1371_query_devinfo(addr, dip)
   1433  1.27.4.1      fvdl 	void *addr;
   1434  1.27.4.1      fvdl 	mixer_devinfo_t *dip;
   1435  1.27.4.1      fvdl {
   1436  1.27.4.1      fvdl 	struct eap_softc *sc = addr;
   1437  1.27.4.1      fvdl 
   1438  1.27.4.1      fvdl 	return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip));
   1439  1.27.4.1      fvdl }
   1440  1.27.4.1      fvdl 
   1441  1.27.4.1      fvdl int
   1442  1.27.4.1      fvdl eap1371_get_portnum_by_name(sc, class, device, qualifier)
   1443  1.27.4.1      fvdl 	struct eap_softc *sc;
   1444  1.27.4.1      fvdl 	char *class, *device, *qualifier;
   1445  1.27.4.1      fvdl {
   1446  1.27.4.1      fvdl 	return (sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if, class,
   1447  1.27.4.1      fvdl              device, qualifier));
   1448  1.27.4.1      fvdl }
   1449  1.27.4.1      fvdl 
   1450       1.1  augustss void
   1451       1.1  augustss eap_set_mixer(sc, a, d)
   1452       1.1  augustss 	struct eap_softc *sc;
   1453       1.9   mycroft 	int a, d;
   1454       1.1  augustss {
   1455       1.1  augustss 	eap_write_codec(sc, a, d);
   1456       1.1  augustss 
   1457  1.27.4.1      fvdl         sc->sc_port[a] = d;
   1458  1.27.4.1      fvdl         DPRINTFN(1, ("eap_mixer_set_port port 0x%02x = 0x%02x\n", a, d));
   1459  1.27.4.1      fvdl }
   1460       1.1  augustss 
   1461       1.1  augustss int
   1462       1.1  augustss eap_mixer_set_port(addr, cp)
   1463       1.1  augustss 	void *addr;
   1464       1.1  augustss 	mixer_ctrl_t *cp;
   1465       1.1  augustss {
   1466       1.1  augustss 	struct eap_softc *sc = addr;
   1467       1.1  augustss 	int lval, rval, l, r, la, ra;
   1468       1.8  augustss 	int l1, r1, l2, r2, m, o1, o2;
   1469       1.1  augustss 
   1470       1.1  augustss 	if (cp->dev == EAP_RECORD_SOURCE) {
   1471       1.1  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1472       1.1  augustss 			return (EINVAL);
   1473       1.1  augustss 		m = sc->sc_record_source = cp->un.mask;
   1474       1.1  augustss 		l1 = l2 = r1 = r2 = 0;
   1475       1.1  augustss 		if (m & (1 << EAP_VOICE_VOL))
   1476       1.8  augustss 			l2 |= AK_M_VOICE, r2 |= AK_M_VOICE;
   1477       1.1  augustss 		if (m & (1 << EAP_FM_VOL))
   1478       1.1  augustss 			l1 |= AK_M_FM_L, r1 |= AK_M_FM_R;
   1479       1.1  augustss 		if (m & (1 << EAP_CD_VOL))
   1480       1.1  augustss 			l1 |= AK_M_CD_L, r1 |= AK_M_CD_R;
   1481       1.1  augustss 		if (m & (1 << EAP_LINE_VOL))
   1482       1.1  augustss 			l1 |= AK_M_LINE_L, r1 |= AK_M_LINE_R;
   1483       1.1  augustss 		if (m & (1 << EAP_AUX_VOL))
   1484       1.8  augustss 			l2 |= AK_M2_AUX_L, r2 |= AK_M2_AUX_R;
   1485       1.1  augustss 		if (m & (1 << EAP_MIC_VOL))
   1486       1.1  augustss 			l2 |= AK_M_TMIC, r2 |= AK_M_TMIC;
   1487       1.1  augustss 		eap_set_mixer(sc, AK_IN_MIXER1_L, l1);
   1488       1.1  augustss 		eap_set_mixer(sc, AK_IN_MIXER1_R, r1);
   1489       1.1  augustss 		eap_set_mixer(sc, AK_IN_MIXER2_L, l2);
   1490       1.1  augustss 		eap_set_mixer(sc, AK_IN_MIXER2_R, r2);
   1491       1.1  augustss 		return (0);
   1492       1.1  augustss 	}
   1493       1.8  augustss 	if (cp->dev == EAP_OUTPUT_SELECT) {
   1494       1.8  augustss 		if (cp->type != AUDIO_MIXER_SET)
   1495       1.8  augustss 			return (EINVAL);
   1496       1.8  augustss 		m = sc->sc_output_source = cp->un.mask;
   1497       1.8  augustss 		o1 = o2 = 0;
   1498       1.8  augustss 		if (m & (1 << EAP_VOICE_VOL))
   1499       1.8  augustss 			o2 |= AK_M_VOICE_L | AK_M_VOICE_R;
   1500       1.8  augustss 		if (m & (1 << EAP_FM_VOL))
   1501       1.8  augustss 			o1 |= AK_M_FM_L | AK_M_FM_R;
   1502       1.8  augustss 		if (m & (1 << EAP_CD_VOL))
   1503       1.8  augustss 			o1 |= AK_M_CD_L | AK_M_CD_R;
   1504       1.8  augustss 		if (m & (1 << EAP_LINE_VOL))
   1505       1.8  augustss 			o1 |= AK_M_LINE_L | AK_M_LINE_R;
   1506       1.8  augustss 		if (m & (1 << EAP_AUX_VOL))
   1507       1.8  augustss 			o2 |= AK_M_AUX_L | AK_M_AUX_R;
   1508       1.8  augustss 		if (m & (1 << EAP_MIC_VOL))
   1509       1.8  augustss 			o1 |= AK_M_MIC;
   1510       1.8  augustss 		eap_set_mixer(sc, AK_OUT_MIXER1, o1);
   1511       1.8  augustss 		eap_set_mixer(sc, AK_OUT_MIXER2, o2);
   1512       1.8  augustss 		return (0);
   1513       1.8  augustss 	}
   1514      1.12   mycroft 	if (cp->dev == EAP_MIC_PREAMP) {
   1515      1.12   mycroft 		if (cp->type != AUDIO_MIXER_ENUM)
   1516      1.12   mycroft 			return (EINVAL);
   1517      1.12   mycroft 		if (cp->un.ord != 0 && cp->un.ord != 1)
   1518      1.12   mycroft 			return (EINVAL);
   1519      1.12   mycroft 		sc->sc_mic_preamp = cp->un.ord;
   1520      1.12   mycroft 		eap_set_mixer(sc, AK_MGAIN, cp->un.ord);
   1521      1.12   mycroft 		return (0);
   1522      1.12   mycroft 	}
   1523       1.1  augustss 	if (cp->type != AUDIO_MIXER_VALUE)
   1524       1.1  augustss 		return (EINVAL);
   1525       1.1  augustss 	if (cp->un.value.num_channels == 1)
   1526       1.1  augustss 		lval = rval = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
   1527       1.1  augustss 	else if (cp->un.value.num_channels == 2) {
   1528       1.1  augustss 		lval = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
   1529       1.1  augustss 		rval = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
   1530       1.1  augustss 	} else
   1531       1.1  augustss 		return (EINVAL);
   1532       1.1  augustss 	ra = -1;
   1533       1.1  augustss 	switch (cp->dev) {
   1534       1.1  augustss 	case EAP_MASTER_VOL:
   1535       1.1  augustss 		l = VOL_TO_ATT5(lval);
   1536       1.1  augustss 		r = VOL_TO_ATT5(rval);
   1537       1.1  augustss 		la = AK_MASTER_L;
   1538       1.1  augustss 		ra = AK_MASTER_R;
   1539       1.1  augustss 		break;
   1540       1.1  augustss 	case EAP_MIC_VOL:
   1541       1.1  augustss 		if (cp->un.value.num_channels != 1)
   1542       1.1  augustss 			return (EINVAL);
   1543       1.1  augustss 		la = AK_MIC;
   1544       1.1  augustss 		goto lr;
   1545       1.1  augustss 	case EAP_VOICE_VOL:
   1546       1.1  augustss 		la = AK_VOICE_L;
   1547       1.1  augustss 		ra = AK_VOICE_R;
   1548       1.1  augustss 		goto lr;
   1549       1.1  augustss 	case EAP_FM_VOL:
   1550       1.1  augustss 		la = AK_FM_L;
   1551       1.1  augustss 		ra = AK_FM_R;
   1552       1.1  augustss 		goto lr;
   1553       1.1  augustss 	case EAP_CD_VOL:
   1554       1.1  augustss 		la = AK_CD_L;
   1555       1.1  augustss 		ra = AK_CD_R;
   1556       1.1  augustss 		goto lr;
   1557       1.1  augustss 	case EAP_LINE_VOL:
   1558       1.1  augustss 		la = AK_LINE_L;
   1559       1.1  augustss 		ra = AK_LINE_R;
   1560       1.1  augustss 		goto lr;
   1561       1.1  augustss 	case EAP_AUX_VOL:
   1562       1.1  augustss 		la = AK_AUX_L;
   1563       1.1  augustss 		ra = AK_AUX_R;
   1564       1.1  augustss 	lr:
   1565       1.1  augustss 		l = VOL_TO_GAIN5(lval);
   1566       1.1  augustss 		r = VOL_TO_GAIN5(rval);
   1567       1.1  augustss 		break;
   1568       1.1  augustss 	default:
   1569       1.1  augustss 		return (EINVAL);
   1570       1.1  augustss 	}
   1571       1.1  augustss 	eap_set_mixer(sc, la, l);
   1572       1.1  augustss 	if (ra >= 0) {
   1573       1.1  augustss 		eap_set_mixer(sc, ra, r);
   1574       1.1  augustss 	}
   1575       1.1  augustss 	return (0);
   1576       1.1  augustss }
   1577       1.1  augustss 
   1578       1.1  augustss int
   1579       1.1  augustss eap_mixer_get_port(addr, cp)
   1580       1.1  augustss 	void *addr;
   1581       1.1  augustss 	mixer_ctrl_t *cp;
   1582       1.1  augustss {
   1583       1.1  augustss 	struct eap_softc *sc = addr;
   1584       1.1  augustss 	int la, ra, l, r;
   1585       1.1  augustss 
   1586       1.1  augustss 	switch (cp->dev) {
   1587       1.1  augustss 	case EAP_RECORD_SOURCE:
   1588      1.13   mycroft 		if (cp->type != AUDIO_MIXER_SET)
   1589      1.12   mycroft 			return (EINVAL);
   1590       1.1  augustss 		cp->un.mask = sc->sc_record_source;
   1591       1.1  augustss 		return (0);
   1592       1.8  augustss 	case EAP_OUTPUT_SELECT:
   1593      1.13   mycroft 		if (cp->type != AUDIO_MIXER_SET)
   1594      1.12   mycroft 			return (EINVAL);
   1595       1.9   mycroft 		cp->un.mask = sc->sc_output_source;
   1596       1.9   mycroft 		return (0);
   1597      1.12   mycroft 	case EAP_MIC_PREAMP:
   1598      1.13   mycroft 		if (cp->type != AUDIO_MIXER_ENUM)
   1599      1.12   mycroft 			return (EINVAL);
   1600      1.12   mycroft 		cp->un.ord = sc->sc_mic_preamp;
   1601      1.12   mycroft 		return (0);
   1602       1.1  augustss 	case EAP_MASTER_VOL:
   1603       1.2   mycroft 		l = ATT5_TO_VOL(sc->sc_port[AK_MASTER_L]);
   1604       1.2   mycroft 		r = ATT5_TO_VOL(sc->sc_port[AK_MASTER_R]);
   1605       1.1  augustss 		break;
   1606       1.1  augustss 	case EAP_MIC_VOL:
   1607       1.1  augustss 		if (cp->un.value.num_channels != 1)
   1608       1.1  augustss 			return (EINVAL);
   1609       1.1  augustss 		la = ra = AK_MIC;
   1610       1.1  augustss 		goto lr;
   1611       1.1  augustss 	case EAP_VOICE_VOL:
   1612       1.1  augustss 		la = AK_VOICE_L;
   1613       1.1  augustss 		ra = AK_VOICE_R;
   1614       1.1  augustss 		goto lr;
   1615       1.1  augustss 	case EAP_FM_VOL:
   1616       1.1  augustss 		la = AK_FM_L;
   1617       1.1  augustss 		ra = AK_FM_R;
   1618       1.1  augustss 		goto lr;
   1619       1.1  augustss 	case EAP_CD_VOL:
   1620       1.1  augustss 		la = AK_CD_L;
   1621       1.1  augustss 		ra = AK_CD_R;
   1622       1.1  augustss 		goto lr;
   1623       1.1  augustss 	case EAP_LINE_VOL:
   1624       1.1  augustss 		la = AK_LINE_L;
   1625       1.1  augustss 		ra = AK_LINE_R;
   1626       1.1  augustss 		goto lr;
   1627       1.1  augustss 	case EAP_AUX_VOL:
   1628       1.1  augustss 		la = AK_AUX_L;
   1629       1.1  augustss 		ra = AK_AUX_R;
   1630       1.1  augustss 	lr:
   1631       1.1  augustss 		l = GAIN5_TO_VOL(sc->sc_port[la]);
   1632       1.1  augustss 		r = GAIN5_TO_VOL(sc->sc_port[ra]);
   1633       1.1  augustss 		break;
   1634       1.1  augustss 	default:
   1635       1.1  augustss 		return (EINVAL);
   1636       1.1  augustss 	}
   1637       1.1  augustss 	if (cp->un.value.num_channels == 1)
   1638       1.1  augustss 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2;
   1639       1.1  augustss 	else if (cp->un.value.num_channels == 2) {
   1640       1.1  augustss 		cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]  = l;
   1641       1.1  augustss 		cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r;
   1642      1.12   mycroft 	} else
   1643      1.12   mycroft 		return (EINVAL);
   1644       1.1  augustss 	return (0);
   1645       1.1  augustss }
   1646       1.1  augustss 
   1647       1.1  augustss int
   1648       1.1  augustss eap_query_devinfo(addr, dip)
   1649       1.1  augustss 	void *addr;
   1650       1.1  augustss 	mixer_devinfo_t *dip;
   1651       1.1  augustss {
   1652       1.1  augustss 	switch (dip->index) {
   1653       1.1  augustss 	case EAP_MASTER_VOL:
   1654       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
   1655       1.1  augustss 		dip->mixer_class = EAP_OUTPUT_CLASS;
   1656       1.1  augustss 		dip->prev = dip->next = AUDIO_MIXER_LAST;
   1657       1.1  augustss 		strcpy(dip->label.name, AudioNmaster);
   1658       1.1  augustss 		dip->un.v.num_channels = 2;
   1659       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
   1660       1.1  augustss 		return (0);
   1661       1.1  augustss 	case EAP_VOICE_VOL:
   1662       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
   1663       1.1  augustss 		dip->mixer_class = EAP_INPUT_CLASS;
   1664       1.1  augustss 		dip->prev = AUDIO_MIXER_LAST;
   1665       1.1  augustss 		dip->next = AUDIO_MIXER_LAST;
   1666       1.1  augustss 		strcpy(dip->label.name, AudioNdac);
   1667       1.1  augustss 		dip->un.v.num_channels = 2;
   1668       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
   1669       1.1  augustss 		return (0);
   1670       1.1  augustss 	case EAP_FM_VOL:
   1671       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
   1672       1.1  augustss 		dip->mixer_class = EAP_INPUT_CLASS;
   1673       1.1  augustss 		dip->prev = AUDIO_MIXER_LAST;
   1674       1.1  augustss 		dip->next = AUDIO_MIXER_LAST;
   1675       1.1  augustss 		strcpy(dip->label.name, AudioNfmsynth);
   1676       1.1  augustss 		dip->un.v.num_channels = 2;
   1677       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
   1678       1.1  augustss 		return (0);
   1679       1.1  augustss 	case EAP_CD_VOL:
   1680       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
   1681       1.1  augustss 		dip->mixer_class = EAP_INPUT_CLASS;
   1682       1.1  augustss 		dip->prev = AUDIO_MIXER_LAST;
   1683       1.1  augustss 		dip->next = AUDIO_MIXER_LAST;
   1684       1.1  augustss 		strcpy(dip->label.name, AudioNcd);
   1685       1.1  augustss 		dip->un.v.num_channels = 2;
   1686       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
   1687       1.1  augustss 		return (0);
   1688       1.1  augustss 	case EAP_LINE_VOL:
   1689       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
   1690       1.1  augustss 		dip->mixer_class = EAP_INPUT_CLASS;
   1691       1.1  augustss 		dip->prev = AUDIO_MIXER_LAST;
   1692       1.1  augustss 		dip->next = AUDIO_MIXER_LAST;
   1693       1.1  augustss 		strcpy(dip->label.name, AudioNline);
   1694       1.1  augustss 		dip->un.v.num_channels = 2;
   1695       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
   1696       1.1  augustss 		return (0);
   1697       1.1  augustss 	case EAP_AUX_VOL:
   1698       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
   1699       1.1  augustss 		dip->mixer_class = EAP_INPUT_CLASS;
   1700       1.1  augustss 		dip->prev = AUDIO_MIXER_LAST;
   1701       1.1  augustss 		dip->next = AUDIO_MIXER_LAST;
   1702       1.1  augustss 		strcpy(dip->label.name, AudioNaux);
   1703       1.1  augustss 		dip->un.v.num_channels = 2;
   1704       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
   1705       1.1  augustss 		return (0);
   1706       1.1  augustss 	case EAP_MIC_VOL:
   1707       1.1  augustss 		dip->type = AUDIO_MIXER_VALUE;
   1708       1.1  augustss 		dip->mixer_class = EAP_INPUT_CLASS;
   1709       1.1  augustss 		dip->prev = AUDIO_MIXER_LAST;
   1710      1.14   mycroft 		dip->next = EAP_MIC_PREAMP;
   1711       1.1  augustss 		strcpy(dip->label.name, AudioNmicrophone);
   1712       1.1  augustss 		dip->un.v.num_channels = 1;
   1713       1.1  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
   1714       1.1  augustss 		return (0);
   1715       1.1  augustss 	case EAP_RECORD_SOURCE:
   1716       1.1  augustss 		dip->mixer_class = EAP_RECORD_CLASS;
   1717       1.1  augustss 		dip->prev = dip->next = AUDIO_MIXER_LAST;
   1718       1.1  augustss 		strcpy(dip->label.name, AudioNsource);
   1719       1.1  augustss 		dip->type = AUDIO_MIXER_SET;
   1720       1.8  augustss 		dip->un.s.num_mem = 6;
   1721       1.8  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
   1722       1.8  augustss 		dip->un.s.member[0].mask = 1 << EAP_MIC_VOL;
   1723       1.8  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
   1724       1.8  augustss 		dip->un.s.member[1].mask = 1 << EAP_CD_VOL;
   1725       1.8  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
   1726       1.8  augustss 		dip->un.s.member[2].mask = 1 << EAP_LINE_VOL;
   1727       1.8  augustss 		strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
   1728       1.8  augustss 		dip->un.s.member[3].mask = 1 << EAP_FM_VOL;
   1729       1.8  augustss 		strcpy(dip->un.s.member[4].label.name, AudioNaux);
   1730       1.8  augustss 		dip->un.s.member[4].mask = 1 << EAP_AUX_VOL;
   1731       1.8  augustss 		strcpy(dip->un.s.member[5].label.name, AudioNdac);
   1732       1.8  augustss 		dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL;
   1733       1.8  augustss 		return (0);
   1734       1.8  augustss 	case EAP_OUTPUT_SELECT:
   1735       1.8  augustss 		dip->mixer_class = EAP_OUTPUT_CLASS;
   1736       1.8  augustss 		dip->prev = dip->next = AUDIO_MIXER_LAST;
   1737       1.8  augustss 		strcpy(dip->label.name, AudioNselect);
   1738       1.8  augustss 		dip->type = AUDIO_MIXER_SET;
   1739       1.8  augustss 		dip->un.s.num_mem = 6;
   1740       1.1  augustss 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
   1741       1.1  augustss 		dip->un.s.member[0].mask = 1 << EAP_MIC_VOL;
   1742       1.1  augustss 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
   1743       1.1  augustss 		dip->un.s.member[1].mask = 1 << EAP_CD_VOL;
   1744       1.1  augustss 		strcpy(dip->un.s.member[2].label.name, AudioNline);
   1745       1.1  augustss 		dip->un.s.member[2].mask = 1 << EAP_LINE_VOL;
   1746       1.1  augustss 		strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
   1747       1.1  augustss 		dip->un.s.member[3].mask = 1 << EAP_FM_VOL;
   1748       1.1  augustss 		strcpy(dip->un.s.member[4].label.name, AudioNaux);
   1749       1.1  augustss 		dip->un.s.member[4].mask = 1 << EAP_AUX_VOL;
   1750       1.8  augustss 		strcpy(dip->un.s.member[5].label.name, AudioNdac);
   1751       1.8  augustss 		dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL;
   1752      1.12   mycroft 		return (0);
   1753      1.12   mycroft 	case EAP_MIC_PREAMP:
   1754      1.12   mycroft 		dip->type = AUDIO_MIXER_ENUM;
   1755      1.14   mycroft 		dip->mixer_class = EAP_INPUT_CLASS;
   1756      1.14   mycroft 		dip->prev = EAP_MIC_VOL;
   1757      1.14   mycroft 		dip->next = AUDIO_MIXER_LAST;
   1758      1.12   mycroft 		strcpy(dip->label.name, AudioNpreamp);
   1759      1.12   mycroft 		dip->un.e.num_mem = 2;
   1760      1.12   mycroft 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
   1761      1.12   mycroft 		dip->un.e.member[0].ord = 0;
   1762      1.12   mycroft 		strcpy(dip->un.e.member[1].label.name, AudioNon);
   1763      1.12   mycroft 		dip->un.e.member[1].ord = 1;
   1764       1.1  augustss 		return (0);
   1765       1.1  augustss 	case EAP_OUTPUT_CLASS:
   1766       1.1  augustss 		dip->type = AUDIO_MIXER_CLASS;
   1767       1.1  augustss 		dip->mixer_class = EAP_OUTPUT_CLASS;
   1768       1.1  augustss 		dip->next = dip->prev = AUDIO_MIXER_LAST;
   1769       1.1  augustss 		strcpy(dip->label.name, AudioCoutputs);
   1770       1.1  augustss 		return (0);
   1771       1.1  augustss 	case EAP_RECORD_CLASS:
   1772       1.1  augustss 		dip->type = AUDIO_MIXER_CLASS;
   1773       1.1  augustss 		dip->mixer_class = EAP_RECORD_CLASS;
   1774       1.1  augustss 		dip->next = dip->prev = AUDIO_MIXER_LAST;
   1775       1.1  augustss 		strcpy(dip->label.name, AudioCrecord);
   1776       1.1  augustss 		return (0);
   1777       1.1  augustss 	case EAP_INPUT_CLASS:
   1778       1.1  augustss 		dip->type = AUDIO_MIXER_CLASS;
   1779       1.1  augustss 		dip->mixer_class = EAP_INPUT_CLASS;
   1780       1.1  augustss 		dip->next = dip->prev = AUDIO_MIXER_LAST;
   1781       1.1  augustss 		strcpy(dip->label.name, AudioCinputs);
   1782       1.1  augustss 		return (0);
   1783       1.1  augustss 	}
   1784       1.1  augustss 	return (ENXIO);
   1785       1.1  augustss }
   1786       1.1  augustss 
   1787       1.1  augustss void *
   1788      1.21   mycroft eap_malloc(addr, direction, size, pool, flags)
   1789       1.1  augustss 	void *addr;
   1790      1.21   mycroft 	int direction;
   1791      1.21   mycroft 	size_t size;
   1792      1.21   mycroft 	int pool, flags;
   1793       1.1  augustss {
   1794       1.1  augustss 	struct eap_softc *sc = addr;
   1795       1.9   mycroft 	struct eap_dma *p;
   1796       1.9   mycroft 	int error;
   1797       1.1  augustss 
   1798       1.9   mycroft 	p = malloc(sizeof(*p), pool, flags);
   1799       1.9   mycroft 	if (!p)
   1800       1.9   mycroft 		return (0);
   1801       1.9   mycroft 	error = eap_allocmem(sc, size, 16, p);
   1802       1.9   mycroft 	if (error) {
   1803       1.9   mycroft 		free(p, pool);
   1804       1.9   mycroft 		return (0);
   1805       1.9   mycroft 	}
   1806       1.9   mycroft 	p->next = sc->sc_dmas;
   1807       1.9   mycroft 	sc->sc_dmas = p;
   1808       1.1  augustss 	return (KERNADDR(p));
   1809       1.1  augustss }
   1810       1.1  augustss 
   1811       1.1  augustss void
   1812       1.1  augustss eap_free(addr, ptr, pool)
   1813       1.1  augustss 	void *addr;
   1814       1.1  augustss 	void *ptr;
   1815       1.1  augustss 	int pool;
   1816       1.1  augustss {
   1817       1.1  augustss 	struct eap_softc *sc = addr;
   1818      1.26    kleink 	struct eap_dma **pp, *p;
   1819       1.1  augustss 
   1820      1.26    kleink 	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
   1821      1.26    kleink 		if (KERNADDR(p) == ptr) {
   1822      1.26    kleink 			eap_freemem(sc, p);
   1823      1.26    kleink 			*pp = p->next;
   1824      1.26    kleink 			free(p, pool);
   1825       1.9   mycroft 			return;
   1826       1.9   mycroft 		}
   1827       1.9   mycroft 	}
   1828       1.1  augustss }
   1829       1.1  augustss 
   1830      1.21   mycroft size_t
   1831      1.21   mycroft eap_round_buffersize(addr, direction, size)
   1832       1.1  augustss 	void *addr;
   1833      1.21   mycroft 	int direction;
   1834      1.21   mycroft 	size_t size;
   1835       1.1  augustss {
   1836       1.1  augustss 	return (size);
   1837       1.1  augustss }
   1838       1.1  augustss 
   1839       1.1  augustss int
   1840       1.1  augustss eap_mappage(addr, mem, off, prot)
   1841       1.1  augustss 	void *addr;
   1842       1.9   mycroft 	void *mem;
   1843       1.9   mycroft 	int off;
   1844       1.1  augustss 	int prot;
   1845       1.1  augustss {
   1846       1.1  augustss 	struct eap_softc *sc = addr;
   1847       1.9   mycroft 	struct eap_dma *p;
   1848       1.1  augustss 
   1849      1.18       mrg 	if (off < 0)
   1850      1.18       mrg 		return (-1);
   1851       1.9   mycroft 	for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
   1852       1.1  augustss 		;
   1853       1.1  augustss 	if (!p)
   1854       1.1  augustss 		return (-1);
   1855       1.1  augustss 	return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
   1856       1.1  augustss 				off, prot, BUS_DMA_WAITOK));
   1857       1.1  augustss }
   1858       1.1  augustss 
   1859       1.1  augustss int
   1860       1.1  augustss eap_get_props(addr)
   1861       1.1  augustss 	void *addr;
   1862       1.1  augustss {
   1863  1.27.4.1      fvdl 	return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
   1864  1.27.4.1      fvdl                 AUDIO_PROP_FULLDUPLEX);
   1865  1.27.4.1      fvdl }
   1866  1.27.4.1      fvdl 
   1867  1.27.4.1      fvdl #if NMIDI > 0
   1868  1.27.4.1      fvdl int
   1869  1.27.4.1      fvdl eap_midi_open(addr, flags, iintr, ointr, arg)
   1870  1.27.4.1      fvdl 	void *addr;
   1871  1.27.4.1      fvdl 	int flags;
   1872  1.27.4.1      fvdl 	void (*iintr)__P((void *, int));
   1873  1.27.4.1      fvdl 	void (*ointr)__P((void *));
   1874  1.27.4.1      fvdl 	void *arg;
   1875  1.27.4.1      fvdl {
   1876  1.27.4.1      fvdl 	struct eap_softc *sc = addr;
   1877  1.27.4.1      fvdl 	u_int32_t uctrl;
   1878  1.27.4.1      fvdl 
   1879  1.27.4.1      fvdl 	sc->sc_iintr = iintr;
   1880  1.27.4.1      fvdl 	sc->sc_ointr = ointr;
   1881  1.27.4.1      fvdl 	sc->sc_arg = arg;
   1882  1.27.4.1      fvdl 
   1883  1.27.4.1      fvdl 	EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) | EAP_UART_EN);
   1884  1.27.4.1      fvdl 	uctrl = 0;
   1885  1.27.4.1      fvdl 	if (flags & FREAD)
   1886  1.27.4.1      fvdl 		uctrl |= EAP_UC_RXINTEN;
   1887  1.27.4.1      fvdl #if 0
   1888  1.27.4.1      fvdl 	/* I don't understand ../midi.c well enough to use output interrupts */
   1889  1.27.4.1      fvdl 	if (flags & FWRITE)
   1890  1.27.4.1      fvdl 		uctrl |= EAP_UC_TXINTEN; */
   1891  1.27.4.1      fvdl #endif
   1892  1.27.4.1      fvdl 	EWRITE1(sc, EAP_UART_CONTROL, uctrl);
   1893  1.27.4.1      fvdl 
   1894  1.27.4.1      fvdl 	return (0);
   1895  1.27.4.1      fvdl }
   1896  1.27.4.1      fvdl 
   1897  1.27.4.1      fvdl void
   1898  1.27.4.1      fvdl eap_midi_close(addr)
   1899  1.27.4.1      fvdl 	void *addr;
   1900  1.27.4.1      fvdl {
   1901  1.27.4.1      fvdl 	struct eap_softc *sc = addr;
   1902  1.27.4.1      fvdl 
   1903  1.27.4.1      fvdl 	EWRITE1(sc, EAP_UART_CONTROL, 0);
   1904  1.27.4.1      fvdl 	EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) & ~EAP_UART_EN);
   1905  1.27.4.1      fvdl 
   1906  1.27.4.1      fvdl 	sc->sc_iintr = 0;
   1907  1.27.4.1      fvdl 	sc->sc_ointr = 0;
   1908       1.1  augustss }
   1909  1.27.4.1      fvdl 
   1910  1.27.4.1      fvdl int
   1911  1.27.4.1      fvdl eap_midi_output(addr, d)
   1912  1.27.4.1      fvdl 	void *addr;
   1913  1.27.4.1      fvdl 	int d;
   1914  1.27.4.1      fvdl {
   1915  1.27.4.1      fvdl 	struct eap_softc *sc = addr;
   1916  1.27.4.1      fvdl 	int x;
   1917  1.27.4.1      fvdl 
   1918  1.27.4.1      fvdl 	for (x = 0; x != MIDI_BUSY_WAIT; x++) {
   1919  1.27.4.1      fvdl 		if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_TXRDY) {
   1920  1.27.4.1      fvdl 			EWRITE1(sc, EAP_UART_DATA, d);
   1921  1.27.4.1      fvdl 			return (0);
   1922  1.27.4.1      fvdl 		}
   1923  1.27.4.1      fvdl 		delay(MIDI_BUSY_DELAY);
   1924  1.27.4.1      fvdl 	}
   1925  1.27.4.1      fvdl 	return (EIO);
   1926  1.27.4.1      fvdl }
   1927  1.27.4.1      fvdl 
   1928  1.27.4.1      fvdl void
   1929  1.27.4.1      fvdl eap_midi_getinfo(addr, mi)
   1930  1.27.4.1      fvdl 	void *addr;
   1931  1.27.4.1      fvdl 	struct midi_info *mi;
   1932  1.27.4.1      fvdl {
   1933  1.27.4.1      fvdl 	mi->name = "AudioPCI MIDI UART";
   1934  1.27.4.1      fvdl 	mi->props = MIDI_PROP_CAN_INPUT;
   1935  1.27.4.1      fvdl }
   1936  1.27.4.1      fvdl 
   1937  1.27.4.1      fvdl #endif
   1938