eap.c revision 1.28
1 /* $NetBSD: eap.c,v 1.28 1999/10/27 13:20:34 augustss Exp $ */ 2 /* $OpenBSD: eap.c,v 1.6 1999/10/05 19:24:42 csapuntz Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson <augustss (at) netbsd.org> and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Debugging: Andreas Gustafsson <gson (at) araneus.fi> 42 * Testing: Chuck Cranor <chuck (at) maria.wustl.edu> 43 * Phil Nelson <phil (at) cs.wwu.edu> 44 */ 45 46 /* 47 * Ensoniq AudoiPCI ES1370 + AK4531 driver. 48 * Data sheets can be found at 49 * http://www.ensoniq.com/multimedia/semi_html/html/es1370.zip 50 * and 51 * http://206.214.38.151/pdf/4531.pdf 52 * 53 * Added Creative Ensoniq support: ES1371 + AC97 = hack city. 54 * -- Ezra Story <ezy (at) panix.com> 55 * Check es1371.zip from above, and the Audio Codec 97 spec from 56 * intel.com. 57 */ 58 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/malloc.h> 64 #include <sys/device.h> 65 66 #include <dev/pci/pcidevs.h> 67 #include <dev/pci/pcivar.h> 68 69 #include <sys/audioio.h> 70 #include <dev/audio_if.h> 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/ic/ac97.h> 74 75 #include <machine/bus.h> 76 77 #define PCI_CBIO 0x10 78 79 #define EAP_ICSC 0x00 /* interrupt / chip select control */ 80 #define EAP_SERR_DISABLE 0x00000001 81 #define EAP_CDC_EN 0x00000002 82 #define EAP_JYSTK_EN 0x00000004 83 #define EAP_UART_EN 0x00000008 84 #define EAP_ADC_EN 0x00000010 85 #define EAP_DAC2_EN 0x00000020 86 #define EAP_DAC1_EN 0x00000040 87 #define EAP_BREQ 0x00000080 88 #define EAP_XTCL0 0x00000100 89 #define EAP_M_CB 0x00000200 90 #define EAP_CCB_INTRM 0x00000400 91 #define EAP_DAC_SYNC 0x00000800 92 #define EAP_WTSRSEL 0x00003000 93 #define EAP_WTSRSEL_5 0x00000000 94 #define EAP_WTSRSEL_11 0x00001000 95 #define EAP_WTSRSEL_22 0x00002000 96 #define EAP_WTSRSEL_44 0x00003000 97 #define EAP_M_SBB 0x00004000 98 #define EAP_MSFMTSEL 0x00008000 99 #define EAP_SET_PCLKDIV(n) (((n)&0x1fff)<<16) 100 #define EAP_GET_PCLKDIV(n) (((n)>>16)&0x1fff) 101 #define EAP_PCLKBITS 0x1fff0000 102 #define EAP_XTCL1 0x40000000 103 #define EAP_ADC_STOP 0x80000000 104 #define E1371_SYNC_RES (1<<14) 105 106 #define EAP_ICSS 0x04 /* interrupt / chip select status */ 107 #define EAP_I_ADC 0x00000001 108 #define EAP_I_DAC2 0x00000002 109 #define EAP_I_DAC1 0x00000004 110 #define EAP_I_UART 0x00000008 111 #define EAP_I_MCCB 0x00000010 112 #define EAP_VC 0x00000060 113 #define EAP_CWRIP 0x00000100 114 #define EAP_CBUSY 0x00000200 115 #define EAP_CSTAT 0x00000400 116 #define EAP_INTR 0x80000000 117 118 #define EAP_UART_DATA 0x08 119 #define EAP_UART_STATUS 0x09 120 #define EAP_UART_CONTROL 0x09 121 #define EAP_MEMPAGE 0x0c 122 #define EAP_CODEC 0x10 123 #define EAP_SET_CODEC(a,d) (((a)<<8) | (d)) 124 125 /* ES1371 Registers */ 126 #define E1371_CODEC 0x14 127 #define E1371_CODEC_WIP (1<<30) 128 #define E1371_CODEC_VALID (1<<31) 129 #define E1371_CODEC_READ (1<<23) 130 #define E1371_SET_CODEC(a,d) (((a)<<16) | (d)) 131 #define E1371_SRC 0x10 132 #define E1371_SRC_RAMWE (1<<24) 133 #define E1371_SRC_RBUSY (1<<23) 134 #define E1371_SRC_DISABLE (1<<22) 135 #define E1371_SRC_DISP1 (1<<21) 136 #define E1371_SRC_DISP2 (1<<20) 137 #define E1371_SRC_DISREC (1<<19) 138 #define E1371_SRC_ADDR(a) ((a)<<25) 139 #define E1371_SRC_DATA(d) (d) 140 #define E1371_SRC_DATAMASK 0xffff 141 #define E1371_LEGACY 0x18 142 143 /* ES1371 Sample rate converter registers */ 144 #define ESRC_ADC 0x78 145 #define ESRC_DAC1 0x74 146 #define ESRC_DAC2 0x70 147 #define ESRC_ADC_VOLL 0x6c 148 #define ESRC_ADC_VOLR 0x6d 149 #define ESRC_DAC1_VOLL 0x7c 150 #define ESRC_DAC1_VOLR 0x7d 151 #define ESRC_DAC2_VOLL 0x7e 152 #define ESRC_DAC2_VOLR 0x7f 153 #define ESRC_TRUNC_N 0x00 154 #define ESRC_IREGS 0x01 155 #define ESRC_ACF 0x02 156 #define ESRC_VFF 0x03 157 #define ESRC_SET_TRUNC(n) ((n)<<9) 158 #define ESRC_SET_N(n) ((n)<<4) 159 #define ESRC_SMF 0x8000 160 #define ESRC_SET_VFI(n) ((n)<<10) 161 #define ESRC_SET_ACI(n) (n) 162 #define ESRC_SET_ADC_VOL(n) ((n)<<8) 163 #define ESRC_SET_DAC_VOLI(n) ((n)<<12) 164 #define ESRC_SET_DAC_VOLF(n) (n) 165 #define SRC_MAGIC ((1<15)|(1<<13)|(1<<11)|(1<<9)) 166 167 168 #define EAP_SIC 0x20 169 #define EAP_P1_S_MB 0x00000001 170 #define EAP_P1_S_EB 0x00000002 171 #define EAP_P2_S_MB 0x00000004 172 #define EAP_P2_S_EB 0x00000008 173 #define EAP_R1_S_MB 0x00000010 174 #define EAP_R1_S_EB 0x00000020 175 #define EAP_P2_DAC_SEN 0x00000040 176 #define EAP_P1_SCT_RLD 0x00000080 177 #define EAP_P1_INTR_EN 0x00000100 178 #define EAP_P2_INTR_EN 0x00000200 179 #define EAP_R1_INTR_EN 0x00000400 180 #define EAP_P1_PAUSE 0x00000800 181 #define EAP_P2_PAUSE 0x00001000 182 #define EAP_P1_LOOP_SEL 0x00002000 183 #define EAP_P2_LOOP_SEL 0x00004000 184 #define EAP_R1_LOOP_SEL 0x00008000 185 #define EAP_SET_P2_ST_INC(i) ((i) << 16) 186 #define EAP_SET_P2_END_INC(i) ((i) << 19) 187 #define EAP_INC_BITS 0x003f0000 188 189 #define EAP_DAC1_CSR 0x24 190 #define EAP_DAC2_CSR 0x28 191 #define EAP_ADC_CSR 0x2c 192 #define EAP_GET_CURRSAMP(r) ((r) >> 16) 193 194 #define EAP_DAC_PAGE 0xc 195 #define EAP_ADC_PAGE 0xd 196 #define EAP_UART_PAGE1 0xe 197 #define EAP_UART_PAGE2 0xf 198 199 #define EAP_DAC1_ADDR 0x30 200 #define EAP_DAC1_SIZE 0x34 201 #define EAP_DAC2_ADDR 0x38 202 #define EAP_DAC2_SIZE 0x3c 203 #define EAP_ADC_ADDR 0x30 204 #define EAP_ADC_SIZE 0x34 205 #define EAP_SET_SIZE(c,s) (((c)<<16) | (s)) 206 207 #define EAP_READ_TIMEOUT 5000000 208 #define EAP_WRITE_TIMEOUT 5000000 209 210 211 #define EAP_XTAL_FREQ 1411200 /* 22.5792 / 16 MHz */ 212 213 /* AK4531 registers */ 214 #define AK_MASTER_L 0x00 215 #define AK_MASTER_R 0x01 216 #define AK_VOICE_L 0x02 217 #define AK_VOICE_R 0x03 218 #define AK_FM_L 0x04 219 #define AK_FM_R 0x05 220 #define AK_CD_L 0x06 221 #define AK_CD_R 0x07 222 #define AK_LINE_L 0x08 223 #define AK_LINE_R 0x09 224 #define AK_AUX_L 0x0a 225 #define AK_AUX_R 0x0b 226 #define AK_MONO1 0x0c 227 #define AK_MONO2 0x0d 228 #define AK_MIC 0x0e 229 #define AK_MONO 0x0f 230 #define AK_OUT_MIXER1 0x10 231 #define AK_M_FM_L 0x40 232 #define AK_M_FM_R 0x20 233 #define AK_M_LINE_L 0x10 234 #define AK_M_LINE_R 0x08 235 #define AK_M_CD_L 0x04 236 #define AK_M_CD_R 0x02 237 #define AK_M_MIC 0x01 238 #define AK_OUT_MIXER2 0x11 239 #define AK_M_AUX_L 0x20 240 #define AK_M_AUX_R 0x10 241 #define AK_M_VOICE_L 0x08 242 #define AK_M_VOICE_R 0x04 243 #define AK_M_MONO2 0x02 244 #define AK_M_MONO1 0x01 245 #define AK_IN_MIXER1_L 0x12 246 #define AK_IN_MIXER1_R 0x13 247 #define AK_IN_MIXER2_L 0x14 248 #define AK_IN_MIXER2_R 0x15 249 #define AK_M_TMIC 0x80 250 #define AK_M_TMONO1 0x40 251 #define AK_M_TMONO2 0x20 252 #define AK_M2_AUX_L 0x10 253 #define AK_M2_AUX_R 0x08 254 #define AK_M_VOICE 0x04 255 #define AK_M2_MONO2 0x02 256 #define AK_M2_MONO1 0x01 257 #define AK_RESET 0x16 258 #define AK_PD 0x02 259 #define AK_NRST 0x01 260 #define AK_CS 0x17 261 #define AK_ADSEL 0x18 262 #define AK_MGAIN 0x19 263 #define AK_NPORTS 0x20 264 265 #define MAX_NPORTS AK_NPORTS 266 267 /* Not sensical for AC97? */ 268 #define VOL_TO_ATT5(v) (0x1f - ((v) >> 3)) 269 #define VOL_TO_GAIN5(v) VOL_TO_ATT5(v) 270 #define ATT5_TO_VOL(v) ((0x1f - (v)) << 3) 271 #define GAIN5_TO_VOL(v) ATT5_TO_VOL(v) 272 #define VOL_0DB 200 273 274 /* Futzable parms */ 275 #define EAP_MASTER_VOL 0 276 #define EAP_VOICE_VOL 1 277 #define EAP_FM_VOL 2 278 #define EAP_VIDEO_VOL 2 /* ES1371 */ 279 #define EAP_CD_VOL 3 280 #define EAP_LINE_VOL 4 281 #define EAP_AUX_VOL 5 282 #define EAP_MIC_VOL 6 283 #define EAP_RECORD_SOURCE 7 284 #define EAP_OUTPUT_SELECT 8 285 #define EAP_MIC_PREAMP 9 286 #define EAP_OUTPUT_CLASS 10 287 #define EAP_RECORD_CLASS 11 288 #define EAP_INPUT_CLASS 12 289 290 /* Debug */ 291 #ifdef AUDIO_DEBUG 292 #define DPRINTF(x) if (eapdebug) printf x 293 #define DPRINTFN(n,x) if (eapdebug>(n)) printf x 294 int eapdebug = 0; 295 #else 296 #define DPRINTF(x) 297 #define DPRINTFN(n,x) 298 #endif 299 300 int eap_match __P((struct device *, struct cfdata *, void *)); 301 void eap_attach __P((struct device *, struct device *, void *)); 302 int eap_intr __P((void *)); 303 304 struct eap_dma { 305 bus_dmamap_t map; 306 caddr_t addr; 307 bus_dma_segment_t segs[1]; 308 int nsegs; 309 size_t size; 310 struct eap_dma *next; 311 }; 312 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 313 #define KERNADDR(p) ((void *)((p)->addr)) 314 315 struct eap_softc { 316 struct device sc_dev; /* base device */ 317 void *sc_ih; /* interrupt vectoring */ 318 bus_space_tag_t iot; 319 bus_space_handle_t ioh; 320 bus_dma_tag_t sc_dmatag; /* DMA tag */ 321 322 struct eap_dma *sc_dmas; 323 324 void (*sc_pintr)(void *); /* dma completion intr handler */ 325 void *sc_parg; /* arg for sc_intr() */ 326 #ifdef DIAGNOSTIC 327 char sc_prun; 328 #endif 329 330 void (*sc_rintr)(void *); /* dma completion intr handler */ 331 void *sc_rarg; /* arg for sc_intr() */ 332 #ifdef DIAGNOSTIC 333 char sc_rrun; 334 #endif 335 336 u_short sc_port[MAX_NPORTS]; /* mirror of the hardware setting */ 337 u_int sc_record_source; /* recording source mask */ 338 u_int sc_output_source; /* output source mask */ 339 u_int sc_mic_preamp; 340 char sc_1371; /* Using ES1371/AC97 codec */ 341 342 struct ac97_codec_if *codec_if; 343 struct ac97_host_if host_if; 344 }; 345 346 int eap_allocmem __P((struct eap_softc *, size_t, size_t, struct eap_dma *)); 347 int eap_freemem __P((struct eap_softc *, struct eap_dma *)); 348 349 #define EWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 350 #define EWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 351 #define EREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 352 #define EREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 353 354 struct cfattach eap_ca = { 355 sizeof(struct eap_softc), eap_match, eap_attach 356 }; 357 358 int eap_open __P((void *, int)); 359 void eap_close __P((void *)); 360 int eap_query_encoding __P((void *, struct audio_encoding *)); 361 int eap_set_params __P((void *, int, int, struct audio_params *, struct audio_params *)); 362 int eap_round_blocksize __P((void *, int)); 363 int eap_trigger_output __P((void *, void *, void *, int, void (*)(void *), 364 void *, struct audio_params *)); 365 int eap_trigger_input __P((void *, void *, void *, int, void (*)(void *), 366 void *, struct audio_params *)); 367 int eap_halt_output __P((void *)); 368 int eap_halt_input __P((void *)); 369 void eap_write_codec __P((struct eap_softc *, int, int)); 370 int eap_getdev __P((void *, struct audio_device *)); 371 int eap_mixer_set_port __P((void *, mixer_ctrl_t *)); 372 int eap_mixer_get_port __P((void *, mixer_ctrl_t *)); 373 int eap1371_mixer_set_port __P((void *, mixer_ctrl_t *)); 374 int eap1371_mixer_get_port __P((void *, mixer_ctrl_t *)); 375 int eap_query_devinfo __P((void *, mixer_devinfo_t *)); 376 void *eap_malloc __P((void *, int, size_t, int, int)); 377 void eap_free __P((void *, void *, int)); 378 size_t eap_round_buffersize __P((void *, int, size_t)); 379 int eap_mappage __P((void *, void *, int, int)); 380 int eap_get_props __P((void *)); 381 void eap_set_mixer __P((struct eap_softc *sc, int a, int d)); 382 void eap1371_src_wait __P((struct eap_softc *sc)); 383 void eap1371_set_adc_rate __P((struct eap_softc *sc, int rate)); 384 void eap1371_set_dac_rate __P((struct eap_softc *sc, int rate, int which)); 385 int eap1371_src_read __P((struct eap_softc *sc, int a)); 386 void eap1371_src_write __P((struct eap_softc *sc, int a, int d)); 387 int eap1371_query_devinfo __P((void *addr, mixer_devinfo_t *dip)); 388 389 int eap1371_attach_codec __P((void *sc, struct ac97_codec_if *)); 390 int eap1371_read_codec __P((void *sc, u_int8_t a, u_int16_t *d)); 391 int eap1371_write_codec __P((void *sc, u_int8_t a, u_int16_t d)); 392 void eap1371_reset_codec __P((void *sc)); 393 int eap1371_get_portnum_by_name __P((struct eap_softc *, char *, char *, 394 char *)); 395 396 struct audio_hw_if eap_hw_if = { 397 eap_open, 398 eap_close, 399 NULL, 400 eap_query_encoding, 401 eap_set_params, 402 eap_round_blocksize, 403 NULL, 404 NULL, 405 NULL, 406 NULL, 407 NULL, 408 eap_halt_output, 409 eap_halt_input, 410 NULL, 411 eap_getdev, 412 NULL, 413 eap_mixer_set_port, 414 eap_mixer_get_port, 415 eap_query_devinfo, 416 eap_malloc, 417 eap_free, 418 eap_round_buffersize, 419 eap_mappage, 420 eap_get_props, 421 eap_trigger_output, 422 eap_trigger_input, 423 }; 424 425 struct audio_device eap_device = { 426 "Ensoniq AudioPCI", 427 "", 428 "eap" 429 }; 430 431 int 432 eap_match(parent, match, aux) 433 struct device *parent; 434 struct cfdata *match; 435 void *aux; 436 { 437 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 438 439 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_ENSONIQ) 440 return (0); 441 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI || 442 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97) { 443 return (1); 444 } 445 446 return (0); 447 } 448 449 void 450 eap_write_codec(sc, a, d) 451 struct eap_softc *sc; 452 int a, d; 453 { 454 455 int icss, to = EAP_WRITE_TIMEOUT; 456 457 do { 458 icss = EREAD4(sc, EAP_ICSS); 459 DPRINTFN(5,("eap: codec %d prog: icss=0x%08x\n", a, icss)); 460 if (!to--) { 461 printf("eap: timeout writing to codec\n"); 462 return; 463 } 464 } while(to && icss & EAP_CWRIP); /* XXX could use CSTAT here */ 465 EWRITE4(sc, EAP_CODEC, EAP_SET_CODEC(a, d)); 466 } 467 468 469 int 470 eap1371_read_codec(sc_, a, d) 471 void *sc_; 472 u_int8_t a; 473 u_int16_t *d; 474 { 475 struct eap_softc *sc = sc_; 476 int to; 477 int cdc; 478 479 to = EAP_WRITE_TIMEOUT; 480 do { 481 cdc = EREAD4(sc, E1371_CODEC); 482 if (!to--) { 483 printf("eap: timeout writing to codec\n"); 484 return 1; 485 } 486 } while (cdc & E1371_CODEC_WIP); 487 488 /* just do it */ 489 eap1371_src_wait(sc); 490 EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, 0) | E1371_CODEC_READ); 491 492 for (to = 0; to < EAP_WRITE_TIMEOUT; to++) { 493 if ((cdc = EREAD4(sc, E1371_CODEC)) & E1371_CODEC_VALID) 494 break; 495 } 496 497 if (to == EAP_WRITE_TIMEOUT) { 498 DPRINTF(("eap1371: read codec timeout\n")); 499 } 500 501 *d = cdc & 0xffff; 502 503 DPRINTFN(10, ("eap1371: reading codec (%x) = %x\n", a, *d)); 504 505 return (0); 506 } 507 508 int 509 eap1371_write_codec(sc_, a, d) 510 void *sc_; 511 u_int8_t a; 512 u_int16_t d; 513 { 514 struct eap_softc *sc = sc_; 515 int to; 516 int cdc; 517 518 to = EAP_WRITE_TIMEOUT; 519 do { 520 cdc = EREAD4(sc, E1371_CODEC); 521 if (!to--) { 522 printf("eap: timeout writing to codec\n"); 523 return 1; 524 } 525 } while (cdc & E1371_CODEC_WIP); 526 527 /* just do it */ 528 eap1371_src_wait(sc); 529 EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, d)); 530 DPRINTFN(10, ("eap1371: writing codec %x --> %x\n", d, a)); 531 532 return (0); 533 } 534 535 void 536 eap1371_src_wait(sc) 537 struct eap_softc *sc; 538 { 539 int to; 540 int src; 541 542 to = EAP_READ_TIMEOUT; 543 do { 544 src = EREAD4(sc, E1371_SRC); 545 if (!to--) { 546 printf("eap: timeout waiting for sample rate" 547 "converter\n"); 548 return; 549 } 550 } while (src & E1371_SRC_RBUSY); 551 } 552 553 int 554 eap1371_src_read(sc, a) 555 struct eap_softc *sc; 556 int a; 557 { 558 int r; 559 560 eap1371_src_wait(sc); 561 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 562 E1371_SRC_DISP2 | E1371_SRC_DISREC); 563 r |= E1371_SRC_ADDR(a); 564 EWRITE4(sc, E1371_SRC, r); 565 r = EREAD4(sc, E1371_SRC) & E1371_SRC_DATAMASK; 566 return r; 567 } 568 569 void 570 eap1371_src_write(sc, a, d) 571 struct eap_softc *sc; 572 int a,d; 573 { 574 int r; 575 576 eap1371_src_wait(sc); 577 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 578 E1371_SRC_DISP2 | E1371_SRC_DISREC); 579 r |= E1371_SRC_RAMWE | E1371_SRC_ADDR(a) | E1371_SRC_DATA(d); 580 EWRITE4(sc, E1371_SRC, r); 581 } 582 583 void 584 eap1371_set_adc_rate(sc, rate) 585 struct eap_softc *sc; 586 int rate; 587 { 588 int freq, n, truncm; 589 int out; 590 591 /* Whatever, it works, so I'll leave it :) */ 592 593 if (rate > 48000) 594 rate = 48000; 595 if (rate < 4000) 596 rate = 4000; 597 n = rate / 3000; 598 if ((1 << n) & SRC_MAGIC) 599 n--; 600 truncm = ((21 * n) - 1) | 1; 601 freq = ((48000 << 15) / rate) * n; 602 if (rate >= 24000) { 603 if (truncm > 239) 604 truncm = 239; 605 out = ESRC_SET_TRUNC((239 - truncm) / 2); 606 } else { 607 if (truncm > 119) 608 truncm = 119; 609 out = ESRC_SMF | ESRC_SET_TRUNC((119 - truncm) / 2); 610 } 611 out |= ESRC_SET_N(n); 612 eap1371_src_write(sc, ESRC_ADC+ESRC_TRUNC_N, out); 613 614 615 out = eap1371_src_read(sc, ESRC_ADC+ESRC_IREGS) & 0xff; 616 eap1371_src_write(sc, ESRC_ADC+ESRC_IREGS, out | 617 ESRC_SET_VFI(freq >> 15)); 618 eap1371_src_write(sc, ESRC_ADC+ESRC_VFF, freq & 0x7fff); 619 eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(n)); 620 eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(n)); 621 } 622 623 void 624 eap1371_set_dac_rate(sc, rate, which) 625 struct eap_softc *sc; 626 int rate; 627 int which; 628 { 629 int dac = (which == 1) ? ESRC_DAC1 : ESRC_DAC2; 630 int freq, r; 631 632 /* Whatever, it works, so I'll leave it :) */ 633 634 if (rate > 48000) 635 rate = 48000; 636 if (rate < 4000) 637 rate = 4000; 638 freq = (rate << 15) / 3000; 639 640 eap1371_src_wait(sc); 641 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | 642 E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC); 643 r |= (which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2; 644 EWRITE4(sc, E1371_SRC, r); 645 r = eap1371_src_read(sc, dac + ESRC_IREGS) & 0x00ff; 646 eap1371_src_write(sc, dac + ESRC_IREGS, r | ((freq >> 5) & 0xfc00)); 647 eap1371_src_write(sc, dac + ESRC_VFF, freq & 0x7fff); 648 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | 649 E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC); 650 r &= ~((which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2); 651 EWRITE4(sc, E1371_SRC, r); 652 } 653 654 void 655 eap_attach(parent, self, aux) 656 struct device *parent; 657 struct device *self; 658 void *aux; 659 { 660 struct eap_softc *sc = (struct eap_softc *)self; 661 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 662 pci_chipset_tag_t pc = pa->pa_pc; 663 char const *intrstr; 664 pci_intr_handle_t ih; 665 pcireg_t csr; 666 mixer_ctrl_t ctl; 667 int i; 668 669 /* Flag if we're "creative" */ 670 sc->sc_1371 = PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97; 671 672 printf(": Ensoniq AudioPCI%s (rev. 0x%02x)\n", 673 sc->sc_1371 ? "97" : "", PCI_REVISION(pa->pa_class)); 674 675 /* Map I/O register */ 676 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 677 &sc->iot, &sc->ioh, NULL, NULL)) { 678 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 679 return; 680 } 681 682 sc->sc_dmatag = pa->pa_dmat; 683 684 /* Enable the device. */ 685 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 686 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 687 csr | PCI_COMMAND_MASTER_ENABLE); 688 689 /* Map and establish the interrupt. */ 690 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 691 pa->pa_intrline, &ih)) { 692 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 693 return; 694 } 695 intrstr = pci_intr_string(pc, ih); 696 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, eap_intr, sc); 697 if (sc->sc_ih == NULL) { 698 printf("%s: couldn't establish interrupt", 699 sc->sc_dev.dv_xname); 700 if (intrstr != NULL) 701 printf(" at %s", intrstr); 702 printf("\n"); 703 return; 704 } 705 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 706 707 if (!sc->sc_1371) { 708 /* Enable interrupts and looping mode. */ 709 /* enable the parts we need */ 710 EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN); 711 EWRITE4(sc, EAP_ICSC, EAP_CDC_EN); 712 713 /* reset codec */ 714 /* normal operation */ 715 /* select codec clocks */ 716 eap_write_codec(sc, AK_RESET, AK_PD); 717 eap_write_codec(sc, AK_RESET, AK_PD | AK_NRST); 718 eap_write_codec(sc, AK_CS, 0x0); 719 720 eap_hw_if.query_devinfo = eap_query_devinfo; 721 eap_hw_if.set_port = eap_mixer_set_port; 722 eap_hw_if.get_port = eap_mixer_get_port; 723 724 /* Enable all relevant mixer switches. */ 725 ctl.dev = EAP_OUTPUT_SELECT; 726 ctl.type = AUDIO_MIXER_SET; 727 ctl.un.mask = 1 << EAP_VOICE_VOL | 1 << EAP_FM_VOL | 728 1 << EAP_CD_VOL | 1 << EAP_LINE_VOL | 1 << EAP_AUX_VOL | 729 1 << EAP_MIC_VOL; 730 eap_hw_if.set_port(sc, &ctl); 731 732 ctl.type = AUDIO_MIXER_VALUE; 733 ctl.un.value.num_channels = 1; 734 for (ctl.dev = EAP_MASTER_VOL; ctl.dev < EAP_MIC_VOL; 735 ctl.dev++) { 736 ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = VOL_0DB; 737 eap_hw_if.set_port(sc, &ctl); 738 } 739 ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = 0; 740 eap_hw_if.set_port(sc, &ctl); 741 ctl.dev = EAP_MIC_PREAMP; 742 ctl.type = AUDIO_MIXER_ENUM; 743 ctl.un.ord = 0; 744 eap_hw_if.set_port(sc, &ctl); 745 ctl.dev = EAP_RECORD_SOURCE; 746 ctl.type = AUDIO_MIXER_SET; 747 ctl.un.mask = 1 << EAP_MIC_VOL; 748 eap_hw_if.set_port(sc, &ctl); 749 } else { 750 int error; 751 752 /* clean slate */ 753 EWRITE4(sc, EAP_SIC, 0); 754 EWRITE4(sc, EAP_ICSC, 0); 755 EWRITE4(sc, E1371_LEGACY, 0); 756 757 /* Reset from es1371's perspective */ 758 EWRITE4(sc, EAP_ICSC, E1371_SYNC_RES); 759 delay(20); 760 EWRITE4(sc, EAP_ICSC, 0); 761 762 /* must properly reprogram sample rate converter, 763 * or it locks up. Set some defaults for the life of the 764 * machine, and set up a sb default sample rate. 765 */ 766 EWRITE4(sc, E1371_SRC, E1371_SRC_DISABLE); 767 for (i=0; i<0x80; i++) 768 eap1371_src_write(sc, i, 0); 769 eap1371_src_write(sc, ESRC_DAC1+ESRC_TRUNC_N, ESRC_SET_N(16)); 770 eap1371_src_write(sc, ESRC_DAC2+ESRC_TRUNC_N, ESRC_SET_N(16)); 771 eap1371_src_write(sc, ESRC_DAC1+ESRC_IREGS, ESRC_SET_VFI(16)); 772 eap1371_src_write(sc, ESRC_DAC2+ESRC_IREGS, ESRC_SET_VFI(16)); 773 eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(16)); 774 eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(16)); 775 eap1371_src_write(sc, ESRC_DAC1_VOLL, ESRC_SET_DAC_VOLI(1)); 776 eap1371_src_write(sc, ESRC_DAC1_VOLR, ESRC_SET_DAC_VOLI(1)); 777 eap1371_src_write(sc, ESRC_DAC2_VOLL, ESRC_SET_DAC_VOLI(1)); 778 eap1371_src_write(sc, ESRC_DAC2_VOLR, ESRC_SET_DAC_VOLI(1)); 779 eap1371_set_adc_rate(sc, 22050); 780 eap1371_set_dac_rate(sc, 22050, 1); 781 eap1371_set_dac_rate(sc, 22050, 2); 782 783 EWRITE4(sc, E1371_SRC, 0); 784 785 /* Reset codec */ 786 787 /* Interrupt enable */ 788 sc->host_if.arg = sc; 789 sc->host_if.attach = eap1371_attach_codec; 790 sc->host_if.read = eap1371_read_codec; 791 sc->host_if.write = eap1371_write_codec; 792 sc->host_if.reset = eap1371_reset_codec; 793 794 if ((error = ac97_attach(&sc->host_if)) == 0) { 795 /* Interrupt enable */ 796 EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN); 797 } else 798 return; 799 800 eap_hw_if.query_devinfo = eap1371_query_devinfo; 801 eap_hw_if.set_port = eap1371_mixer_set_port; 802 eap_hw_if.get_port = eap1371_mixer_get_port; 803 804 /* Just enable the DAC and master volumes by default */ 805 ctl.type = AUDIO_MIXER_ENUM; 806 ctl.un.ord = 0; /* off */ 807 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCoutputs, 808 AudioNmaster, AudioNmute); 809 eap1371_mixer_set_port(sc, &ctl); 810 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCinputs, 811 AudioNdac, AudioNmute); 812 eap1371_mixer_set_port(sc, &ctl); 813 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord, 814 AudioNvolume, AudioNmute); 815 eap1371_mixer_set_port(sc, &ctl); 816 817 818 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord, 819 AudioNsource, NULL); 820 ctl.type = AUDIO_MIXER_ENUM; 821 ctl.un.ord = 0; 822 eap1371_mixer_set_port(sc, &ctl); 823 824 } 825 826 audio_attach_mi(&eap_hw_if, sc, &sc->sc_dev); 827 } 828 829 int 830 eap1371_attach_codec(sc_, codec_if) 831 void *sc_; 832 struct ac97_codec_if *codec_if; 833 { 834 struct eap_softc *sc = sc_; 835 836 sc->codec_if = codec_if; 837 return (0); 838 } 839 840 void 841 eap1371_reset_codec(sc_) 842 void *sc_; 843 { 844 struct eap_softc *sc = sc_; 845 u_int32_t icsc = EREAD4(sc, EAP_ICSC); 846 847 EWRITE4(sc, EAP_ICSC, icsc | E1371_SYNC_RES); 848 delay(100); 849 EWRITE4(sc, EAP_ICSC, icsc & ~E1371_SYNC_RES); 850 851 return; 852 } 853 854 int 855 eap_intr(p) 856 void *p; 857 { 858 struct eap_softc *sc = p; 859 u_int32_t intr, sic; 860 861 intr = EREAD4(sc, EAP_ICSS); 862 if (!(intr & EAP_INTR)) 863 return (0); 864 sic = EREAD4(sc, EAP_SIC); 865 DPRINTFN(5, ("eap_intr: ICSS=0x%08x, SIC=0x%08x\n", intr, sic)); 866 if (intr & EAP_I_ADC) { 867 /* 868 * XXX This is a hack! 869 * The EAP chip sometimes generates the recording interrupt 870 * while it is still transferring the data. To make sure 871 * it has all arrived we busy wait until the count is right. 872 * The transfer we are waiting for is 8 longwords. 873 */ 874 int s, nw, n; 875 EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE); 876 s = EREAD4(sc, EAP_ADC_CSR); 877 nw = ((s & 0xffff) + 1) >> 2; /* # of words in DMA */ 878 n = 0; 879 while (((EREAD4(sc, EAP_ADC_SIZE) >> 16) + 8) % nw == 0) { 880 delay(10); 881 if (++n > 100) { 882 printf("eapintr: dma fix timeout"); 883 break; 884 } 885 } 886 /* Continue with normal interrupt handling. */ 887 EWRITE4(sc, EAP_SIC, sic & ~EAP_R1_INTR_EN); 888 EWRITE4(sc, EAP_SIC, sic); 889 if (sc->sc_rintr) 890 sc->sc_rintr(sc->sc_rarg); 891 } 892 if (intr & EAP_I_DAC2) { 893 EWRITE4(sc, EAP_SIC, sic & ~EAP_P2_INTR_EN); 894 EWRITE4(sc, EAP_SIC, sic); 895 if (sc->sc_pintr) 896 sc->sc_pintr(sc->sc_parg); 897 } 898 return (1); 899 } 900 901 int 902 eap_allocmem(sc, size, align, p) 903 struct eap_softc *sc; 904 size_t size; 905 size_t align; 906 struct eap_dma *p; 907 { 908 int error; 909 910 p->size = size; 911 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 912 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 913 &p->nsegs, BUS_DMA_NOWAIT); 914 if (error) 915 return (error); 916 917 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 918 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 919 if (error) 920 goto free; 921 922 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 923 0, BUS_DMA_NOWAIT, &p->map); 924 if (error) 925 goto unmap; 926 927 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 928 BUS_DMA_NOWAIT); 929 if (error) 930 goto destroy; 931 return (0); 932 933 destroy: 934 bus_dmamap_destroy(sc->sc_dmatag, p->map); 935 unmap: 936 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 937 free: 938 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 939 return (error); 940 } 941 942 int 943 eap_freemem(sc, p) 944 struct eap_softc *sc; 945 struct eap_dma *p; 946 { 947 bus_dmamap_unload(sc->sc_dmatag, p->map); 948 bus_dmamap_destroy(sc->sc_dmatag, p->map); 949 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 950 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 951 return (0); 952 } 953 954 int 955 eap_open(addr, flags) 956 void *addr; 957 int flags; 958 { 959 return (0); 960 } 961 962 /* 963 * Close function is called at splaudio(). 964 */ 965 void 966 eap_close(addr) 967 void *addr; 968 { 969 struct eap_softc *sc = addr; 970 971 eap_halt_output(sc); 972 eap_halt_input(sc); 973 974 sc->sc_pintr = 0; 975 sc->sc_rintr = 0; 976 } 977 978 int 979 eap_query_encoding(addr, fp) 980 void *addr; 981 struct audio_encoding *fp; 982 { 983 switch (fp->index) { 984 case 0: 985 strcpy(fp->name, AudioEulinear); 986 fp->encoding = AUDIO_ENCODING_ULINEAR; 987 fp->precision = 8; 988 fp->flags = 0; 989 return (0); 990 case 1: 991 strcpy(fp->name, AudioEmulaw); 992 fp->encoding = AUDIO_ENCODING_ULAW; 993 fp->precision = 8; 994 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 995 return (0); 996 case 2: 997 strcpy(fp->name, AudioEalaw); 998 fp->encoding = AUDIO_ENCODING_ALAW; 999 fp->precision = 8; 1000 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1001 return (0); 1002 case 3: 1003 strcpy(fp->name, AudioEslinear); 1004 fp->encoding = AUDIO_ENCODING_SLINEAR; 1005 fp->precision = 8; 1006 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1007 return (0); 1008 case 4: 1009 strcpy(fp->name, AudioEslinear_le); 1010 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1011 fp->precision = 16; 1012 fp->flags = 0; 1013 return (0); 1014 case 5: 1015 strcpy(fp->name, AudioEulinear_le); 1016 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1017 fp->precision = 16; 1018 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1019 return (0); 1020 case 6: 1021 strcpy(fp->name, AudioEslinear_be); 1022 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1023 fp->precision = 16; 1024 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1025 return (0); 1026 case 7: 1027 strcpy(fp->name, AudioEulinear_be); 1028 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1029 fp->precision = 16; 1030 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1031 return (0); 1032 default: 1033 return (EINVAL); 1034 } 1035 } 1036 1037 int 1038 eap_set_params(addr, setmode, usemode, play, rec) 1039 void *addr; 1040 int setmode, usemode; 1041 struct audio_params *play, *rec; 1042 { 1043 struct eap_softc *sc = addr; 1044 struct audio_params *p; 1045 int mode; 1046 u_int32_t div; 1047 1048 /* 1049 * The es1370 only has one clock, so make the sample rates match. 1050 */ 1051 if (!sc->sc_1371) { 1052 if (play->sample_rate != rec->sample_rate && 1053 usemode == (AUMODE_PLAY | AUMODE_RECORD)) { 1054 if (setmode == AUMODE_PLAY) { 1055 rec->sample_rate = play->sample_rate; 1056 setmode |= AUMODE_RECORD; 1057 } else if (setmode == AUMODE_RECORD) { 1058 play->sample_rate = rec->sample_rate; 1059 setmode |= AUMODE_PLAY; 1060 } else 1061 return (EINVAL); 1062 } 1063 } 1064 1065 for (mode = AUMODE_RECORD; mode != -1; 1066 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1067 if ((setmode & mode) == 0) 1068 continue; 1069 1070 p = mode == AUMODE_PLAY ? play : rec; 1071 1072 if (p->sample_rate < 4000 || p->sample_rate > 48000 || 1073 (p->precision != 8 && p->precision != 16) || 1074 (p->channels != 1 && p->channels != 2)) 1075 return (EINVAL); 1076 1077 p->factor = 1; 1078 p->sw_code = 0; 1079 switch (p->encoding) { 1080 case AUDIO_ENCODING_SLINEAR_BE: 1081 if (p->precision == 16) 1082 p->sw_code = swap_bytes; 1083 else 1084 p->sw_code = change_sign8; 1085 break; 1086 case AUDIO_ENCODING_SLINEAR_LE: 1087 if (p->precision != 16) 1088 p->sw_code = change_sign8; 1089 break; 1090 case AUDIO_ENCODING_ULINEAR_BE: 1091 if (p->precision == 16) { 1092 if (mode == AUMODE_PLAY) 1093 p->sw_code = swap_bytes_change_sign16; 1094 else 1095 p->sw_code = change_sign16_swap_bytes; 1096 } 1097 break; 1098 case AUDIO_ENCODING_ULINEAR_LE: 1099 if (p->precision == 16) 1100 p->sw_code = change_sign16; 1101 break; 1102 case AUDIO_ENCODING_ULAW: 1103 if (mode == AUMODE_PLAY) { 1104 p->factor = 2; 1105 p->sw_code = mulaw_to_slinear16; 1106 } else 1107 p->sw_code = ulinear8_to_mulaw; 1108 break; 1109 case AUDIO_ENCODING_ALAW: 1110 if (mode == AUMODE_PLAY) { 1111 p->factor = 2; 1112 p->sw_code = alaw_to_slinear16; 1113 } else 1114 p->sw_code = ulinear8_to_alaw; 1115 break; 1116 default: 1117 return (EINVAL); 1118 } 1119 } 1120 1121 if (sc->sc_1371) { 1122 eap1371_set_dac_rate(sc, play->sample_rate, 1); 1123 eap1371_set_dac_rate(sc, play->sample_rate, 2); 1124 eap1371_set_adc_rate(sc, rec->sample_rate); 1125 } else { 1126 /* Set the speed */ 1127 DPRINTFN(2, ("eap_set_params: old ICSC = 0x%08x\n", 1128 EREAD4(sc, EAP_ICSC))); 1129 div = EREAD4(sc, EAP_ICSC) & ~EAP_PCLKBITS; 1130 /* 1131 * XXX 1132 * The -2 isn't documented, but seemed to make the wall 1133 * time match 1134 * what I expect. - mycroft 1135 */ 1136 if (usemode == AUMODE_RECORD) 1137 div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ / 1138 rec->sample_rate - 2); 1139 else 1140 div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ / 1141 play->sample_rate - 2); 1142 div |= EAP_CCB_INTRM; 1143 EWRITE4(sc, EAP_ICSC, div); 1144 DPRINTFN(2, ("eap_set_params: set ICSC = 0x%08x\n", div)); 1145 } 1146 1147 return (0); 1148 } 1149 1150 int 1151 eap_round_blocksize(addr, blk) 1152 void *addr; 1153 int blk; 1154 { 1155 return (blk & -32); /* keep good alignment */ 1156 } 1157 1158 int 1159 eap_trigger_output(addr, start, end, blksize, intr, arg, param) 1160 void *addr; 1161 void *start, *end; 1162 int blksize; 1163 void (*intr) __P((void *)); 1164 void *arg; 1165 struct audio_params *param; 1166 { 1167 struct eap_softc *sc = addr; 1168 struct eap_dma *p; 1169 u_int32_t icsc, sic; 1170 int sampshift; 1171 1172 #ifdef DIAGNOSTIC 1173 if (sc->sc_prun) 1174 panic("eap_trigger_output: already running"); 1175 sc->sc_prun = 1; 1176 #endif 1177 1178 DPRINTFN(1, ("eap_trigger_output: sc=%p start=%p end=%p " 1179 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1180 sc->sc_pintr = intr; 1181 sc->sc_parg = arg; 1182 1183 icsc = EREAD4(sc, EAP_ICSC); 1184 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN); 1185 1186 sic = EREAD4(sc, EAP_SIC); 1187 sic &= ~(EAP_P2_S_EB | EAP_P2_S_MB | EAP_INC_BITS); 1188 sic |= EAP_SET_P2_ST_INC(0) | EAP_SET_P2_END_INC(param->precision * param->factor / 8); 1189 sampshift = 0; 1190 if (param->precision * param->factor == 16) { 1191 sic |= EAP_P2_S_EB; 1192 sampshift++; 1193 } 1194 if (param->channels == 2) { 1195 sic |= EAP_P2_S_MB; 1196 sampshift++; 1197 } 1198 EWRITE4(sc, EAP_SIC, sic); 1199 1200 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1201 ; 1202 if (!p) { 1203 printf("eap_trigger_output: bad addr %p\n", start); 1204 return (EINVAL); 1205 } 1206 1207 DPRINTF(("eap_trigger_output: DAC2_ADDR=0x%x, DAC2_SIZE=0x%x\n", 1208 (int)DMAADDR(p), 1209 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1))); 1210 EWRITE4(sc, EAP_MEMPAGE, EAP_DAC_PAGE); 1211 EWRITE4(sc, EAP_DAC2_ADDR, DMAADDR(p)); 1212 EWRITE4(sc, EAP_DAC2_SIZE, 1213 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)); 1214 1215 EWRITE2(sc, EAP_DAC2_CSR, (blksize >> sampshift) - 1); 1216 1217 EWRITE4(sc, EAP_ICSC, icsc | EAP_DAC2_EN); 1218 1219 DPRINTFN(1, ("eap_trigger_output: set ICSC = 0x%08x\n", icsc)); 1220 1221 return (0); 1222 } 1223 1224 int 1225 eap_trigger_input(addr, start, end, blksize, intr, arg, param) 1226 void *addr; 1227 void *start, *end; 1228 int blksize; 1229 void (*intr) __P((void *)); 1230 void *arg; 1231 struct audio_params *param; 1232 { 1233 struct eap_softc *sc = addr; 1234 struct eap_dma *p; 1235 u_int32_t icsc, sic; 1236 int sampshift; 1237 1238 #ifdef DIAGNOSTIC 1239 if (sc->sc_rrun) 1240 panic("eap_trigger_input: already running"); 1241 sc->sc_rrun = 1; 1242 #endif 1243 1244 DPRINTFN(1, ("eap_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 1245 addr, start, end, blksize, intr, arg)); 1246 sc->sc_rintr = intr; 1247 sc->sc_rarg = arg; 1248 1249 icsc = EREAD4(sc, EAP_ICSC); 1250 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN); 1251 1252 sic = EREAD4(sc, EAP_SIC); 1253 sic &= ~(EAP_R1_S_EB | EAP_R1_S_MB); 1254 sampshift = 0; 1255 if (param->precision * param->factor == 16) { 1256 sic |= EAP_R1_S_EB; 1257 sampshift++; 1258 } 1259 if (param->channels == 2) { 1260 sic |= EAP_R1_S_MB; 1261 sampshift++; 1262 } 1263 EWRITE4(sc, EAP_SIC, sic); 1264 1265 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1266 ; 1267 if (!p) { 1268 printf("eap_trigger_input: bad addr %p\n", start); 1269 return (EINVAL); 1270 } 1271 1272 DPRINTF(("eap_trigger_input: ADC_ADDR=0x%x, ADC_SIZE=0x%x\n", 1273 (int)DMAADDR(p), 1274 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1))); 1275 EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE); 1276 EWRITE4(sc, EAP_ADC_ADDR, DMAADDR(p)); 1277 EWRITE4(sc, EAP_ADC_SIZE, 1278 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)); 1279 1280 EWRITE2(sc, EAP_ADC_CSR, (blksize >> sampshift) - 1); 1281 1282 EWRITE4(sc, EAP_ICSC, icsc | EAP_ADC_EN); 1283 1284 DPRINTFN(1, ("eap_trigger_input: set ICSC = 0x%08x\n", icsc)); 1285 1286 return (0); 1287 } 1288 1289 int 1290 eap_halt_output(addr) 1291 void *addr; 1292 { 1293 struct eap_softc *sc = addr; 1294 u_int32_t icsc; 1295 1296 DPRINTF(("eap: eap_halt_output\n")); 1297 icsc = EREAD4(sc, EAP_ICSC); 1298 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN); 1299 #ifdef DIAGNOSTIC 1300 sc->sc_prun = 0; 1301 #endif 1302 return (0); 1303 } 1304 1305 int 1306 eap_halt_input(addr) 1307 void *addr; 1308 { 1309 struct eap_softc *sc = addr; 1310 u_int32_t icsc; 1311 1312 DPRINTF(("eap: eap_halt_input\n")); 1313 icsc = EREAD4(sc, EAP_ICSC); 1314 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN); 1315 #ifdef DIAGNOSTIC 1316 sc->sc_rrun = 0; 1317 #endif 1318 return (0); 1319 } 1320 1321 int 1322 eap_getdev(addr, retp) 1323 void *addr; 1324 struct audio_device *retp; 1325 { 1326 *retp = eap_device; 1327 return (0); 1328 } 1329 1330 int 1331 eap1371_mixer_set_port(addr, cp) 1332 void *addr; 1333 mixer_ctrl_t *cp; 1334 { 1335 struct eap_softc *sc = addr; 1336 1337 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 1338 } 1339 1340 int 1341 eap1371_mixer_get_port(addr, cp) 1342 void *addr; 1343 mixer_ctrl_t *cp; 1344 { 1345 struct eap_softc *sc = addr; 1346 1347 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 1348 } 1349 1350 int 1351 eap1371_query_devinfo(addr, dip) 1352 void *addr; 1353 mixer_devinfo_t *dip; 1354 { 1355 struct eap_softc *sc = addr; 1356 1357 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip)); 1358 } 1359 1360 int 1361 eap1371_get_portnum_by_name(sc, class, device, qualifier) 1362 struct eap_softc *sc; 1363 char *class, *device, *qualifier; 1364 { 1365 return (sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if, class, 1366 device, qualifier)); 1367 } 1368 1369 void 1370 eap_set_mixer(sc, a, d) 1371 struct eap_softc *sc; 1372 int a, d; 1373 { 1374 eap_write_codec(sc, a, d); 1375 1376 sc->sc_port[a] = d; 1377 DPRINTFN(1, ("eap_mixer_set_port port 0x%02x = 0x%02x\n", a, d)); 1378 } 1379 1380 int 1381 eap_mixer_set_port(addr, cp) 1382 void *addr; 1383 mixer_ctrl_t *cp; 1384 { 1385 struct eap_softc *sc = addr; 1386 int lval, rval, l, r, la, ra; 1387 int l1, r1, l2, r2, m, o1, o2; 1388 1389 if (cp->dev == EAP_RECORD_SOURCE) { 1390 if (cp->type != AUDIO_MIXER_SET) 1391 return (EINVAL); 1392 m = sc->sc_record_source = cp->un.mask; 1393 l1 = l2 = r1 = r2 = 0; 1394 if (m & (1 << EAP_VOICE_VOL)) 1395 l2 |= AK_M_VOICE, r2 |= AK_M_VOICE; 1396 if (m & (1 << EAP_FM_VOL)) 1397 l1 |= AK_M_FM_L, r1 |= AK_M_FM_R; 1398 if (m & (1 << EAP_CD_VOL)) 1399 l1 |= AK_M_CD_L, r1 |= AK_M_CD_R; 1400 if (m & (1 << EAP_LINE_VOL)) 1401 l1 |= AK_M_LINE_L, r1 |= AK_M_LINE_R; 1402 if (m & (1 << EAP_AUX_VOL)) 1403 l2 |= AK_M2_AUX_L, r2 |= AK_M2_AUX_R; 1404 if (m & (1 << EAP_MIC_VOL)) 1405 l2 |= AK_M_TMIC, r2 |= AK_M_TMIC; 1406 eap_set_mixer(sc, AK_IN_MIXER1_L, l1); 1407 eap_set_mixer(sc, AK_IN_MIXER1_R, r1); 1408 eap_set_mixer(sc, AK_IN_MIXER2_L, l2); 1409 eap_set_mixer(sc, AK_IN_MIXER2_R, r2); 1410 return (0); 1411 } 1412 if (cp->dev == EAP_OUTPUT_SELECT) { 1413 if (cp->type != AUDIO_MIXER_SET) 1414 return (EINVAL); 1415 m = sc->sc_output_source = cp->un.mask; 1416 o1 = o2 = 0; 1417 if (m & (1 << EAP_VOICE_VOL)) 1418 o2 |= AK_M_VOICE_L | AK_M_VOICE_R; 1419 if (m & (1 << EAP_FM_VOL)) 1420 o1 |= AK_M_FM_L | AK_M_FM_R; 1421 if (m & (1 << EAP_CD_VOL)) 1422 o1 |= AK_M_CD_L | AK_M_CD_R; 1423 if (m & (1 << EAP_LINE_VOL)) 1424 o1 |= AK_M_LINE_L | AK_M_LINE_R; 1425 if (m & (1 << EAP_AUX_VOL)) 1426 o2 |= AK_M_AUX_L | AK_M_AUX_R; 1427 if (m & (1 << EAP_MIC_VOL)) 1428 o1 |= AK_M_MIC; 1429 eap_set_mixer(sc, AK_OUT_MIXER1, o1); 1430 eap_set_mixer(sc, AK_OUT_MIXER2, o2); 1431 return (0); 1432 } 1433 if (cp->dev == EAP_MIC_PREAMP) { 1434 if (cp->type != AUDIO_MIXER_ENUM) 1435 return (EINVAL); 1436 if (cp->un.ord != 0 && cp->un.ord != 1) 1437 return (EINVAL); 1438 sc->sc_mic_preamp = cp->un.ord; 1439 eap_set_mixer(sc, AK_MGAIN, cp->un.ord); 1440 return (0); 1441 } 1442 if (cp->type != AUDIO_MIXER_VALUE) 1443 return (EINVAL); 1444 if (cp->un.value.num_channels == 1) 1445 lval = rval = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1446 else if (cp->un.value.num_channels == 2) { 1447 lval = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1448 rval = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1449 } else 1450 return (EINVAL); 1451 ra = -1; 1452 switch (cp->dev) { 1453 case EAP_MASTER_VOL: 1454 l = VOL_TO_ATT5(lval); 1455 r = VOL_TO_ATT5(rval); 1456 la = AK_MASTER_L; 1457 ra = AK_MASTER_R; 1458 break; 1459 case EAP_MIC_VOL: 1460 if (cp->un.value.num_channels != 1) 1461 return (EINVAL); 1462 la = AK_MIC; 1463 goto lr; 1464 case EAP_VOICE_VOL: 1465 la = AK_VOICE_L; 1466 ra = AK_VOICE_R; 1467 goto lr; 1468 case EAP_FM_VOL: 1469 la = AK_FM_L; 1470 ra = AK_FM_R; 1471 goto lr; 1472 case EAP_CD_VOL: 1473 la = AK_CD_L; 1474 ra = AK_CD_R; 1475 goto lr; 1476 case EAP_LINE_VOL: 1477 la = AK_LINE_L; 1478 ra = AK_LINE_R; 1479 goto lr; 1480 case EAP_AUX_VOL: 1481 la = AK_AUX_L; 1482 ra = AK_AUX_R; 1483 lr: 1484 l = VOL_TO_GAIN5(lval); 1485 r = VOL_TO_GAIN5(rval); 1486 break; 1487 default: 1488 return (EINVAL); 1489 } 1490 eap_set_mixer(sc, la, l); 1491 if (ra >= 0) { 1492 eap_set_mixer(sc, ra, r); 1493 } 1494 return (0); 1495 } 1496 1497 int 1498 eap_mixer_get_port(addr, cp) 1499 void *addr; 1500 mixer_ctrl_t *cp; 1501 { 1502 struct eap_softc *sc = addr; 1503 int la, ra, l, r; 1504 1505 switch (cp->dev) { 1506 case EAP_RECORD_SOURCE: 1507 if (cp->type != AUDIO_MIXER_SET) 1508 return (EINVAL); 1509 cp->un.mask = sc->sc_record_source; 1510 return (0); 1511 case EAP_OUTPUT_SELECT: 1512 if (cp->type != AUDIO_MIXER_SET) 1513 return (EINVAL); 1514 cp->un.mask = sc->sc_output_source; 1515 return (0); 1516 case EAP_MIC_PREAMP: 1517 if (cp->type != AUDIO_MIXER_ENUM) 1518 return (EINVAL); 1519 cp->un.ord = sc->sc_mic_preamp; 1520 return (0); 1521 case EAP_MASTER_VOL: 1522 l = ATT5_TO_VOL(sc->sc_port[AK_MASTER_L]); 1523 r = ATT5_TO_VOL(sc->sc_port[AK_MASTER_R]); 1524 break; 1525 case EAP_MIC_VOL: 1526 if (cp->un.value.num_channels != 1) 1527 return (EINVAL); 1528 la = ra = AK_MIC; 1529 goto lr; 1530 case EAP_VOICE_VOL: 1531 la = AK_VOICE_L; 1532 ra = AK_VOICE_R; 1533 goto lr; 1534 case EAP_FM_VOL: 1535 la = AK_FM_L; 1536 ra = AK_FM_R; 1537 goto lr; 1538 case EAP_CD_VOL: 1539 la = AK_CD_L; 1540 ra = AK_CD_R; 1541 goto lr; 1542 case EAP_LINE_VOL: 1543 la = AK_LINE_L; 1544 ra = AK_LINE_R; 1545 goto lr; 1546 case EAP_AUX_VOL: 1547 la = AK_AUX_L; 1548 ra = AK_AUX_R; 1549 lr: 1550 l = GAIN5_TO_VOL(sc->sc_port[la]); 1551 r = GAIN5_TO_VOL(sc->sc_port[ra]); 1552 break; 1553 default: 1554 return (EINVAL); 1555 } 1556 if (cp->un.value.num_channels == 1) 1557 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2; 1558 else if (cp->un.value.num_channels == 2) { 1559 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l; 1560 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r; 1561 } else 1562 return (EINVAL); 1563 return (0); 1564 } 1565 1566 int 1567 eap_query_devinfo(addr, dip) 1568 void *addr; 1569 mixer_devinfo_t *dip; 1570 { 1571 switch (dip->index) { 1572 case EAP_MASTER_VOL: 1573 dip->type = AUDIO_MIXER_VALUE; 1574 dip->mixer_class = EAP_OUTPUT_CLASS; 1575 dip->prev = dip->next = AUDIO_MIXER_LAST; 1576 strcpy(dip->label.name, AudioNmaster); 1577 dip->un.v.num_channels = 2; 1578 strcpy(dip->un.v.units.name, AudioNvolume); 1579 return (0); 1580 case EAP_VOICE_VOL: 1581 dip->type = AUDIO_MIXER_VALUE; 1582 dip->mixer_class = EAP_INPUT_CLASS; 1583 dip->prev = AUDIO_MIXER_LAST; 1584 dip->next = AUDIO_MIXER_LAST; 1585 strcpy(dip->label.name, AudioNdac); 1586 dip->un.v.num_channels = 2; 1587 strcpy(dip->un.v.units.name, AudioNvolume); 1588 return (0); 1589 case EAP_FM_VOL: 1590 dip->type = AUDIO_MIXER_VALUE; 1591 dip->mixer_class = EAP_INPUT_CLASS; 1592 dip->prev = AUDIO_MIXER_LAST; 1593 dip->next = AUDIO_MIXER_LAST; 1594 strcpy(dip->label.name, AudioNfmsynth); 1595 dip->un.v.num_channels = 2; 1596 strcpy(dip->un.v.units.name, AudioNvolume); 1597 return (0); 1598 case EAP_CD_VOL: 1599 dip->type = AUDIO_MIXER_VALUE; 1600 dip->mixer_class = EAP_INPUT_CLASS; 1601 dip->prev = AUDIO_MIXER_LAST; 1602 dip->next = AUDIO_MIXER_LAST; 1603 strcpy(dip->label.name, AudioNcd); 1604 dip->un.v.num_channels = 2; 1605 strcpy(dip->un.v.units.name, AudioNvolume); 1606 return (0); 1607 case EAP_LINE_VOL: 1608 dip->type = AUDIO_MIXER_VALUE; 1609 dip->mixer_class = EAP_INPUT_CLASS; 1610 dip->prev = AUDIO_MIXER_LAST; 1611 dip->next = AUDIO_MIXER_LAST; 1612 strcpy(dip->label.name, AudioNline); 1613 dip->un.v.num_channels = 2; 1614 strcpy(dip->un.v.units.name, AudioNvolume); 1615 return (0); 1616 case EAP_AUX_VOL: 1617 dip->type = AUDIO_MIXER_VALUE; 1618 dip->mixer_class = EAP_INPUT_CLASS; 1619 dip->prev = AUDIO_MIXER_LAST; 1620 dip->next = AUDIO_MIXER_LAST; 1621 strcpy(dip->label.name, AudioNaux); 1622 dip->un.v.num_channels = 2; 1623 strcpy(dip->un.v.units.name, AudioNvolume); 1624 return (0); 1625 case EAP_MIC_VOL: 1626 dip->type = AUDIO_MIXER_VALUE; 1627 dip->mixer_class = EAP_INPUT_CLASS; 1628 dip->prev = AUDIO_MIXER_LAST; 1629 dip->next = EAP_MIC_PREAMP; 1630 strcpy(dip->label.name, AudioNmicrophone); 1631 dip->un.v.num_channels = 1; 1632 strcpy(dip->un.v.units.name, AudioNvolume); 1633 return (0); 1634 case EAP_RECORD_SOURCE: 1635 dip->mixer_class = EAP_RECORD_CLASS; 1636 dip->prev = dip->next = AUDIO_MIXER_LAST; 1637 strcpy(dip->label.name, AudioNsource); 1638 dip->type = AUDIO_MIXER_SET; 1639 dip->un.s.num_mem = 6; 1640 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 1641 dip->un.s.member[0].mask = 1 << EAP_MIC_VOL; 1642 strcpy(dip->un.s.member[1].label.name, AudioNcd); 1643 dip->un.s.member[1].mask = 1 << EAP_CD_VOL; 1644 strcpy(dip->un.s.member[2].label.name, AudioNline); 1645 dip->un.s.member[2].mask = 1 << EAP_LINE_VOL; 1646 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1647 dip->un.s.member[3].mask = 1 << EAP_FM_VOL; 1648 strcpy(dip->un.s.member[4].label.name, AudioNaux); 1649 dip->un.s.member[4].mask = 1 << EAP_AUX_VOL; 1650 strcpy(dip->un.s.member[5].label.name, AudioNdac); 1651 dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL; 1652 return (0); 1653 case EAP_OUTPUT_SELECT: 1654 dip->mixer_class = EAP_OUTPUT_CLASS; 1655 dip->prev = dip->next = AUDIO_MIXER_LAST; 1656 strcpy(dip->label.name, AudioNselect); 1657 dip->type = AUDIO_MIXER_SET; 1658 dip->un.s.num_mem = 6; 1659 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 1660 dip->un.s.member[0].mask = 1 << EAP_MIC_VOL; 1661 strcpy(dip->un.s.member[1].label.name, AudioNcd); 1662 dip->un.s.member[1].mask = 1 << EAP_CD_VOL; 1663 strcpy(dip->un.s.member[2].label.name, AudioNline); 1664 dip->un.s.member[2].mask = 1 << EAP_LINE_VOL; 1665 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1666 dip->un.s.member[3].mask = 1 << EAP_FM_VOL; 1667 strcpy(dip->un.s.member[4].label.name, AudioNaux); 1668 dip->un.s.member[4].mask = 1 << EAP_AUX_VOL; 1669 strcpy(dip->un.s.member[5].label.name, AudioNdac); 1670 dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL; 1671 return (0); 1672 case EAP_MIC_PREAMP: 1673 dip->type = AUDIO_MIXER_ENUM; 1674 dip->mixer_class = EAP_INPUT_CLASS; 1675 dip->prev = EAP_MIC_VOL; 1676 dip->next = AUDIO_MIXER_LAST; 1677 strcpy(dip->label.name, AudioNpreamp); 1678 dip->un.e.num_mem = 2; 1679 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1680 dip->un.e.member[0].ord = 0; 1681 strcpy(dip->un.e.member[1].label.name, AudioNon); 1682 dip->un.e.member[1].ord = 1; 1683 return (0); 1684 case EAP_OUTPUT_CLASS: 1685 dip->type = AUDIO_MIXER_CLASS; 1686 dip->mixer_class = EAP_OUTPUT_CLASS; 1687 dip->next = dip->prev = AUDIO_MIXER_LAST; 1688 strcpy(dip->label.name, AudioCoutputs); 1689 return (0); 1690 case EAP_RECORD_CLASS: 1691 dip->type = AUDIO_MIXER_CLASS; 1692 dip->mixer_class = EAP_RECORD_CLASS; 1693 dip->next = dip->prev = AUDIO_MIXER_LAST; 1694 strcpy(dip->label.name, AudioCrecord); 1695 return (0); 1696 case EAP_INPUT_CLASS: 1697 dip->type = AUDIO_MIXER_CLASS; 1698 dip->mixer_class = EAP_INPUT_CLASS; 1699 dip->next = dip->prev = AUDIO_MIXER_LAST; 1700 strcpy(dip->label.name, AudioCinputs); 1701 return (0); 1702 } 1703 return (ENXIO); 1704 } 1705 1706 void * 1707 eap_malloc(addr, direction, size, pool, flags) 1708 void *addr; 1709 int direction; 1710 size_t size; 1711 int pool, flags; 1712 { 1713 struct eap_softc *sc = addr; 1714 struct eap_dma *p; 1715 int error; 1716 1717 p = malloc(sizeof(*p), pool, flags); 1718 if (!p) 1719 return (0); 1720 error = eap_allocmem(sc, size, 16, p); 1721 if (error) { 1722 free(p, pool); 1723 return (0); 1724 } 1725 p->next = sc->sc_dmas; 1726 sc->sc_dmas = p; 1727 return (KERNADDR(p)); 1728 } 1729 1730 void 1731 eap_free(addr, ptr, pool) 1732 void *addr; 1733 void *ptr; 1734 int pool; 1735 { 1736 struct eap_softc *sc = addr; 1737 struct eap_dma **pp, *p; 1738 1739 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1740 if (KERNADDR(p) == ptr) { 1741 eap_freemem(sc, p); 1742 *pp = p->next; 1743 free(p, pool); 1744 return; 1745 } 1746 } 1747 } 1748 1749 size_t 1750 eap_round_buffersize(addr, direction, size) 1751 void *addr; 1752 int direction; 1753 size_t size; 1754 { 1755 return (size); 1756 } 1757 1758 int 1759 eap_mappage(addr, mem, off, prot) 1760 void *addr; 1761 void *mem; 1762 int off; 1763 int prot; 1764 { 1765 struct eap_softc *sc = addr; 1766 struct eap_dma *p; 1767 1768 if (off < 0) 1769 return (-1); 1770 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1771 ; 1772 if (!p) 1773 return (-1); 1774 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, 1775 off, prot, BUS_DMA_WAITOK)); 1776 } 1777 1778 int 1779 eap_get_props(addr) 1780 void *addr; 1781 { 1782 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1783 AUDIO_PROP_FULLDUPLEX); 1784 } 1785
Indexes created Sat Oct 11 19:10:01 GMT 2025