eap.c revision 1.33
1 /* $NetBSD: eap.c,v 1.33 2000/03/06 03:18:11 perry Exp $ */ 2 /* $OpenBSD: eap.c,v 1.6 1999/10/05 19:24:42 csapuntz Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson <augustss (at) netbsd.org> and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Debugging: Andreas Gustafsson <gson (at) araneus.fi> 42 * Testing: Chuck Cranor <chuck (at) maria.wustl.edu> 43 * Phil Nelson <phil (at) cs.wwu.edu> 44 * 45 * ES1371/AC97: Ezra Story <ezy (at) panix.com> 46 */ 47 48 /* 49 * Ensoniq ES1370 + AK4531 and ES1371/ES1373 + AC97 50 * 51 * Documentation links: 52 * 53 * http://www.ensoniq.com/multimedia/semi_html/html/es1370.zip 54 * ftp://ftp.alsa-project.org/pub/manuals/asahi_kasei/4531.pdf 55 * http://www.ensoniq.com/multimedia/semi_html/html/es1371.zip 56 * ftp://download.intel.com/pc-supp/platform/ac97/ac97r21.pdf 57 */ 58 59 60 #include "midi.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/kernel.h> 65 #include <sys/fcntl.h> 66 #include <sys/malloc.h> 67 #include <sys/device.h> 68 69 #include <dev/pci/pcidevs.h> 70 #include <dev/pci/pcivar.h> 71 72 #include <sys/audioio.h> 73 #include <dev/audio_if.h> 74 #include <dev/midi_if.h> 75 #include <dev/mulaw.h> 76 #include <dev/auconv.h> 77 #include <dev/ic/ac97.h> 78 79 #include <machine/bus.h> 80 81 #define PCI_CBIO 0x10 82 83 #define EAP_ICSC 0x00 /* interrupt / chip select control */ 84 #define EAP_SERR_DISABLE 0x00000001 85 #define EAP_CDC_EN 0x00000002 86 #define EAP_JYSTK_EN 0x00000004 87 #define EAP_UART_EN 0x00000008 88 #define EAP_ADC_EN 0x00000010 89 #define EAP_DAC2_EN 0x00000020 90 #define EAP_DAC1_EN 0x00000040 91 #define EAP_BREQ 0x00000080 92 #define EAP_XTCL0 0x00000100 93 #define EAP_M_CB 0x00000200 94 #define EAP_CCB_INTRM 0x00000400 95 #define EAP_DAC_SYNC 0x00000800 96 #define EAP_WTSRSEL 0x00003000 97 #define EAP_WTSRSEL_5 0x00000000 98 #define EAP_WTSRSEL_11 0x00001000 99 #define EAP_WTSRSEL_22 0x00002000 100 #define EAP_WTSRSEL_44 0x00003000 101 #define EAP_M_SBB 0x00004000 102 #define EAP_MSFMTSEL 0x00008000 103 #define EAP_SET_PCLKDIV(n) (((n)&0x1fff)<<16) 104 #define EAP_GET_PCLKDIV(n) (((n)>>16)&0x1fff) 105 #define EAP_PCLKBITS 0x1fff0000 106 #define EAP_XTCL1 0x40000000 107 #define EAP_ADC_STOP 0x80000000 108 #define E1371_SYNC_RES (1<<14) 109 110 #define EAP_ICSS 0x04 /* interrupt / chip select status */ 111 #define EAP_I_ADC 0x00000001 112 #define EAP_I_DAC2 0x00000002 113 #define EAP_I_DAC1 0x00000004 114 #define EAP_I_UART 0x00000008 115 #define EAP_I_MCCB 0x00000010 116 #define EAP_VC 0x00000060 117 #define EAP_CWRIP 0x00000100 118 #define EAP_CBUSY 0x00000200 119 #define EAP_CSTAT 0x00000400 120 #define EAP_INTR 0x80000000 121 122 #define EAP_UART_DATA 0x08 123 #define EAP_UART_STATUS 0x09 124 #define EAP_US_RXRDY 0x01 125 #define EAP_US_TXRDY 0x02 126 #define EAP_US_TXINT 0x04 127 #define EAP_US_RXINT 0x80 128 #define EAP_UART_CONTROL 0x09 129 #define EAP_UC_CNTRL 0x03 130 #define EAP_UC_TXINTEN 0x20 131 #define EAP_UC_RXINTEN 0x80 132 #define EAP_MEMPAGE 0x0c 133 #define EAP_CODEC 0x10 134 #define EAP_SET_CODEC(a,d) (((a)<<8) | (d)) 135 136 /* ES1371 Registers */ 137 #define E1371_CODEC 0x14 138 #define E1371_CODEC_WIP (1<<30) 139 #define E1371_CODEC_VALID (1<<31) 140 #define E1371_CODEC_READ (1<<23) 141 #define E1371_SET_CODEC(a,d) (((a)<<16) | (d)) 142 #define E1371_SRC 0x10 143 #define E1371_SRC_RAMWE (1<<24) 144 #define E1371_SRC_RBUSY (1<<23) 145 #define E1371_SRC_DISABLE (1<<22) 146 #define E1371_SRC_DISP1 (1<<21) 147 #define E1371_SRC_DISP2 (1<<20) 148 #define E1371_SRC_DISREC (1<<19) 149 #define E1371_SRC_ADDR(a) ((a)<<25) 150 #define E1371_SRC_DATA(d) (d) 151 #define E1371_SRC_DATAMASK 0xffff 152 #define E1371_LEGACY 0x18 153 154 /* ES1371 Sample rate converter registers */ 155 #define ESRC_ADC 0x78 156 #define ESRC_DAC1 0x74 157 #define ESRC_DAC2 0x70 158 #define ESRC_ADC_VOLL 0x6c 159 #define ESRC_ADC_VOLR 0x6d 160 #define ESRC_DAC1_VOLL 0x7c 161 #define ESRC_DAC1_VOLR 0x7d 162 #define ESRC_DAC2_VOLL 0x7e 163 #define ESRC_DAC2_VOLR 0x7f 164 #define ESRC_TRUNC_N 0x00 165 #define ESRC_IREGS 0x01 166 #define ESRC_ACF 0x02 167 #define ESRC_VFF 0x03 168 #define ESRC_SET_TRUNC(n) ((n)<<9) 169 #define ESRC_SET_N(n) ((n)<<4) 170 #define ESRC_SMF 0x8000 171 #define ESRC_SET_VFI(n) ((n)<<10) 172 #define ESRC_SET_ACI(n) (n) 173 #define ESRC_SET_ADC_VOL(n) ((n)<<8) 174 #define ESRC_SET_DAC_VOLI(n) ((n)<<12) 175 #define ESRC_SET_DAC_VOLF(n) (n) 176 #define SRC_MAGIC ((1<15)|(1<<13)|(1<<11)|(1<<9)) 177 178 179 #define EAP_SIC 0x20 180 #define EAP_P1_S_MB 0x00000001 181 #define EAP_P1_S_EB 0x00000002 182 #define EAP_P2_S_MB 0x00000004 183 #define EAP_P2_S_EB 0x00000008 184 #define EAP_R1_S_MB 0x00000010 185 #define EAP_R1_S_EB 0x00000020 186 #define EAP_P2_DAC_SEN 0x00000040 187 #define EAP_P1_SCT_RLD 0x00000080 188 #define EAP_P1_INTR_EN 0x00000100 189 #define EAP_P2_INTR_EN 0x00000200 190 #define EAP_R1_INTR_EN 0x00000400 191 #define EAP_P1_PAUSE 0x00000800 192 #define EAP_P2_PAUSE 0x00001000 193 #define EAP_P1_LOOP_SEL 0x00002000 194 #define EAP_P2_LOOP_SEL 0x00004000 195 #define EAP_R1_LOOP_SEL 0x00008000 196 #define EAP_SET_P2_ST_INC(i) ((i) << 16) 197 #define EAP_SET_P2_END_INC(i) ((i) << 19) 198 #define EAP_INC_BITS 0x003f0000 199 200 #define EAP_DAC1_CSR 0x24 201 #define EAP_DAC2_CSR 0x28 202 #define EAP_ADC_CSR 0x2c 203 #define EAP_GET_CURRSAMP(r) ((r) >> 16) 204 205 #define EAP_DAC_PAGE 0xc 206 #define EAP_ADC_PAGE 0xd 207 #define EAP_UART_PAGE1 0xe 208 #define EAP_UART_PAGE2 0xf 209 210 #define EAP_DAC1_ADDR 0x30 211 #define EAP_DAC1_SIZE 0x34 212 #define EAP_DAC2_ADDR 0x38 213 #define EAP_DAC2_SIZE 0x3c 214 #define EAP_ADC_ADDR 0x30 215 #define EAP_ADC_SIZE 0x34 216 #define EAP_SET_SIZE(c,s) (((c)<<16) | (s)) 217 218 #define EAP_READ_TIMEOUT 5000000 219 #define EAP_WRITE_TIMEOUT 5000000 220 221 222 #define EAP_XTAL_FREQ 1411200 /* 22.5792 / 16 MHz */ 223 224 /* AK4531 registers */ 225 #define AK_MASTER_L 0x00 226 #define AK_MASTER_R 0x01 227 #define AK_VOICE_L 0x02 228 #define AK_VOICE_R 0x03 229 #define AK_FM_L 0x04 230 #define AK_FM_R 0x05 231 #define AK_CD_L 0x06 232 #define AK_CD_R 0x07 233 #define AK_LINE_L 0x08 234 #define AK_LINE_R 0x09 235 #define AK_AUX_L 0x0a 236 #define AK_AUX_R 0x0b 237 #define AK_MONO1 0x0c 238 #define AK_MONO2 0x0d 239 #define AK_MIC 0x0e 240 #define AK_MONO 0x0f 241 #define AK_OUT_MIXER1 0x10 242 #define AK_M_FM_L 0x40 243 #define AK_M_FM_R 0x20 244 #define AK_M_LINE_L 0x10 245 #define AK_M_LINE_R 0x08 246 #define AK_M_CD_L 0x04 247 #define AK_M_CD_R 0x02 248 #define AK_M_MIC 0x01 249 #define AK_OUT_MIXER2 0x11 250 #define AK_M_AUX_L 0x20 251 #define AK_M_AUX_R 0x10 252 #define AK_M_VOICE_L 0x08 253 #define AK_M_VOICE_R 0x04 254 #define AK_M_MONO2 0x02 255 #define AK_M_MONO1 0x01 256 #define AK_IN_MIXER1_L 0x12 257 #define AK_IN_MIXER1_R 0x13 258 #define AK_IN_MIXER2_L 0x14 259 #define AK_IN_MIXER2_R 0x15 260 #define AK_M_TMIC 0x80 261 #define AK_M_TMONO1 0x40 262 #define AK_M_TMONO2 0x20 263 #define AK_M2_AUX_L 0x10 264 #define AK_M2_AUX_R 0x08 265 #define AK_M_VOICE 0x04 266 #define AK_M2_MONO2 0x02 267 #define AK_M2_MONO1 0x01 268 #define AK_RESET 0x16 269 #define AK_PD 0x02 270 #define AK_NRST 0x01 271 #define AK_CS 0x17 272 #define AK_ADSEL 0x18 273 #define AK_MGAIN 0x19 274 #define AK_NPORTS 0x20 275 276 #define MAX_NPORTS AK_NPORTS 277 278 /* Not sensical for AC97? */ 279 #define VOL_TO_ATT5(v) (0x1f - ((v) >> 3)) 280 #define VOL_TO_GAIN5(v) VOL_TO_ATT5(v) 281 #define ATT5_TO_VOL(v) ((0x1f - (v)) << 3) 282 #define GAIN5_TO_VOL(v) ATT5_TO_VOL(v) 283 #define VOL_0DB 200 284 285 /* Futzable parms */ 286 #define EAP_MASTER_VOL 0 287 #define EAP_VOICE_VOL 1 288 #define EAP_FM_VOL 2 289 #define EAP_VIDEO_VOL 2 /* ES1371 */ 290 #define EAP_CD_VOL 3 291 #define EAP_LINE_VOL 4 292 #define EAP_AUX_VOL 5 293 #define EAP_MIC_VOL 6 294 #define EAP_RECORD_SOURCE 7 295 #define EAP_OUTPUT_SELECT 8 296 #define EAP_MIC_PREAMP 9 297 #define EAP_OUTPUT_CLASS 10 298 #define EAP_RECORD_CLASS 11 299 #define EAP_INPUT_CLASS 12 300 301 #define MIDI_BUSY_WAIT 100 302 #define MIDI_BUSY_DELAY 100 /* Delay when UART is busy */ 303 304 /* Debug */ 305 #ifdef AUDIO_DEBUG 306 #define DPRINTF(x) if (eapdebug) printf x 307 #define DPRINTFN(n,x) if (eapdebug>(n)) printf x 308 int eapdebug = 0; 309 #else 310 #define DPRINTF(x) 311 #define DPRINTFN(n,x) 312 #endif 313 314 int eap_match __P((struct device *, struct cfdata *, void *)); 315 void eap_attach __P((struct device *, struct device *, void *)); 316 int eap_intr __P((void *)); 317 318 struct eap_dma { 319 bus_dmamap_t map; 320 caddr_t addr; 321 bus_dma_segment_t segs[1]; 322 int nsegs; 323 size_t size; 324 struct eap_dma *next; 325 }; 326 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 327 #define KERNADDR(p) ((void *)((p)->addr)) 328 329 struct eap_softc { 330 struct device sc_dev; /* base device */ 331 void *sc_ih; /* interrupt vectoring */ 332 bus_space_tag_t iot; 333 bus_space_handle_t ioh; 334 bus_dma_tag_t sc_dmatag; /* DMA tag */ 335 336 struct eap_dma *sc_dmas; 337 338 void (*sc_pintr)(void *); /* dma completion intr handler */ 339 void *sc_parg; /* arg for sc_intr() */ 340 #ifdef DIAGNOSTIC 341 char sc_prun; 342 #endif 343 344 void (*sc_rintr)(void *); /* dma completion intr handler */ 345 void *sc_rarg; /* arg for sc_intr() */ 346 #ifdef DIAGNOSTIC 347 char sc_rrun; 348 #endif 349 350 #if NMIDI > 0 351 void (*sc_iintr)(void *, int); /* midi input ready handler */ 352 void (*sc_ointr)(void *); /* midi output ready handler */ 353 void *sc_arg; 354 #endif 355 356 u_short sc_port[MAX_NPORTS]; /* mirror of the hardware setting */ 357 u_int sc_record_source; /* recording source mask */ 358 u_int sc_output_source; /* output source mask */ 359 u_int sc_mic_preamp; 360 char sc_1371; /* Using ES1371/AC97 codec */ 361 362 struct ac97_codec_if *codec_if; 363 struct ac97_host_if host_if; 364 }; 365 366 int eap_allocmem __P((struct eap_softc *, size_t, size_t, struct eap_dma *)); 367 int eap_freemem __P((struct eap_softc *, struct eap_dma *)); 368 369 #define EWRITE1(sc, r, x) bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)) 370 #define EWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 371 #define EWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 372 #define EREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r)) 373 #define EREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 374 #define EREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 375 376 struct cfattach eap_ca = { 377 sizeof(struct eap_softc), eap_match, eap_attach 378 }; 379 380 int eap_open __P((void *, int)); 381 void eap_close __P((void *)); 382 int eap_query_encoding __P((void *, struct audio_encoding *)); 383 int eap_set_params __P((void *, int, int, struct audio_params *, struct audio_params *)); 384 int eap_round_blocksize __P((void *, int)); 385 int eap_trigger_output __P((void *, void *, void *, int, void (*)(void *), 386 void *, struct audio_params *)); 387 int eap_trigger_input __P((void *, void *, void *, int, void (*)(void *), 388 void *, struct audio_params *)); 389 int eap_halt_output __P((void *)); 390 int eap_halt_input __P((void *)); 391 void eap_write_codec __P((struct eap_softc *, int, int)); 392 int eap_getdev __P((void *, struct audio_device *)); 393 int eap_mixer_set_port __P((void *, mixer_ctrl_t *)); 394 int eap_mixer_get_port __P((void *, mixer_ctrl_t *)); 395 int eap1371_mixer_set_port __P((void *, mixer_ctrl_t *)); 396 int eap1371_mixer_get_port __P((void *, mixer_ctrl_t *)); 397 int eap_query_devinfo __P((void *, mixer_devinfo_t *)); 398 void *eap_malloc __P((void *, int, size_t, int, int)); 399 void eap_free __P((void *, void *, int)); 400 size_t eap_round_buffersize __P((void *, int, size_t)); 401 int eap_mappage __P((void *, void *, int, int)); 402 int eap_get_props __P((void *)); 403 void eap_set_mixer __P((struct eap_softc *sc, int a, int d)); 404 void eap1371_src_wait __P((struct eap_softc *sc)); 405 void eap1371_set_adc_rate __P((struct eap_softc *sc, int rate)); 406 void eap1371_set_dac_rate __P((struct eap_softc *sc, int rate, int which)); 407 int eap1371_src_read __P((struct eap_softc *sc, int a)); 408 void eap1371_src_write __P((struct eap_softc *sc, int a, int d)); 409 int eap1371_query_devinfo __P((void *addr, mixer_devinfo_t *dip)); 410 411 int eap1371_attach_codec __P((void *sc, struct ac97_codec_if *)); 412 int eap1371_read_codec __P((void *sc, u_int8_t a, u_int16_t *d)); 413 int eap1371_write_codec __P((void *sc, u_int8_t a, u_int16_t d)); 414 void eap1371_reset_codec __P((void *sc)); 415 int eap1371_get_portnum_by_name __P((struct eap_softc *, char *, char *, 416 char *)); 417 #if NMIDI > 0 418 void eap_midi_close __P((void *)); 419 void eap_midi_getinfo __P((void *, struct midi_info *)); 420 int eap_midi_open __P((void *, int, void (*)(void *, int), 421 void (*)(void *), void *)); 422 int eap_midi_output __P((void *, int)); 423 #endif 424 425 struct audio_hw_if eap1370_hw_if = { 426 eap_open, 427 eap_close, 428 NULL, 429 eap_query_encoding, 430 eap_set_params, 431 eap_round_blocksize, 432 NULL, 433 NULL, 434 NULL, 435 NULL, 436 NULL, 437 eap_halt_output, 438 eap_halt_input, 439 NULL, 440 eap_getdev, 441 NULL, 442 eap_mixer_set_port, 443 eap_mixer_get_port, 444 eap_query_devinfo, 445 eap_malloc, 446 eap_free, 447 eap_round_buffersize, 448 eap_mappage, 449 eap_get_props, 450 eap_trigger_output, 451 eap_trigger_input, 452 }; 453 454 struct audio_hw_if eap1371_hw_if = { 455 eap_open, 456 eap_close, 457 NULL, 458 eap_query_encoding, 459 eap_set_params, 460 eap_round_blocksize, 461 NULL, 462 NULL, 463 NULL, 464 NULL, 465 NULL, 466 eap_halt_output, 467 eap_halt_input, 468 NULL, 469 eap_getdev, 470 NULL, 471 eap1371_mixer_set_port, 472 eap1371_mixer_get_port, 473 eap1371_query_devinfo, 474 eap_malloc, 475 eap_free, 476 eap_round_buffersize, 477 eap_mappage, 478 eap_get_props, 479 eap_trigger_output, 480 eap_trigger_input, 481 }; 482 483 #if NMIDI > 0 484 struct midi_hw_if eap_midi_hw_if = { 485 eap_midi_open, 486 eap_midi_close, 487 eap_midi_output, 488 eap_midi_getinfo, 489 0, /* ioctl */ 490 }; 491 #endif 492 493 struct audio_device eap_device = { 494 "Ensoniq AudioPCI", 495 "", 496 "eap" 497 }; 498 499 int 500 eap_match(parent, match, aux) 501 struct device *parent; 502 struct cfdata *match; 503 void *aux; 504 { 505 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 506 507 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_ENSONIQ) 508 return (0); 509 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI || 510 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97) { 511 return (1); 512 } 513 514 return (0); 515 } 516 517 void 518 eap_write_codec(sc, a, d) 519 struct eap_softc *sc; 520 int a, d; 521 { 522 int icss, to; 523 524 to = EAP_WRITE_TIMEOUT; 525 do { 526 icss = EREAD4(sc, EAP_ICSS); 527 DPRINTFN(5,("eap: codec %d prog: icss=0x%08x\n", a, icss)); 528 if (!to--) { 529 printf("eap: timeout writing to codec\n"); 530 return; 531 } 532 } while(icss & EAP_CWRIP); /* XXX could use CSTAT here */ 533 EWRITE4(sc, EAP_CODEC, EAP_SET_CODEC(a, d)); 534 } 535 536 int 537 eap1371_read_codec(sc_, a, d) 538 void *sc_; 539 u_int8_t a; 540 u_int16_t *d; 541 { 542 struct eap_softc *sc = sc_; 543 int to; 544 int cdc; 545 546 to = EAP_WRITE_TIMEOUT; 547 do { 548 cdc = EREAD4(sc, E1371_CODEC); 549 if (!to--) { 550 printf("eap: timeout writing to codec\n"); 551 return 1; 552 } 553 } while (cdc & E1371_CODEC_WIP); 554 555 /* just do it */ 556 eap1371_src_wait(sc); 557 EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, 0) | E1371_CODEC_READ); 558 559 for (to = 0; to < EAP_WRITE_TIMEOUT; to++) { 560 if ((cdc = EREAD4(sc, E1371_CODEC)) & E1371_CODEC_VALID) 561 break; 562 } 563 564 if (to == EAP_WRITE_TIMEOUT) { 565 DPRINTF(("eap1371: read codec timeout\n")); 566 } 567 568 *d = cdc & 0xffff; 569 570 DPRINTFN(10, ("eap1371: reading codec (%x) = %x\n", a, *d)); 571 572 return (0); 573 } 574 575 int 576 eap1371_write_codec(sc_, a, d) 577 void *sc_; 578 u_int8_t a; 579 u_int16_t d; 580 { 581 struct eap_softc *sc = sc_; 582 int to; 583 int cdc; 584 585 to = EAP_WRITE_TIMEOUT; 586 do { 587 cdc = EREAD4(sc, E1371_CODEC); 588 if (!to--) { 589 printf("eap: timeout writing to codec\n"); 590 return (1); 591 } 592 } while (cdc & E1371_CODEC_WIP); 593 594 /* just do it */ 595 eap1371_src_wait(sc); 596 EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, d)); 597 DPRINTFN(10, ("eap1371: writing codec %x --> %x\n", d, a)); 598 599 return (0); 600 } 601 602 void 603 eap1371_src_wait(sc) 604 struct eap_softc *sc; 605 { 606 int to; 607 int src; 608 609 to = EAP_READ_TIMEOUT; 610 do { 611 src = EREAD4(sc, E1371_SRC); 612 if (!to--) { 613 printf("eap: timeout waiting for sample rate" 614 "converter\n"); 615 return; 616 } 617 } while (src & E1371_SRC_RBUSY); 618 } 619 620 int 621 eap1371_src_read(sc, a) 622 struct eap_softc *sc; 623 int a; 624 { 625 int r; 626 627 eap1371_src_wait(sc); 628 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 629 E1371_SRC_DISP2 | E1371_SRC_DISREC); 630 r |= E1371_SRC_ADDR(a); 631 EWRITE4(sc, E1371_SRC, r); 632 r = EREAD4(sc, E1371_SRC) & E1371_SRC_DATAMASK; 633 return r; 634 } 635 636 void 637 eap1371_src_write(sc, a, d) 638 struct eap_softc *sc; 639 int a,d; 640 { 641 int r; 642 643 eap1371_src_wait(sc); 644 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 645 E1371_SRC_DISP2 | E1371_SRC_DISREC); 646 r |= E1371_SRC_RAMWE | E1371_SRC_ADDR(a) | E1371_SRC_DATA(d); 647 EWRITE4(sc, E1371_SRC, r); 648 } 649 650 void 651 eap1371_set_adc_rate(sc, rate) 652 struct eap_softc *sc; 653 int rate; 654 { 655 int freq, n, truncm; 656 int out; 657 658 /* Whatever, it works, so I'll leave it :) */ 659 660 if (rate > 48000) 661 rate = 48000; 662 if (rate < 4000) 663 rate = 4000; 664 n = rate / 3000; 665 if ((1 << n) & SRC_MAGIC) 666 n--; 667 truncm = ((21 * n) - 1) | 1; 668 freq = ((48000 << 15) / rate) * n; 669 if (rate >= 24000) { 670 if (truncm > 239) 671 truncm = 239; 672 out = ESRC_SET_TRUNC((239 - truncm) / 2); 673 } else { 674 if (truncm > 119) 675 truncm = 119; 676 out = ESRC_SMF | ESRC_SET_TRUNC((119 - truncm) / 2); 677 } 678 out |= ESRC_SET_N(n); 679 eap1371_src_write(sc, ESRC_ADC+ESRC_TRUNC_N, out); 680 681 682 out = eap1371_src_read(sc, ESRC_ADC+ESRC_IREGS) & 0xff; 683 eap1371_src_write(sc, ESRC_ADC+ESRC_IREGS, out | 684 ESRC_SET_VFI(freq >> 15)); 685 eap1371_src_write(sc, ESRC_ADC+ESRC_VFF, freq & 0x7fff); 686 eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(n)); 687 eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(n)); 688 } 689 690 void 691 eap1371_set_dac_rate(sc, rate, which) 692 struct eap_softc *sc; 693 int rate; 694 int which; 695 { 696 int dac = (which == 1) ? ESRC_DAC1 : ESRC_DAC2; 697 int freq, r; 698 699 /* Whatever, it works, so I'll leave it :) */ 700 701 if (rate > 48000) 702 rate = 48000; 703 if (rate < 4000) 704 rate = 4000; 705 freq = (rate << 15) / 3000; 706 707 eap1371_src_wait(sc); 708 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | 709 E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC); 710 r |= (which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2; 711 EWRITE4(sc, E1371_SRC, r); 712 r = eap1371_src_read(sc, dac + ESRC_IREGS) & 0x00ff; 713 eap1371_src_write(sc, dac + ESRC_IREGS, r | ((freq >> 5) & 0xfc00)); 714 eap1371_src_write(sc, dac + ESRC_VFF, freq & 0x7fff); 715 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | 716 E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC); 717 r &= ~((which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2); 718 EWRITE4(sc, E1371_SRC, r); 719 } 720 721 void 722 eap_attach(parent, self, aux) 723 struct device *parent; 724 struct device *self; 725 void *aux; 726 { 727 struct eap_softc *sc = (struct eap_softc *)self; 728 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 729 pci_chipset_tag_t pc = pa->pa_pc; 730 struct audio_hw_if *eap_hw_if; 731 char const *intrstr; 732 pci_intr_handle_t ih; 733 pcireg_t csr; 734 char devinfo[256]; 735 mixer_ctrl_t ctl; 736 int i; 737 int revision; 738 739 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 740 printf(": %s (rev. 0x%02x)\n", devinfo, (revision = PCI_REVISION(pa->pa_class))); 741 742 /* Flag if we're "creative" */ 743 sc->sc_1371 = PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97; 744 745 /* Map I/O register */ 746 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 747 &sc->iot, &sc->ioh, NULL, NULL)) { 748 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 749 return; 750 } 751 752 sc->sc_dmatag = pa->pa_dmat; 753 754 /* Enable the device. */ 755 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 756 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 757 csr | PCI_COMMAND_MASTER_ENABLE); 758 759 /* Map and establish the interrupt. */ 760 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 761 pa->pa_intrline, &ih)) { 762 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 763 return; 764 } 765 intrstr = pci_intr_string(pc, ih); 766 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, eap_intr, sc); 767 if (sc->sc_ih == NULL) { 768 printf("%s: couldn't establish interrupt", 769 sc->sc_dev.dv_xname); 770 if (intrstr != NULL) 771 printf(" at %s", intrstr); 772 printf("\n"); 773 return; 774 } 775 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 776 777 if (!sc->sc_1371) { 778 /* Enable interrupts and looping mode. */ 779 /* enable the parts we need */ 780 EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN); 781 EWRITE4(sc, EAP_ICSC, EAP_CDC_EN); 782 783 /* reset codec */ 784 /* normal operation */ 785 /* select codec clocks */ 786 eap_write_codec(sc, AK_RESET, AK_PD); 787 eap_write_codec(sc, AK_RESET, AK_PD | AK_NRST); 788 eap_write_codec(sc, AK_CS, 0x0); 789 790 eap_hw_if = &eap1370_hw_if; 791 792 /* Enable all relevant mixer switches. */ 793 ctl.dev = EAP_OUTPUT_SELECT; 794 ctl.type = AUDIO_MIXER_SET; 795 ctl.un.mask = 1 << EAP_VOICE_VOL | 1 << EAP_FM_VOL | 796 1 << EAP_CD_VOL | 1 << EAP_LINE_VOL | 1 << EAP_AUX_VOL | 797 1 << EAP_MIC_VOL; 798 eap_hw_if->set_port(sc, &ctl); 799 800 ctl.type = AUDIO_MIXER_VALUE; 801 ctl.un.value.num_channels = 1; 802 for (ctl.dev = EAP_MASTER_VOL; ctl.dev < EAP_MIC_VOL; 803 ctl.dev++) { 804 ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = VOL_0DB; 805 eap_hw_if->set_port(sc, &ctl); 806 } 807 ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = 0; 808 eap_hw_if->set_port(sc, &ctl); 809 ctl.dev = EAP_MIC_PREAMP; 810 ctl.type = AUDIO_MIXER_ENUM; 811 ctl.un.ord = 0; 812 eap_hw_if->set_port(sc, &ctl); 813 ctl.dev = EAP_RECORD_SOURCE; 814 ctl.type = AUDIO_MIXER_SET; 815 ctl.un.mask = 1 << EAP_MIC_VOL; 816 eap_hw_if->set_port(sc, &ctl); 817 } else { 818 /* clean slate */ 819 820 #define ES1371_BINTSUMM_OFF 0x07 821 if ((revision == 7) || (revision >= 9)) { 822 EWRITE4(sc, ES1371_BINTSUMM_OFF, 0x20); 823 } else { 824 EWRITE4(sc, EAP_SIC, 0); 825 } 826 827 EWRITE4(sc, EAP_ICSC, 0); 828 EWRITE4(sc, E1371_LEGACY, 0); 829 830 /* Reset from es1371's perspective */ 831 EWRITE4(sc, EAP_ICSC, E1371_SYNC_RES); 832 delay(20); 833 EWRITE4(sc, EAP_ICSC, 0); 834 835 /* must properly reprogram sample rate converter, 836 * or it locks up. Set some defaults for the life of the 837 * machine, and set up a sb default sample rate. 838 */ 839 EWRITE4(sc, E1371_SRC, E1371_SRC_DISABLE); 840 for (i=0; i<0x80; i++) 841 eap1371_src_write(sc, i, 0); 842 eap1371_src_write(sc, ESRC_DAC1+ESRC_TRUNC_N, ESRC_SET_N(16)); 843 eap1371_src_write(sc, ESRC_DAC2+ESRC_TRUNC_N, ESRC_SET_N(16)); 844 eap1371_src_write(sc, ESRC_DAC1+ESRC_IREGS, ESRC_SET_VFI(16)); 845 eap1371_src_write(sc, ESRC_DAC2+ESRC_IREGS, ESRC_SET_VFI(16)); 846 eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(16)); 847 eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(16)); 848 eap1371_src_write(sc, ESRC_DAC1_VOLL, ESRC_SET_DAC_VOLI(1)); 849 eap1371_src_write(sc, ESRC_DAC1_VOLR, ESRC_SET_DAC_VOLI(1)); 850 eap1371_src_write(sc, ESRC_DAC2_VOLL, ESRC_SET_DAC_VOLI(1)); 851 eap1371_src_write(sc, ESRC_DAC2_VOLR, ESRC_SET_DAC_VOLI(1)); 852 eap1371_set_adc_rate(sc, 22050); 853 eap1371_set_dac_rate(sc, 22050, 1); 854 eap1371_set_dac_rate(sc, 22050, 2); 855 856 EWRITE4(sc, E1371_SRC, 0); 857 858 /* Reset codec */ 859 860 /* Interrupt enable */ 861 sc->host_if.arg = sc; 862 sc->host_if.attach = eap1371_attach_codec; 863 sc->host_if.read = eap1371_read_codec; 864 sc->host_if.write = eap1371_write_codec; 865 sc->host_if.reset = eap1371_reset_codec; 866 867 if (ac97_attach(&sc->host_if) == 0) { 868 /* Interrupt enable */ 869 EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN); 870 } else 871 return; 872 873 eap_hw_if = &eap1371_hw_if; 874 875 /* Just enable the DAC and master volumes by default */ 876 ctl.type = AUDIO_MIXER_ENUM; 877 ctl.un.ord = 0; /* off */ 878 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCoutputs, 879 AudioNmaster, AudioNmute); 880 eap1371_mixer_set_port(sc, &ctl); 881 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCinputs, 882 AudioNdac, AudioNmute); 883 eap1371_mixer_set_port(sc, &ctl); 884 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord, 885 AudioNvolume, AudioNmute); 886 eap1371_mixer_set_port(sc, &ctl); 887 888 889 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord, 890 AudioNsource, NULL); 891 ctl.type = AUDIO_MIXER_ENUM; 892 ctl.un.ord = 0; 893 eap1371_mixer_set_port(sc, &ctl); 894 895 } 896 897 audio_attach_mi(eap_hw_if, sc, &sc->sc_dev); 898 899 #if NMIDI > 0 900 midi_attach_mi(&eap_midi_hw_if, sc, &sc->sc_dev); 901 #endif 902 } 903 904 int 905 eap1371_attach_codec(sc_, codec_if) 906 void *sc_; 907 struct ac97_codec_if *codec_if; 908 { 909 struct eap_softc *sc = sc_; 910 911 sc->codec_if = codec_if; 912 return (0); 913 } 914 915 void 916 eap1371_reset_codec(sc_) 917 void *sc_; 918 { 919 struct eap_softc *sc = sc_; 920 u_int32_t icsc = EREAD4(sc, EAP_ICSC); 921 922 EWRITE4(sc, EAP_ICSC, icsc | E1371_SYNC_RES); 923 delay(2); 924 EWRITE4(sc, EAP_ICSC, icsc & ~E1371_SYNC_RES); 925 delay(1); 926 927 return; 928 } 929 930 int 931 eap_intr(p) 932 void *p; 933 { 934 struct eap_softc *sc = p; 935 u_int32_t intr, sic; 936 937 intr = EREAD4(sc, EAP_ICSS); 938 if (!(intr & EAP_INTR)) 939 return (0); 940 sic = EREAD4(sc, EAP_SIC); 941 DPRINTFN(5, ("eap_intr: ICSS=0x%08x, SIC=0x%08x\n", intr, sic)); 942 if (intr & EAP_I_ADC) { 943 /* 944 * XXX This is a hack! 945 * The EAP chip sometimes generates the recording interrupt 946 * while it is still transferring the data. To make sure 947 * it has all arrived we busy wait until the count is right. 948 * The transfer we are waiting for is 8 longwords. 949 */ 950 int s, nw, n; 951 EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE); 952 s = EREAD4(sc, EAP_ADC_CSR); 953 nw = ((s & 0xffff) + 1) >> 2; /* # of words in DMA */ 954 n = 0; 955 while (((EREAD4(sc, EAP_ADC_SIZE) >> 16) + 8) % nw == 0) { 956 delay(10); 957 if (++n > 100) { 958 printf("eapintr: dma fix timeout"); 959 break; 960 } 961 } 962 /* Continue with normal interrupt handling. */ 963 EWRITE4(sc, EAP_SIC, sic & ~EAP_R1_INTR_EN); 964 EWRITE4(sc, EAP_SIC, sic); 965 if (sc->sc_rintr) 966 sc->sc_rintr(sc->sc_rarg); 967 } 968 if (intr & EAP_I_DAC2) { 969 EWRITE4(sc, EAP_SIC, sic & ~EAP_P2_INTR_EN); 970 EWRITE4(sc, EAP_SIC, sic); 971 if (sc->sc_pintr) 972 sc->sc_pintr(sc->sc_parg); 973 } 974 #if NMIDI > 0 975 if (intr & EAP_I_UART) { 976 u_int32_t data; 977 978 if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXINT) { 979 while (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXRDY) { 980 data = EREAD1(sc, EAP_UART_DATA); 981 if (sc->sc_iintr) 982 sc->sc_iintr(sc->sc_arg, data); 983 } 984 } 985 } 986 #endif 987 return (1); 988 } 989 990 int 991 eap_allocmem(sc, size, align, p) 992 struct eap_softc *sc; 993 size_t size; 994 size_t align; 995 struct eap_dma *p; 996 { 997 int error; 998 999 p->size = size; 1000 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 1001 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1002 &p->nsegs, BUS_DMA_NOWAIT); 1003 if (error) 1004 return (error); 1005 1006 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 1007 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1008 if (error) 1009 goto free; 1010 1011 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 1012 0, BUS_DMA_NOWAIT, &p->map); 1013 if (error) 1014 goto unmap; 1015 1016 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 1017 BUS_DMA_NOWAIT); 1018 if (error) 1019 goto destroy; 1020 return (0); 1021 1022 destroy: 1023 bus_dmamap_destroy(sc->sc_dmatag, p->map); 1024 unmap: 1025 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1026 free: 1027 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1028 return (error); 1029 } 1030 1031 int 1032 eap_freemem(sc, p) 1033 struct eap_softc *sc; 1034 struct eap_dma *p; 1035 { 1036 bus_dmamap_unload(sc->sc_dmatag, p->map); 1037 bus_dmamap_destroy(sc->sc_dmatag, p->map); 1038 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1039 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1040 return (0); 1041 } 1042 1043 int 1044 eap_open(addr, flags) 1045 void *addr; 1046 int flags; 1047 { 1048 return (0); 1049 } 1050 1051 /* 1052 * Close function is called at splaudio(). 1053 */ 1054 void 1055 eap_close(addr) 1056 void *addr; 1057 { 1058 struct eap_softc *sc = addr; 1059 1060 eap_halt_output(sc); 1061 eap_halt_input(sc); 1062 1063 sc->sc_pintr = 0; 1064 sc->sc_rintr = 0; 1065 } 1066 1067 int 1068 eap_query_encoding(addr, fp) 1069 void *addr; 1070 struct audio_encoding *fp; 1071 { 1072 switch (fp->index) { 1073 case 0: 1074 strcpy(fp->name, AudioEulinear); 1075 fp->encoding = AUDIO_ENCODING_ULINEAR; 1076 fp->precision = 8; 1077 fp->flags = 0; 1078 return (0); 1079 case 1: 1080 strcpy(fp->name, AudioEmulaw); 1081 fp->encoding = AUDIO_ENCODING_ULAW; 1082 fp->precision = 8; 1083 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1084 return (0); 1085 case 2: 1086 strcpy(fp->name, AudioEalaw); 1087 fp->encoding = AUDIO_ENCODING_ALAW; 1088 fp->precision = 8; 1089 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1090 return (0); 1091 case 3: 1092 strcpy(fp->name, AudioEslinear); 1093 fp->encoding = AUDIO_ENCODING_SLINEAR; 1094 fp->precision = 8; 1095 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1096 return (0); 1097 case 4: 1098 strcpy(fp->name, AudioEslinear_le); 1099 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1100 fp->precision = 16; 1101 fp->flags = 0; 1102 return (0); 1103 case 5: 1104 strcpy(fp->name, AudioEulinear_le); 1105 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1106 fp->precision = 16; 1107 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1108 return (0); 1109 case 6: 1110 strcpy(fp->name, AudioEslinear_be); 1111 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1112 fp->precision = 16; 1113 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1114 return (0); 1115 case 7: 1116 strcpy(fp->name, AudioEulinear_be); 1117 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1118 fp->precision = 16; 1119 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1120 return (0); 1121 default: 1122 return (EINVAL); 1123 } 1124 } 1125 1126 int 1127 eap_set_params(addr, setmode, usemode, play, rec) 1128 void *addr; 1129 int setmode, usemode; 1130 struct audio_params *play, *rec; 1131 { 1132 struct eap_softc *sc = addr; 1133 struct audio_params *p; 1134 int mode; 1135 u_int32_t div; 1136 1137 /* 1138 * The es1370 only has one clock, so make the sample rates match. 1139 */ 1140 if (!sc->sc_1371) { 1141 if (play->sample_rate != rec->sample_rate && 1142 usemode == (AUMODE_PLAY | AUMODE_RECORD)) { 1143 if (setmode == AUMODE_PLAY) { 1144 rec->sample_rate = play->sample_rate; 1145 setmode |= AUMODE_RECORD; 1146 } else if (setmode == AUMODE_RECORD) { 1147 play->sample_rate = rec->sample_rate; 1148 setmode |= AUMODE_PLAY; 1149 } else 1150 return (EINVAL); 1151 } 1152 } 1153 1154 for (mode = AUMODE_RECORD; mode != -1; 1155 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1156 if ((setmode & mode) == 0) 1157 continue; 1158 1159 p = mode == AUMODE_PLAY ? play : rec; 1160 1161 if (p->sample_rate < 4000 || p->sample_rate > 48000 || 1162 (p->precision != 8 && p->precision != 16) || 1163 (p->channels != 1 && p->channels != 2)) 1164 return (EINVAL); 1165 1166 p->factor = 1; 1167 p->sw_code = 0; 1168 switch (p->encoding) { 1169 case AUDIO_ENCODING_SLINEAR_BE: 1170 if (p->precision == 16) 1171 p->sw_code = swap_bytes; 1172 else 1173 p->sw_code = change_sign8; 1174 break; 1175 case AUDIO_ENCODING_SLINEAR_LE: 1176 if (p->precision != 16) 1177 p->sw_code = change_sign8; 1178 break; 1179 case AUDIO_ENCODING_ULINEAR_BE: 1180 if (p->precision == 16) { 1181 if (mode == AUMODE_PLAY) 1182 p->sw_code = swap_bytes_change_sign16_le; 1183 else 1184 p->sw_code = change_sign16_swap_bytes_le; 1185 } 1186 break; 1187 case AUDIO_ENCODING_ULINEAR_LE: 1188 if (p->precision == 16) 1189 p->sw_code = change_sign16_le; 1190 break; 1191 case AUDIO_ENCODING_ULAW: 1192 if (mode == AUMODE_PLAY) { 1193 p->factor = 2; 1194 p->sw_code = mulaw_to_slinear16_le; 1195 } else 1196 p->sw_code = ulinear8_to_mulaw; 1197 break; 1198 case AUDIO_ENCODING_ALAW: 1199 if (mode == AUMODE_PLAY) { 1200 p->factor = 2; 1201 p->sw_code = alaw_to_slinear16_le; 1202 } else 1203 p->sw_code = ulinear8_to_alaw; 1204 break; 1205 default: 1206 return (EINVAL); 1207 } 1208 } 1209 1210 if (sc->sc_1371) { 1211 eap1371_set_dac_rate(sc, play->sample_rate, 1); 1212 eap1371_set_dac_rate(sc, play->sample_rate, 2); 1213 eap1371_set_adc_rate(sc, rec->sample_rate); 1214 } else { 1215 /* Set the speed */ 1216 DPRINTFN(2, ("eap_set_params: old ICSC = 0x%08x\n", 1217 EREAD4(sc, EAP_ICSC))); 1218 div = EREAD4(sc, EAP_ICSC) & ~EAP_PCLKBITS; 1219 /* 1220 * XXX 1221 * The -2 isn't documented, but seemed to make the wall 1222 * time match 1223 * what I expect. - mycroft 1224 */ 1225 if (usemode == AUMODE_RECORD) 1226 div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ / 1227 rec->sample_rate - 2); 1228 else 1229 div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ / 1230 play->sample_rate - 2); 1231 div |= EAP_CCB_INTRM; 1232 EWRITE4(sc, EAP_ICSC, div); 1233 DPRINTFN(2, ("eap_set_params: set ICSC = 0x%08x\n", div)); 1234 } 1235 1236 return (0); 1237 } 1238 1239 int 1240 eap_round_blocksize(addr, blk) 1241 void *addr; 1242 int blk; 1243 { 1244 return (blk & -32); /* keep good alignment */ 1245 } 1246 1247 int 1248 eap_trigger_output(addr, start, end, blksize, intr, arg, param) 1249 void *addr; 1250 void *start, *end; 1251 int blksize; 1252 void (*intr) __P((void *)); 1253 void *arg; 1254 struct audio_params *param; 1255 { 1256 struct eap_softc *sc = addr; 1257 struct eap_dma *p; 1258 u_int32_t icsc, sic; 1259 int sampshift; 1260 1261 #ifdef DIAGNOSTIC 1262 if (sc->sc_prun) 1263 panic("eap_trigger_output: already running"); 1264 sc->sc_prun = 1; 1265 #endif 1266 1267 DPRINTFN(1, ("eap_trigger_output: sc=%p start=%p end=%p " 1268 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1269 sc->sc_pintr = intr; 1270 sc->sc_parg = arg; 1271 1272 icsc = EREAD4(sc, EAP_ICSC); 1273 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN); 1274 1275 sic = EREAD4(sc, EAP_SIC); 1276 sic &= ~(EAP_P2_S_EB | EAP_P2_S_MB | EAP_INC_BITS); 1277 sic |= EAP_SET_P2_ST_INC(0) | EAP_SET_P2_END_INC(param->precision * param->factor / 8); 1278 sampshift = 0; 1279 if (param->precision * param->factor == 16) { 1280 sic |= EAP_P2_S_EB; 1281 sampshift++; 1282 } 1283 if (param->channels == 2) { 1284 sic |= EAP_P2_S_MB; 1285 sampshift++; 1286 } 1287 EWRITE4(sc, EAP_SIC, sic); 1288 1289 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1290 ; 1291 if (!p) { 1292 printf("eap_trigger_output: bad addr %p\n", start); 1293 return (EINVAL); 1294 } 1295 1296 DPRINTF(("eap_trigger_output: DAC2_ADDR=0x%x, DAC2_SIZE=0x%x\n", 1297 (int)DMAADDR(p), 1298 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1))); 1299 EWRITE4(sc, EAP_MEMPAGE, EAP_DAC_PAGE); 1300 EWRITE4(sc, EAP_DAC2_ADDR, DMAADDR(p)); 1301 EWRITE4(sc, EAP_DAC2_SIZE, 1302 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)); 1303 1304 EWRITE2(sc, EAP_DAC2_CSR, (blksize >> sampshift) - 1); 1305 1306 EWRITE4(sc, EAP_ICSC, icsc | EAP_DAC2_EN); 1307 1308 DPRINTFN(1, ("eap_trigger_output: set ICSC = 0x%08x\n", icsc)); 1309 1310 return (0); 1311 } 1312 1313 int 1314 eap_trigger_input(addr, start, end, blksize, intr, arg, param) 1315 void *addr; 1316 void *start, *end; 1317 int blksize; 1318 void (*intr) __P((void *)); 1319 void *arg; 1320 struct audio_params *param; 1321 { 1322 struct eap_softc *sc = addr; 1323 struct eap_dma *p; 1324 u_int32_t icsc, sic; 1325 int sampshift; 1326 1327 #ifdef DIAGNOSTIC 1328 if (sc->sc_rrun) 1329 panic("eap_trigger_input: already running"); 1330 sc->sc_rrun = 1; 1331 #endif 1332 1333 DPRINTFN(1, ("eap_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 1334 addr, start, end, blksize, intr, arg)); 1335 sc->sc_rintr = intr; 1336 sc->sc_rarg = arg; 1337 1338 icsc = EREAD4(sc, EAP_ICSC); 1339 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN); 1340 1341 sic = EREAD4(sc, EAP_SIC); 1342 sic &= ~(EAP_R1_S_EB | EAP_R1_S_MB); 1343 sampshift = 0; 1344 if (param->precision * param->factor == 16) { 1345 sic |= EAP_R1_S_EB; 1346 sampshift++; 1347 } 1348 if (param->channels == 2) { 1349 sic |= EAP_R1_S_MB; 1350 sampshift++; 1351 } 1352 EWRITE4(sc, EAP_SIC, sic); 1353 1354 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1355 ; 1356 if (!p) { 1357 printf("eap_trigger_input: bad addr %p\n", start); 1358 return (EINVAL); 1359 } 1360 1361 DPRINTF(("eap_trigger_input: ADC_ADDR=0x%x, ADC_SIZE=0x%x\n", 1362 (int)DMAADDR(p), 1363 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1))); 1364 EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE); 1365 EWRITE4(sc, EAP_ADC_ADDR, DMAADDR(p)); 1366 EWRITE4(sc, EAP_ADC_SIZE, 1367 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)); 1368 1369 EWRITE2(sc, EAP_ADC_CSR, (blksize >> sampshift) - 1); 1370 1371 EWRITE4(sc, EAP_ICSC, icsc | EAP_ADC_EN); 1372 1373 DPRINTFN(1, ("eap_trigger_input: set ICSC = 0x%08x\n", icsc)); 1374 1375 return (0); 1376 } 1377 1378 int 1379 eap_halt_output(addr) 1380 void *addr; 1381 { 1382 struct eap_softc *sc = addr; 1383 u_int32_t icsc; 1384 1385 DPRINTF(("eap: eap_halt_output\n")); 1386 icsc = EREAD4(sc, EAP_ICSC); 1387 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN); 1388 #ifdef DIAGNOSTIC 1389 sc->sc_prun = 0; 1390 #endif 1391 return (0); 1392 } 1393 1394 int 1395 eap_halt_input(addr) 1396 void *addr; 1397 { 1398 struct eap_softc *sc = addr; 1399 u_int32_t icsc; 1400 1401 DPRINTF(("eap: eap_halt_input\n")); 1402 icsc = EREAD4(sc, EAP_ICSC); 1403 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN); 1404 #ifdef DIAGNOSTIC 1405 sc->sc_rrun = 0; 1406 #endif 1407 return (0); 1408 } 1409 1410 int 1411 eap_getdev(addr, retp) 1412 void *addr; 1413 struct audio_device *retp; 1414 { 1415 *retp = eap_device; 1416 return (0); 1417 } 1418 1419 int 1420 eap1371_mixer_set_port(addr, cp) 1421 void *addr; 1422 mixer_ctrl_t *cp; 1423 { 1424 struct eap_softc *sc = addr; 1425 1426 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 1427 } 1428 1429 int 1430 eap1371_mixer_get_port(addr, cp) 1431 void *addr; 1432 mixer_ctrl_t *cp; 1433 { 1434 struct eap_softc *sc = addr; 1435 1436 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 1437 } 1438 1439 int 1440 eap1371_query_devinfo(addr, dip) 1441 void *addr; 1442 mixer_devinfo_t *dip; 1443 { 1444 struct eap_softc *sc = addr; 1445 1446 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip)); 1447 } 1448 1449 int 1450 eap1371_get_portnum_by_name(sc, class, device, qualifier) 1451 struct eap_softc *sc; 1452 char *class, *device, *qualifier; 1453 { 1454 return (sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if, class, 1455 device, qualifier)); 1456 } 1457 1458 void 1459 eap_set_mixer(sc, a, d) 1460 struct eap_softc *sc; 1461 int a, d; 1462 { 1463 eap_write_codec(sc, a, d); 1464 1465 sc->sc_port[a] = d; 1466 DPRINTFN(1, ("eap_mixer_set_port port 0x%02x = 0x%02x\n", a, d)); 1467 } 1468 1469 int 1470 eap_mixer_set_port(addr, cp) 1471 void *addr; 1472 mixer_ctrl_t *cp; 1473 { 1474 struct eap_softc *sc = addr; 1475 int lval, rval, l, r, la, ra; 1476 int l1, r1, l2, r2, m, o1, o2; 1477 1478 if (cp->dev == EAP_RECORD_SOURCE) { 1479 if (cp->type != AUDIO_MIXER_SET) 1480 return (EINVAL); 1481 m = sc->sc_record_source = cp->un.mask; 1482 l1 = l2 = r1 = r2 = 0; 1483 if (m & (1 << EAP_VOICE_VOL)) 1484 l2 |= AK_M_VOICE, r2 |= AK_M_VOICE; 1485 if (m & (1 << EAP_FM_VOL)) 1486 l1 |= AK_M_FM_L, r1 |= AK_M_FM_R; 1487 if (m & (1 << EAP_CD_VOL)) 1488 l1 |= AK_M_CD_L, r1 |= AK_M_CD_R; 1489 if (m & (1 << EAP_LINE_VOL)) 1490 l1 |= AK_M_LINE_L, r1 |= AK_M_LINE_R; 1491 if (m & (1 << EAP_AUX_VOL)) 1492 l2 |= AK_M2_AUX_L, r2 |= AK_M2_AUX_R; 1493 if (m & (1 << EAP_MIC_VOL)) 1494 l2 |= AK_M_TMIC, r2 |= AK_M_TMIC; 1495 eap_set_mixer(sc, AK_IN_MIXER1_L, l1); 1496 eap_set_mixer(sc, AK_IN_MIXER1_R, r1); 1497 eap_set_mixer(sc, AK_IN_MIXER2_L, l2); 1498 eap_set_mixer(sc, AK_IN_MIXER2_R, r2); 1499 return (0); 1500 } 1501 if (cp->dev == EAP_OUTPUT_SELECT) { 1502 if (cp->type != AUDIO_MIXER_SET) 1503 return (EINVAL); 1504 m = sc->sc_output_source = cp->un.mask; 1505 o1 = o2 = 0; 1506 if (m & (1 << EAP_VOICE_VOL)) 1507 o2 |= AK_M_VOICE_L | AK_M_VOICE_R; 1508 if (m & (1 << EAP_FM_VOL)) 1509 o1 |= AK_M_FM_L | AK_M_FM_R; 1510 if (m & (1 << EAP_CD_VOL)) 1511 o1 |= AK_M_CD_L | AK_M_CD_R; 1512 if (m & (1 << EAP_LINE_VOL)) 1513 o1 |= AK_M_LINE_L | AK_M_LINE_R; 1514 if (m & (1 << EAP_AUX_VOL)) 1515 o2 |= AK_M_AUX_L | AK_M_AUX_R; 1516 if (m & (1 << EAP_MIC_VOL)) 1517 o1 |= AK_M_MIC; 1518 eap_set_mixer(sc, AK_OUT_MIXER1, o1); 1519 eap_set_mixer(sc, AK_OUT_MIXER2, o2); 1520 return (0); 1521 } 1522 if (cp->dev == EAP_MIC_PREAMP) { 1523 if (cp->type != AUDIO_MIXER_ENUM) 1524 return (EINVAL); 1525 if (cp->un.ord != 0 && cp->un.ord != 1) 1526 return (EINVAL); 1527 sc->sc_mic_preamp = cp->un.ord; 1528 eap_set_mixer(sc, AK_MGAIN, cp->un.ord); 1529 return (0); 1530 } 1531 if (cp->type != AUDIO_MIXER_VALUE) 1532 return (EINVAL); 1533 if (cp->un.value.num_channels == 1) 1534 lval = rval = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1535 else if (cp->un.value.num_channels == 2) { 1536 lval = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1537 rval = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1538 } else 1539 return (EINVAL); 1540 ra = -1; 1541 switch (cp->dev) { 1542 case EAP_MASTER_VOL: 1543 l = VOL_TO_ATT5(lval); 1544 r = VOL_TO_ATT5(rval); 1545 la = AK_MASTER_L; 1546 ra = AK_MASTER_R; 1547 break; 1548 case EAP_MIC_VOL: 1549 if (cp->un.value.num_channels != 1) 1550 return (EINVAL); 1551 la = AK_MIC; 1552 goto lr; 1553 case EAP_VOICE_VOL: 1554 la = AK_VOICE_L; 1555 ra = AK_VOICE_R; 1556 goto lr; 1557 case EAP_FM_VOL: 1558 la = AK_FM_L; 1559 ra = AK_FM_R; 1560 goto lr; 1561 case EAP_CD_VOL: 1562 la = AK_CD_L; 1563 ra = AK_CD_R; 1564 goto lr; 1565 case EAP_LINE_VOL: 1566 la = AK_LINE_L; 1567 ra = AK_LINE_R; 1568 goto lr; 1569 case EAP_AUX_VOL: 1570 la = AK_AUX_L; 1571 ra = AK_AUX_R; 1572 lr: 1573 l = VOL_TO_GAIN5(lval); 1574 r = VOL_TO_GAIN5(rval); 1575 break; 1576 default: 1577 return (EINVAL); 1578 } 1579 eap_set_mixer(sc, la, l); 1580 if (ra >= 0) { 1581 eap_set_mixer(sc, ra, r); 1582 } 1583 return (0); 1584 } 1585 1586 int 1587 eap_mixer_get_port(addr, cp) 1588 void *addr; 1589 mixer_ctrl_t *cp; 1590 { 1591 struct eap_softc *sc = addr; 1592 int la, ra, l, r; 1593 1594 switch (cp->dev) { 1595 case EAP_RECORD_SOURCE: 1596 if (cp->type != AUDIO_MIXER_SET) 1597 return (EINVAL); 1598 cp->un.mask = sc->sc_record_source; 1599 return (0); 1600 case EAP_OUTPUT_SELECT: 1601 if (cp->type != AUDIO_MIXER_SET) 1602 return (EINVAL); 1603 cp->un.mask = sc->sc_output_source; 1604 return (0); 1605 case EAP_MIC_PREAMP: 1606 if (cp->type != AUDIO_MIXER_ENUM) 1607 return (EINVAL); 1608 cp->un.ord = sc->sc_mic_preamp; 1609 return (0); 1610 case EAP_MASTER_VOL: 1611 l = ATT5_TO_VOL(sc->sc_port[AK_MASTER_L]); 1612 r = ATT5_TO_VOL(sc->sc_port[AK_MASTER_R]); 1613 break; 1614 case EAP_MIC_VOL: 1615 if (cp->un.value.num_channels != 1) 1616 return (EINVAL); 1617 la = ra = AK_MIC; 1618 goto lr; 1619 case EAP_VOICE_VOL: 1620 la = AK_VOICE_L; 1621 ra = AK_VOICE_R; 1622 goto lr; 1623 case EAP_FM_VOL: 1624 la = AK_FM_L; 1625 ra = AK_FM_R; 1626 goto lr; 1627 case EAP_CD_VOL: 1628 la = AK_CD_L; 1629 ra = AK_CD_R; 1630 goto lr; 1631 case EAP_LINE_VOL: 1632 la = AK_LINE_L; 1633 ra = AK_LINE_R; 1634 goto lr; 1635 case EAP_AUX_VOL: 1636 la = AK_AUX_L; 1637 ra = AK_AUX_R; 1638 lr: 1639 l = GAIN5_TO_VOL(sc->sc_port[la]); 1640 r = GAIN5_TO_VOL(sc->sc_port[ra]); 1641 break; 1642 default: 1643 return (EINVAL); 1644 } 1645 if (cp->un.value.num_channels == 1) 1646 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2; 1647 else if (cp->un.value.num_channels == 2) { 1648 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l; 1649 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r; 1650 } else 1651 return (EINVAL); 1652 return (0); 1653 } 1654 1655 int 1656 eap_query_devinfo(addr, dip) 1657 void *addr; 1658 mixer_devinfo_t *dip; 1659 { 1660 switch (dip->index) { 1661 case EAP_MASTER_VOL: 1662 dip->type = AUDIO_MIXER_VALUE; 1663 dip->mixer_class = EAP_OUTPUT_CLASS; 1664 dip->prev = dip->next = AUDIO_MIXER_LAST; 1665 strcpy(dip->label.name, AudioNmaster); 1666 dip->un.v.num_channels = 2; 1667 strcpy(dip->un.v.units.name, AudioNvolume); 1668 return (0); 1669 case EAP_VOICE_VOL: 1670 dip->type = AUDIO_MIXER_VALUE; 1671 dip->mixer_class = EAP_INPUT_CLASS; 1672 dip->prev = AUDIO_MIXER_LAST; 1673 dip->next = AUDIO_MIXER_LAST; 1674 strcpy(dip->label.name, AudioNdac); 1675 dip->un.v.num_channels = 2; 1676 strcpy(dip->un.v.units.name, AudioNvolume); 1677 return (0); 1678 case EAP_FM_VOL: 1679 dip->type = AUDIO_MIXER_VALUE; 1680 dip->mixer_class = EAP_INPUT_CLASS; 1681 dip->prev = AUDIO_MIXER_LAST; 1682 dip->next = AUDIO_MIXER_LAST; 1683 strcpy(dip->label.name, AudioNfmsynth); 1684 dip->un.v.num_channels = 2; 1685 strcpy(dip->un.v.units.name, AudioNvolume); 1686 return (0); 1687 case EAP_CD_VOL: 1688 dip->type = AUDIO_MIXER_VALUE; 1689 dip->mixer_class = EAP_INPUT_CLASS; 1690 dip->prev = AUDIO_MIXER_LAST; 1691 dip->next = AUDIO_MIXER_LAST; 1692 strcpy(dip->label.name, AudioNcd); 1693 dip->un.v.num_channels = 2; 1694 strcpy(dip->un.v.units.name, AudioNvolume); 1695 return (0); 1696 case EAP_LINE_VOL: 1697 dip->type = AUDIO_MIXER_VALUE; 1698 dip->mixer_class = EAP_INPUT_CLASS; 1699 dip->prev = AUDIO_MIXER_LAST; 1700 dip->next = AUDIO_MIXER_LAST; 1701 strcpy(dip->label.name, AudioNline); 1702 dip->un.v.num_channels = 2; 1703 strcpy(dip->un.v.units.name, AudioNvolume); 1704 return (0); 1705 case EAP_AUX_VOL: 1706 dip->type = AUDIO_MIXER_VALUE; 1707 dip->mixer_class = EAP_INPUT_CLASS; 1708 dip->prev = AUDIO_MIXER_LAST; 1709 dip->next = AUDIO_MIXER_LAST; 1710 strcpy(dip->label.name, AudioNaux); 1711 dip->un.v.num_channels = 2; 1712 strcpy(dip->un.v.units.name, AudioNvolume); 1713 return (0); 1714 case EAP_MIC_VOL: 1715 dip->type = AUDIO_MIXER_VALUE; 1716 dip->mixer_class = EAP_INPUT_CLASS; 1717 dip->prev = AUDIO_MIXER_LAST; 1718 dip->next = EAP_MIC_PREAMP; 1719 strcpy(dip->label.name, AudioNmicrophone); 1720 dip->un.v.num_channels = 1; 1721 strcpy(dip->un.v.units.name, AudioNvolume); 1722 return (0); 1723 case EAP_RECORD_SOURCE: 1724 dip->mixer_class = EAP_RECORD_CLASS; 1725 dip->prev = dip->next = AUDIO_MIXER_LAST; 1726 strcpy(dip->label.name, AudioNsource); 1727 dip->type = AUDIO_MIXER_SET; 1728 dip->un.s.num_mem = 6; 1729 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 1730 dip->un.s.member[0].mask = 1 << EAP_MIC_VOL; 1731 strcpy(dip->un.s.member[1].label.name, AudioNcd); 1732 dip->un.s.member[1].mask = 1 << EAP_CD_VOL; 1733 strcpy(dip->un.s.member[2].label.name, AudioNline); 1734 dip->un.s.member[2].mask = 1 << EAP_LINE_VOL; 1735 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1736 dip->un.s.member[3].mask = 1 << EAP_FM_VOL; 1737 strcpy(dip->un.s.member[4].label.name, AudioNaux); 1738 dip->un.s.member[4].mask = 1 << EAP_AUX_VOL; 1739 strcpy(dip->un.s.member[5].label.name, AudioNdac); 1740 dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL; 1741 return (0); 1742 case EAP_OUTPUT_SELECT: 1743 dip->mixer_class = EAP_OUTPUT_CLASS; 1744 dip->prev = dip->next = AUDIO_MIXER_LAST; 1745 strcpy(dip->label.name, AudioNselect); 1746 dip->type = AUDIO_MIXER_SET; 1747 dip->un.s.num_mem = 6; 1748 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 1749 dip->un.s.member[0].mask = 1 << EAP_MIC_VOL; 1750 strcpy(dip->un.s.member[1].label.name, AudioNcd); 1751 dip->un.s.member[1].mask = 1 << EAP_CD_VOL; 1752 strcpy(dip->un.s.member[2].label.name, AudioNline); 1753 dip->un.s.member[2].mask = 1 << EAP_LINE_VOL; 1754 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1755 dip->un.s.member[3].mask = 1 << EAP_FM_VOL; 1756 strcpy(dip->un.s.member[4].label.name, AudioNaux); 1757 dip->un.s.member[4].mask = 1 << EAP_AUX_VOL; 1758 strcpy(dip->un.s.member[5].label.name, AudioNdac); 1759 dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL; 1760 return (0); 1761 case EAP_MIC_PREAMP: 1762 dip->type = AUDIO_MIXER_ENUM; 1763 dip->mixer_class = EAP_INPUT_CLASS; 1764 dip->prev = EAP_MIC_VOL; 1765 dip->next = AUDIO_MIXER_LAST; 1766 strcpy(dip->label.name, AudioNpreamp); 1767 dip->un.e.num_mem = 2; 1768 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1769 dip->un.e.member[0].ord = 0; 1770 strcpy(dip->un.e.member[1].label.name, AudioNon); 1771 dip->un.e.member[1].ord = 1; 1772 return (0); 1773 case EAP_OUTPUT_CLASS: 1774 dip->type = AUDIO_MIXER_CLASS; 1775 dip->mixer_class = EAP_OUTPUT_CLASS; 1776 dip->next = dip->prev = AUDIO_MIXER_LAST; 1777 strcpy(dip->label.name, AudioCoutputs); 1778 return (0); 1779 case EAP_RECORD_CLASS: 1780 dip->type = AUDIO_MIXER_CLASS; 1781 dip->mixer_class = EAP_RECORD_CLASS; 1782 dip->next = dip->prev = AUDIO_MIXER_LAST; 1783 strcpy(dip->label.name, AudioCrecord); 1784 return (0); 1785 case EAP_INPUT_CLASS: 1786 dip->type = AUDIO_MIXER_CLASS; 1787 dip->mixer_class = EAP_INPUT_CLASS; 1788 dip->next = dip->prev = AUDIO_MIXER_LAST; 1789 strcpy(dip->label.name, AudioCinputs); 1790 return (0); 1791 } 1792 return (ENXIO); 1793 } 1794 1795 void * 1796 eap_malloc(addr, direction, size, pool, flags) 1797 void *addr; 1798 int direction; 1799 size_t size; 1800 int pool, flags; 1801 { 1802 struct eap_softc *sc = addr; 1803 struct eap_dma *p; 1804 int error; 1805 1806 p = malloc(sizeof(*p), pool, flags); 1807 if (!p) 1808 return (0); 1809 error = eap_allocmem(sc, size, 16, p); 1810 if (error) { 1811 free(p, pool); 1812 return (0); 1813 } 1814 p->next = sc->sc_dmas; 1815 sc->sc_dmas = p; 1816 return (KERNADDR(p)); 1817 } 1818 1819 void 1820 eap_free(addr, ptr, pool) 1821 void *addr; 1822 void *ptr; 1823 int pool; 1824 { 1825 struct eap_softc *sc = addr; 1826 struct eap_dma **pp, *p; 1827 1828 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1829 if (KERNADDR(p) == ptr) { 1830 eap_freemem(sc, p); 1831 *pp = p->next; 1832 free(p, pool); 1833 return; 1834 } 1835 } 1836 } 1837 1838 size_t 1839 eap_round_buffersize(addr, direction, size) 1840 void *addr; 1841 int direction; 1842 size_t size; 1843 { 1844 return (size); 1845 } 1846 1847 int 1848 eap_mappage(addr, mem, off, prot) 1849 void *addr; 1850 void *mem; 1851 int off; 1852 int prot; 1853 { 1854 struct eap_softc *sc = addr; 1855 struct eap_dma *p; 1856 1857 if (off < 0) 1858 return (-1); 1859 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1860 ; 1861 if (!p) 1862 return (-1); 1863 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, 1864 off, prot, BUS_DMA_WAITOK)); 1865 } 1866 1867 int 1868 eap_get_props(addr) 1869 void *addr; 1870 { 1871 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1872 AUDIO_PROP_FULLDUPLEX); 1873 } 1874 1875 #if NMIDI > 0 1876 int 1877 eap_midi_open(addr, flags, iintr, ointr, arg) 1878 void *addr; 1879 int flags; 1880 void (*iintr)__P((void *, int)); 1881 void (*ointr)__P((void *)); 1882 void *arg; 1883 { 1884 struct eap_softc *sc = addr; 1885 u_int32_t uctrl; 1886 1887 sc->sc_iintr = iintr; 1888 sc->sc_ointr = ointr; 1889 sc->sc_arg = arg; 1890 1891 EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) | EAP_UART_EN); 1892 uctrl = 0; 1893 if (flags & FREAD) 1894 uctrl |= EAP_UC_RXINTEN; 1895 #if 0 1896 /* I don't understand ../midi.c well enough to use output interrupts */ 1897 if (flags & FWRITE) 1898 uctrl |= EAP_UC_TXINTEN; */ 1899 #endif 1900 EWRITE1(sc, EAP_UART_CONTROL, uctrl); 1901 1902 return (0); 1903 } 1904 1905 void 1906 eap_midi_close(addr) 1907 void *addr; 1908 { 1909 struct eap_softc *sc = addr; 1910 1911 EWRITE1(sc, EAP_UART_CONTROL, 0); 1912 EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) & ~EAP_UART_EN); 1913 1914 sc->sc_iintr = 0; 1915 sc->sc_ointr = 0; 1916 } 1917 1918 int 1919 eap_midi_output(addr, d) 1920 void *addr; 1921 int d; 1922 { 1923 struct eap_softc *sc = addr; 1924 int x; 1925 1926 for (x = 0; x != MIDI_BUSY_WAIT; x++) { 1927 if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_TXRDY) { 1928 EWRITE1(sc, EAP_UART_DATA, d); 1929 return (0); 1930 } 1931 delay(MIDI_BUSY_DELAY); 1932 } 1933 return (EIO); 1934 } 1935 1936 void 1937 eap_midi_getinfo(addr, mi) 1938 void *addr; 1939 struct midi_info *mi; 1940 { 1941 mi->name = "AudioPCI MIDI UART"; 1942 mi->props = MIDI_PROP_CAN_INPUT; 1943 } 1944 1945 #endif 1946
Indexes created Sat Oct 11 19:10:01 GMT 2025