ehci_pci.c revision 1.18.2.7 1 1.18.2.7 yamt /* $NetBSD: ehci_pci.c,v 1.18.2.7 2008/02/04 09:23:28 yamt Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.8 augustss * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss * 3. All advertising materials mentioning features or use of this software
19 1.1 augustss * must display the following acknowledgement:
20 1.1 augustss * This product includes software developed by the NetBSD
21 1.1 augustss * Foundation, Inc. and its contributors.
22 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 augustss * contributors may be used to endorse or promote products derived
24 1.1 augustss * from this software without specific prior written permission.
25 1.1 augustss *
26 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
37 1.1 augustss */
38 1.6 lukem
39 1.6 lukem #include <sys/cdefs.h>
40 1.18.2.7 yamt __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.18.2.7 2008/02/04 09:23:28 yamt Exp $");
41 1.1 augustss
42 1.1 augustss #include <sys/param.h>
43 1.1 augustss #include <sys/systm.h>
44 1.1 augustss #include <sys/kernel.h>
45 1.1 augustss #include <sys/device.h>
46 1.1 augustss #include <sys/proc.h>
47 1.1 augustss #include <sys/queue.h>
48 1.1 augustss
49 1.18.2.5 yamt #include <sys/bus.h>
50 1.1 augustss
51 1.18.2.1 yamt #include <dev/pci/pcidevs.h>
52 1.1 augustss #include <dev/pci/pcivar.h>
53 1.4 augustss #include <dev/pci/usb_pci.h>
54 1.1 augustss
55 1.1 augustss #include <dev/usb/usb.h>
56 1.1 augustss #include <dev/usb/usbdi.h>
57 1.1 augustss #include <dev/usb/usbdivar.h>
58 1.1 augustss #include <dev/usb/usb_mem.h>
59 1.1 augustss
60 1.1 augustss #include <dev/usb/ehcireg.h>
61 1.1 augustss #include <dev/usb/ehcivar.h>
62 1.1 augustss
63 1.5 augustss #ifdef EHCI_DEBUG
64 1.5 augustss #define DPRINTF(x) if (ehcidebug) printf x
65 1.5 augustss extern int ehcidebug;
66 1.5 augustss #else
67 1.5 augustss #define DPRINTF(x)
68 1.5 augustss #endif
69 1.5 augustss
70 1.18.2.7 yamt static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
71 1.18.2.7 yamt pcitag_t tag);
72 1.18.2.1 yamt static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
73 1.18.2.1 yamt pcitag_t tag);
74 1.18.2.7 yamt static bool ehci_pci_suspend(device_t);
75 1.18.2.6 yamt static bool ehci_pci_resume(device_t);
76 1.18.2.1 yamt
77 1.1 augustss struct ehci_pci_softc {
78 1.1 augustss ehci_softc_t sc;
79 1.1 augustss pci_chipset_tag_t sc_pc;
80 1.1 augustss pcitag_t sc_tag;
81 1.1 augustss void *sc_ih; /* interrupt vectoring */
82 1.1 augustss };
83 1.1 augustss
84 1.18.2.1 yamt #define EHCI_MAX_BIOS_WAIT 1000 /* ms */
85 1.18.2.1 yamt
86 1.18 thorpej static int
87 1.18.2.2 yamt ehci_pci_match(struct device *parent, struct cfdata *match,
88 1.18.2.2 yamt void *aux)
89 1.1 augustss {
90 1.1 augustss struct pci_attach_args *pa = (struct pci_attach_args *) aux;
91 1.1 augustss
92 1.1 augustss if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
93 1.1 augustss PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
94 1.1 augustss PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
95 1.1 augustss return (1);
96 1.17 perry
97 1.1 augustss return (0);
98 1.1 augustss }
99 1.1 augustss
100 1.18 thorpej static void
101 1.1 augustss ehci_pci_attach(struct device *parent, struct device *self, void *aux)
102 1.1 augustss {
103 1.1 augustss struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
104 1.1 augustss struct pci_attach_args *pa = (struct pci_attach_args *)aux;
105 1.1 augustss pci_chipset_tag_t pc = pa->pa_pc;
106 1.1 augustss pcitag_t tag = pa->pa_tag;
107 1.1 augustss char const *intrstr;
108 1.1 augustss pci_intr_handle_t ih;
109 1.1 augustss pcireg_t csr;
110 1.16 mycroft const char *vendor;
111 1.16 mycroft const char *devname = sc->sc.sc_bus.bdev.dv_xname;
112 1.1 augustss char devinfo[256];
113 1.1 augustss usbd_status r;
114 1.5 augustss int ncomp;
115 1.5 augustss struct usb_pci *up;
116 1.1 augustss
117 1.13 thorpej aprint_naive(": USB controller\n");
118 1.13 thorpej
119 1.15 itojun pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
120 1.13 thorpej aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
121 1.13 thorpej PCI_REVISION(pa->pa_class));
122 1.1 augustss
123 1.1 augustss /* Map I/O registers */
124 1.1 augustss if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
125 1.1 augustss &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
126 1.13 thorpej aprint_error("%s: can't map memory space\n", devname);
127 1.1 augustss return;
128 1.1 augustss }
129 1.1 augustss
130 1.1 augustss sc->sc_pc = pc;
131 1.1 augustss sc->sc_tag = tag;
132 1.1 augustss sc->sc.sc_bus.dmatag = pa->pa_dmat;
133 1.1 augustss
134 1.1 augustss /* Enable the device. */
135 1.1 augustss csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
136 1.1 augustss pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
137 1.1 augustss csr | PCI_COMMAND_MASTER_ENABLE);
138 1.1 augustss
139 1.4 augustss /* Disable interrupts, so we don't get any spurious ones. */
140 1.5 augustss sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
141 1.5 augustss DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
142 1.4 augustss EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
143 1.4 augustss
144 1.1 augustss /* Map and establish the interrupt. */
145 1.3 sommerfe if (pci_intr_map(pa, &ih)) {
146 1.13 thorpej aprint_error("%s: couldn't map interrupt\n", devname);
147 1.1 augustss return;
148 1.1 augustss }
149 1.1 augustss intrstr = pci_intr_string(pc, ih);
150 1.1 augustss sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc);
151 1.1 augustss if (sc->sc_ih == NULL) {
152 1.13 thorpej aprint_error("%s: couldn't establish interrupt", devname);
153 1.1 augustss if (intrstr != NULL)
154 1.13 thorpej aprint_normal(" at %s", intrstr);
155 1.13 thorpej aprint_normal("\n");
156 1.1 augustss return;
157 1.1 augustss }
158 1.13 thorpej aprint_normal("%s: interrupting at %s\n", devname, intrstr);
159 1.1 augustss
160 1.1 augustss switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
161 1.1 augustss case PCI_USBREV_PRE_1_0:
162 1.1 augustss case PCI_USBREV_1_0:
163 1.1 augustss case PCI_USBREV_1_1:
164 1.4 augustss sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
165 1.18.2.3 yamt aprint_verbose("%s: pre-2.0 USB rev\n", devname);
166 1.4 augustss return;
167 1.1 augustss case PCI_USBREV_2_0:
168 1.1 augustss sc->sc.sc_bus.usbrev = USBREV_2_0;
169 1.1 augustss break;
170 1.1 augustss default:
171 1.1 augustss sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
172 1.1 augustss break;
173 1.1 augustss }
174 1.1 augustss
175 1.1 augustss /* Figure out vendor for root hub descriptor. */
176 1.1 augustss vendor = pci_findvendor(pa->pa_id);
177 1.1 augustss sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
178 1.1 augustss if (vendor)
179 1.14 itojun strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
180 1.1 augustss else
181 1.14 itojun snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
182 1.14 itojun "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
183 1.17 perry
184 1.18.2.1 yamt /* Enable workaround for dropped interrupts as required */
185 1.18.2.4 yamt switch (sc->sc.sc_id_vendor) {
186 1.18.2.4 yamt case PCI_VENDOR_ATI:
187 1.18.2.4 yamt case PCI_VENDOR_VIATECH:
188 1.18.2.1 yamt sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
189 1.18.2.4 yamt aprint_normal("%s: dropped intr workaround enabled\n", devname);
190 1.18.2.4 yamt break;
191 1.18.2.4 yamt default:
192 1.18.2.4 yamt break;
193 1.18.2.4 yamt }
194 1.18.2.1 yamt
195 1.5 augustss /*
196 1.5 augustss * Find companion controllers. According to the spec they always
197 1.5 augustss * have lower function numbers so they should be enumerated already.
198 1.5 augustss */
199 1.5 augustss ncomp = 0;
200 1.5 augustss TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
201 1.5 augustss if (up->bus == pa->pa_bus && up->device == pa->pa_device) {
202 1.5 augustss DPRINTF(("ehci_pci_attach: companion %s\n",
203 1.5 augustss USBDEVNAME(up->usb->bdev)));
204 1.5 augustss sc->sc.sc_comps[ncomp++] = up->usb;
205 1.5 augustss if (ncomp >= EHCI_COMPANION_MAX)
206 1.5 augustss break;
207 1.5 augustss }
208 1.5 augustss }
209 1.5 augustss sc->sc.sc_ncomp = ncomp;
210 1.5 augustss
211 1.18.2.1 yamt ehci_get_ownership(&sc->sc, pc, tag);
212 1.18.2.1 yamt
213 1.18.2.4 yamt r = ehci_init(&sc->sc);
214 1.18.2.4 yamt if (r != USBD_NORMAL_COMPLETION) {
215 1.18.2.4 yamt aprint_error("%s: init failed, error=%d\n", devname, r);
216 1.18.2.4 yamt return;
217 1.18.2.4 yamt }
218 1.18.2.4 yamt
219 1.18.2.7 yamt if (!pmf_device_register(self, ehci_pci_suspend, ehci_pci_resume))
220 1.18.2.6 yamt aprint_error_dev(self, "couldn't establish power handler\n");
221 1.18.2.6 yamt
222 1.1 augustss /* Attach usb device. */
223 1.1 augustss sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
224 1.1 augustss usbctlprint);
225 1.1 augustss }
226 1.1 augustss
227 1.18 thorpej static int
228 1.1 augustss ehci_pci_detach(device_ptr_t self, int flags)
229 1.1 augustss {
230 1.1 augustss struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
231 1.1 augustss int rv;
232 1.1 augustss
233 1.18.2.6 yamt pmf_device_deregister(self);
234 1.1 augustss rv = ehci_detach(&sc->sc, flags);
235 1.1 augustss if (rv)
236 1.1 augustss return (rv);
237 1.1 augustss if (sc->sc_ih != NULL) {
238 1.1 augustss pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
239 1.1 augustss sc->sc_ih = NULL;
240 1.1 augustss }
241 1.1 augustss if (sc->sc.sc_size) {
242 1.18.2.7 yamt ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
243 1.1 augustss bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
244 1.1 augustss sc->sc.sc_size = 0;
245 1.1 augustss }
246 1.18.2.7 yamt
247 1.1 augustss return (0);
248 1.1 augustss }
249 1.18 thorpej
250 1.18 thorpej CFATTACH_DECL(ehci_pci, sizeof(struct ehci_pci_softc),
251 1.18 thorpej ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate);
252 1.18.2.1 yamt
253 1.18.2.1 yamt #ifdef EHCI_DEBUG
254 1.18.2.1 yamt static void
255 1.18.2.1 yamt ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
256 1.18.2.1 yamt {
257 1.18.2.1 yamt u_int32_t cparams, legctlsts, addr, cap, id;
258 1.18.2.1 yamt int maxdump = 10;
259 1.18.2.1 yamt
260 1.18.2.1 yamt cparams = EREAD4(sc, EHCI_HCCPARAMS);
261 1.18.2.1 yamt addr = EHCI_HCC_EECP(cparams);
262 1.18.2.1 yamt while (addr != 0) {
263 1.18.2.1 yamt cap = pci_conf_read(pc, tag, addr);
264 1.18.2.1 yamt id = EHCI_CAP_GET_ID(cap);
265 1.18.2.1 yamt switch (id) {
266 1.18.2.1 yamt case EHCI_CAP_ID_LEGACY:
267 1.18.2.1 yamt legctlsts = pci_conf_read(pc, tag,
268 1.18.2.1 yamt addr + PCI_EHCI_USBLEGCTLSTS);
269 1.18.2.1 yamt printf("ehci_dump_caps: legsup=0x%08x "
270 1.18.2.1 yamt "legctlsts=0x%08x\n", cap, legctlsts);
271 1.18.2.1 yamt break;
272 1.18.2.1 yamt default:
273 1.18.2.1 yamt printf("ehci_dump_caps: cap=0x%08x\n", cap);
274 1.18.2.1 yamt break;
275 1.18.2.1 yamt }
276 1.18.2.1 yamt if (--maxdump < 0)
277 1.18.2.1 yamt break;
278 1.18.2.1 yamt addr = EHCI_CAP_GET_NEXT(cap);
279 1.18.2.1 yamt }
280 1.18.2.1 yamt }
281 1.18.2.1 yamt #endif
282 1.18.2.1 yamt
283 1.18.2.1 yamt static void
284 1.18.2.7 yamt ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
285 1.18.2.7 yamt {
286 1.18.2.7 yamt const char *devname = sc->sc_bus.bdev.dv_xname;
287 1.18.2.7 yamt u_int32_t cparams, addr, cap;
288 1.18.2.7 yamt pcireg_t legsup;
289 1.18.2.7 yamt int maxcap = 10;
290 1.18.2.7 yamt
291 1.18.2.7 yamt cparams = EREAD4(sc, EHCI_HCCPARAMS);
292 1.18.2.7 yamt addr = EHCI_HCC_EECP(cparams);
293 1.18.2.7 yamt while (addr != 0) {
294 1.18.2.7 yamt cap = pci_conf_read(pc, tag, addr);
295 1.18.2.7 yamt if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
296 1.18.2.7 yamt goto next;
297 1.18.2.7 yamt legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
298 1.18.2.7 yamt pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
299 1.18.2.7 yamt legsup & ~EHCI_LEG_HC_OS_OWNED);
300 1.18.2.7 yamt
301 1.18.2.7 yamt next:
302 1.18.2.7 yamt if (--maxcap < 0) {
303 1.18.2.7 yamt aprint_normal("%s: broken extended capabilities "
304 1.18.2.7 yamt "ignored\n", devname);
305 1.18.2.7 yamt return;
306 1.18.2.7 yamt }
307 1.18.2.7 yamt addr = EHCI_CAP_GET_NEXT(cap);
308 1.18.2.7 yamt }
309 1.18.2.7 yamt }
310 1.18.2.7 yamt
311 1.18.2.7 yamt static void
312 1.18.2.1 yamt ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
313 1.18.2.1 yamt {
314 1.18.2.1 yamt const char *devname = sc->sc_bus.bdev.dv_xname;
315 1.18.2.7 yamt u_int32_t cparams, addr, cap;
316 1.18.2.7 yamt pcireg_t legsup;
317 1.18.2.1 yamt int maxcap = 10;
318 1.18.2.1 yamt int ms;
319 1.18.2.1 yamt
320 1.18.2.1 yamt #ifdef EHCI_DEBUG
321 1.18.2.1 yamt if (ehcidebug)
322 1.18.2.1 yamt ehci_dump_caps(sc, pc, tag);
323 1.18.2.1 yamt #endif
324 1.18.2.1 yamt cparams = EREAD4(sc, EHCI_HCCPARAMS);
325 1.18.2.1 yamt addr = EHCI_HCC_EECP(cparams);
326 1.18.2.1 yamt while (addr != 0) {
327 1.18.2.1 yamt cap = pci_conf_read(pc, tag, addr);
328 1.18.2.7 yamt if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
329 1.18.2.7 yamt goto next;
330 1.18.2.7 yamt legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
331 1.18.2.7 yamt /* Ask BIOS to give up ownership */
332 1.18.2.7 yamt pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
333 1.18.2.7 yamt legsup | EHCI_LEG_HC_OS_OWNED);
334 1.18.2.7 yamt if (legsup & EHCI_LEG_HC_BIOS_OWNED) {
335 1.18.2.7 yamt for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) {
336 1.18.2.7 yamt legsup = pci_conf_read(pc, tag,
337 1.18.2.7 yamt addr + PCI_EHCI_USBLEGSUP);
338 1.18.2.7 yamt if (!(legsup & EHCI_LEG_HC_BIOS_OWNED))
339 1.18.2.7 yamt break;
340 1.18.2.7 yamt delay(1000);
341 1.18.2.7 yamt }
342 1.18.2.7 yamt if (ms == EHCI_MAX_BIOS_WAIT) {
343 1.18.2.7 yamt aprint_normal("%s: BIOS refuses to give up "
344 1.18.2.7 yamt "ownership, using force\n", devname);
345 1.18.2.7 yamt pci_conf_write(pc, tag,
346 1.18.2.7 yamt addr + PCI_EHCI_USBLEGSUP, 0);
347 1.18.2.7 yamt } else
348 1.18.2.7 yamt aprint_verbose("%s: BIOS has given up "
349 1.18.2.7 yamt "ownership\n", devname);
350 1.18.2.7 yamt }
351 1.18.2.7 yamt
352 1.18.2.7 yamt /* Disable SMIs */
353 1.18.2.7 yamt pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS,
354 1.18.2.7 yamt EHCI_LEG_EXT_SMI_BAR | EHCI_LEG_EXT_SMI_PCICMD |
355 1.18.2.7 yamt EHCI_LEG_EXT_SMI_OS_CHANGE);
356 1.18.2.7 yamt
357 1.18.2.7 yamt next:
358 1.18.2.1 yamt if (--maxcap < 0) {
359 1.18.2.1 yamt aprint_normal("%s: broken extended capabilities "
360 1.18.2.1 yamt "ignored\n", devname);
361 1.18.2.1 yamt return;
362 1.18.2.1 yamt }
363 1.18.2.1 yamt addr = EHCI_CAP_GET_NEXT(cap);
364 1.18.2.1 yamt }
365 1.18.2.1 yamt
366 1.18.2.7 yamt }
367 1.18.2.4 yamt
368 1.18.2.7 yamt static bool
369 1.18.2.7 yamt ehci_pci_suspend(device_t dv)
370 1.18.2.7 yamt {
371 1.18.2.7 yamt struct ehci_pci_softc *sc = device_private(dv);
372 1.18.2.7 yamt
373 1.18.2.7 yamt ehci_suspend(dv);
374 1.18.2.7 yamt ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
375 1.18.2.7 yamt
376 1.18.2.7 yamt return true;
377 1.18.2.1 yamt }
378 1.18.2.1 yamt
379 1.18.2.6 yamt static bool
380 1.18.2.6 yamt ehci_pci_resume(device_t dv)
381 1.18.2.1 yamt {
382 1.18.2.6 yamt struct ehci_pci_softc *sc = device_private(dv);
383 1.18.2.1 yamt
384 1.18.2.6 yamt ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
385 1.18.2.6 yamt return ehci_resume(dv);
386 1.18.2.1 yamt }
387