ehci_pci.c revision 1.23 1 1.23 jmcneill /* $NetBSD: ehci_pci.c,v 1.23 2006/03/10 17:21:20 jmcneill Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.8 augustss * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss * 3. All advertising materials mentioning features or use of this software
19 1.1 augustss * must display the following acknowledgement:
20 1.1 augustss * This product includes software developed by the NetBSD
21 1.1 augustss * Foundation, Inc. and its contributors.
22 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 augustss * contributors may be used to endorse or promote products derived
24 1.1 augustss * from this software without specific prior written permission.
25 1.1 augustss *
26 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
37 1.1 augustss */
38 1.6 lukem
39 1.6 lukem #include <sys/cdefs.h>
40 1.23 jmcneill __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.23 2006/03/10 17:21:20 jmcneill Exp $");
41 1.1 augustss
42 1.1 augustss #include <sys/param.h>
43 1.1 augustss #include <sys/systm.h>
44 1.1 augustss #include <sys/kernel.h>
45 1.1 augustss #include <sys/device.h>
46 1.1 augustss #include <sys/proc.h>
47 1.1 augustss #include <sys/queue.h>
48 1.1 augustss
49 1.1 augustss #include <machine/bus.h>
50 1.1 augustss
51 1.22 xtraeme #include <dev/pci/pcidevs.h>
52 1.1 augustss #include <dev/pci/pcivar.h>
53 1.4 augustss #include <dev/pci/usb_pci.h>
54 1.1 augustss
55 1.1 augustss #include <dev/usb/usb.h>
56 1.1 augustss #include <dev/usb/usbdi.h>
57 1.1 augustss #include <dev/usb/usbdivar.h>
58 1.1 augustss #include <dev/usb/usb_mem.h>
59 1.1 augustss
60 1.1 augustss #include <dev/usb/ehcireg.h>
61 1.1 augustss #include <dev/usb/ehcivar.h>
62 1.1 augustss
63 1.5 augustss #ifdef EHCI_DEBUG
64 1.5 augustss #define DPRINTF(x) if (ehcidebug) printf x
65 1.5 augustss extern int ehcidebug;
66 1.5 augustss #else
67 1.5 augustss #define DPRINTF(x)
68 1.5 augustss #endif
69 1.5 augustss
70 1.19 augustss static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
71 1.19 augustss pcitag_t tag);
72 1.23 jmcneill static void ehci_pci_powerhook(int, void *);
73 1.19 augustss
74 1.1 augustss struct ehci_pci_softc {
75 1.1 augustss ehci_softc_t sc;
76 1.1 augustss pci_chipset_tag_t sc_pc;
77 1.1 augustss pcitag_t sc_tag;
78 1.1 augustss void *sc_ih; /* interrupt vectoring */
79 1.23 jmcneill
80 1.23 jmcneill void *sc_powerhook;
81 1.23 jmcneill struct pci_conf_state sc_pciconf;
82 1.1 augustss };
83 1.1 augustss
84 1.19 augustss #define EHCI_MAX_BIOS_WAIT 1000 /* ms */
85 1.19 augustss
86 1.18 thorpej static int
87 1.1 augustss ehci_pci_match(struct device *parent, struct cfdata *match, void *aux)
88 1.1 augustss {
89 1.1 augustss struct pci_attach_args *pa = (struct pci_attach_args *) aux;
90 1.1 augustss
91 1.1 augustss if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
92 1.1 augustss PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
93 1.1 augustss PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
94 1.1 augustss return (1);
95 1.17 perry
96 1.1 augustss return (0);
97 1.1 augustss }
98 1.1 augustss
99 1.18 thorpej static void
100 1.1 augustss ehci_pci_attach(struct device *parent, struct device *self, void *aux)
101 1.1 augustss {
102 1.1 augustss struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
103 1.1 augustss struct pci_attach_args *pa = (struct pci_attach_args *)aux;
104 1.1 augustss pci_chipset_tag_t pc = pa->pa_pc;
105 1.1 augustss pcitag_t tag = pa->pa_tag;
106 1.1 augustss char const *intrstr;
107 1.1 augustss pci_intr_handle_t ih;
108 1.1 augustss pcireg_t csr;
109 1.16 mycroft const char *vendor;
110 1.16 mycroft const char *devname = sc->sc.sc_bus.bdev.dv_xname;
111 1.1 augustss char devinfo[256];
112 1.1 augustss usbd_status r;
113 1.5 augustss int ncomp;
114 1.5 augustss struct usb_pci *up;
115 1.1 augustss
116 1.13 thorpej aprint_naive(": USB controller\n");
117 1.13 thorpej
118 1.15 itojun pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
119 1.13 thorpej aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
120 1.13 thorpej PCI_REVISION(pa->pa_class));
121 1.1 augustss
122 1.1 augustss /* Map I/O registers */
123 1.1 augustss if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
124 1.1 augustss &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
125 1.13 thorpej aprint_error("%s: can't map memory space\n", devname);
126 1.1 augustss return;
127 1.1 augustss }
128 1.1 augustss
129 1.1 augustss sc->sc_pc = pc;
130 1.1 augustss sc->sc_tag = tag;
131 1.1 augustss sc->sc.sc_bus.dmatag = pa->pa_dmat;
132 1.1 augustss
133 1.1 augustss /* Enable the device. */
134 1.1 augustss csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
135 1.1 augustss pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
136 1.1 augustss csr | PCI_COMMAND_MASTER_ENABLE);
137 1.1 augustss
138 1.4 augustss /* Disable interrupts, so we don't get any spurious ones. */
139 1.5 augustss sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
140 1.5 augustss DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
141 1.4 augustss EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
142 1.4 augustss
143 1.1 augustss /* Map and establish the interrupt. */
144 1.3 sommerfe if (pci_intr_map(pa, &ih)) {
145 1.13 thorpej aprint_error("%s: couldn't map interrupt\n", devname);
146 1.1 augustss return;
147 1.1 augustss }
148 1.1 augustss intrstr = pci_intr_string(pc, ih);
149 1.1 augustss sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc);
150 1.1 augustss if (sc->sc_ih == NULL) {
151 1.13 thorpej aprint_error("%s: couldn't establish interrupt", devname);
152 1.1 augustss if (intrstr != NULL)
153 1.13 thorpej aprint_normal(" at %s", intrstr);
154 1.13 thorpej aprint_normal("\n");
155 1.1 augustss return;
156 1.1 augustss }
157 1.13 thorpej aprint_normal("%s: interrupting at %s\n", devname, intrstr);
158 1.1 augustss
159 1.1 augustss switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
160 1.1 augustss case PCI_USBREV_PRE_1_0:
161 1.1 augustss case PCI_USBREV_1_0:
162 1.1 augustss case PCI_USBREV_1_1:
163 1.4 augustss sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
164 1.13 thorpej aprint_normal("%s: pre-2.0 USB rev\n", devname);
165 1.4 augustss return;
166 1.1 augustss case PCI_USBREV_2_0:
167 1.1 augustss sc->sc.sc_bus.usbrev = USBREV_2_0;
168 1.1 augustss break;
169 1.1 augustss default:
170 1.1 augustss sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
171 1.1 augustss break;
172 1.1 augustss }
173 1.1 augustss
174 1.1 augustss /* Figure out vendor for root hub descriptor. */
175 1.1 augustss vendor = pci_findvendor(pa->pa_id);
176 1.1 augustss sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
177 1.1 augustss if (vendor)
178 1.14 itojun strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
179 1.1 augustss else
180 1.14 itojun snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
181 1.14 itojun "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
182 1.17 perry
183 1.22 xtraeme /* Enable workaround for dropped interrupts as required */
184 1.22 xtraeme if (sc->sc.sc_id_vendor == PCI_VENDOR_VIATECH)
185 1.22 xtraeme sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
186 1.22 xtraeme
187 1.5 augustss /*
188 1.5 augustss * Find companion controllers. According to the spec they always
189 1.5 augustss * have lower function numbers so they should be enumerated already.
190 1.5 augustss */
191 1.5 augustss ncomp = 0;
192 1.5 augustss TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
193 1.5 augustss if (up->bus == pa->pa_bus && up->device == pa->pa_device) {
194 1.5 augustss DPRINTF(("ehci_pci_attach: companion %s\n",
195 1.5 augustss USBDEVNAME(up->usb->bdev)));
196 1.5 augustss sc->sc.sc_comps[ncomp++] = up->usb;
197 1.5 augustss if (ncomp >= EHCI_COMPANION_MAX)
198 1.5 augustss break;
199 1.5 augustss }
200 1.5 augustss }
201 1.5 augustss sc->sc.sc_ncomp = ncomp;
202 1.5 augustss
203 1.19 augustss ehci_get_ownership(&sc->sc, pc, tag);
204 1.19 augustss
205 1.1 augustss r = ehci_init(&sc->sc);
206 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
207 1.13 thorpej aprint_error("%s: init failed, error=%d\n", devname, r);
208 1.1 augustss return;
209 1.1 augustss }
210 1.1 augustss
211 1.23 jmcneill sc->sc_powerhook = powerhook_establish(ehci_pci_powerhook, sc);
212 1.23 jmcneill if (sc->sc_powerhook == NULL)
213 1.23 jmcneill aprint_error("%s: couldn't establish powerhook\n",
214 1.23 jmcneill devname);
215 1.23 jmcneill
216 1.1 augustss /* Attach usb device. */
217 1.1 augustss sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
218 1.1 augustss usbctlprint);
219 1.1 augustss }
220 1.1 augustss
221 1.18 thorpej static int
222 1.1 augustss ehci_pci_detach(device_ptr_t self, int flags)
223 1.1 augustss {
224 1.1 augustss struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
225 1.1 augustss int rv;
226 1.1 augustss
227 1.23 jmcneill if (sc->sc_powerhook != NULL)
228 1.23 jmcneill powerhook_disestablish(sc->sc_powerhook);
229 1.23 jmcneill
230 1.1 augustss rv = ehci_detach(&sc->sc, flags);
231 1.1 augustss if (rv)
232 1.1 augustss return (rv);
233 1.1 augustss if (sc->sc_ih != NULL) {
234 1.1 augustss pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
235 1.1 augustss sc->sc_ih = NULL;
236 1.1 augustss }
237 1.1 augustss if (sc->sc.sc_size) {
238 1.1 augustss bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
239 1.1 augustss sc->sc.sc_size = 0;
240 1.1 augustss }
241 1.1 augustss return (0);
242 1.1 augustss }
243 1.18 thorpej
244 1.18 thorpej CFATTACH_DECL(ehci_pci, sizeof(struct ehci_pci_softc),
245 1.18 thorpej ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate);
246 1.19 augustss
247 1.19 augustss #ifdef EHCI_DEBUG
248 1.19 augustss static void
249 1.19 augustss ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
250 1.19 augustss {
251 1.19 augustss u_int32_t cparams, legctlsts, addr, cap, id;
252 1.19 augustss int maxdump = 10;
253 1.19 augustss
254 1.19 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
255 1.19 augustss addr = EHCI_HCC_EECP(cparams);
256 1.19 augustss while (addr != 0) {
257 1.19 augustss cap = pci_conf_read(pc, tag, addr);
258 1.19 augustss id = EHCI_CAP_GET_ID(cap);
259 1.19 augustss switch (id) {
260 1.19 augustss case EHCI_CAP_ID_LEGACY:
261 1.19 augustss legctlsts = pci_conf_read(pc, tag,
262 1.19 augustss addr + PCI_EHCI_USBLEGCTLSTS);
263 1.20 augustss printf("ehci_dump_caps: legsup=0x%08x "
264 1.20 augustss "legctlsts=0x%08x\n", cap, legctlsts);
265 1.19 augustss break;
266 1.19 augustss default:
267 1.20 augustss printf("ehci_dump_caps: cap=0x%08x\n", cap);
268 1.19 augustss break;
269 1.19 augustss }
270 1.19 augustss if (--maxdump < 0)
271 1.19 augustss break;
272 1.19 augustss addr = EHCI_CAP_GET_NEXT(cap);
273 1.19 augustss }
274 1.19 augustss }
275 1.19 augustss #endif
276 1.19 augustss
277 1.19 augustss static void
278 1.19 augustss ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
279 1.19 augustss {
280 1.19 augustss const char *devname = sc->sc_bus.bdev.dv_xname;
281 1.19 augustss u_int32_t cparams, addr, cap, legsup;
282 1.19 augustss int maxcap = 10;
283 1.19 augustss int ms;
284 1.19 augustss
285 1.19 augustss #ifdef EHCI_DEBUG
286 1.20 augustss if (ehcidebug)
287 1.20 augustss ehci_dump_caps(sc, pc, tag);
288 1.19 augustss #endif
289 1.19 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
290 1.19 augustss addr = EHCI_HCC_EECP(cparams);
291 1.19 augustss while (addr != 0) {
292 1.19 augustss cap = pci_conf_read(pc, tag, addr);
293 1.19 augustss if (EHCI_CAP_GET_ID(cap) == EHCI_CAP_ID_LEGACY)
294 1.19 augustss break;
295 1.21 augustss if (--maxcap < 0) {
296 1.21 augustss aprint_normal("%s: broken extended capabilities "
297 1.21 augustss "ignored\n", devname);
298 1.19 augustss return;
299 1.21 augustss }
300 1.19 augustss addr = EHCI_CAP_GET_NEXT(cap);
301 1.19 augustss }
302 1.19 augustss
303 1.19 augustss legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
304 1.19 augustss /* Ask BIOS to give up ownership */
305 1.19 augustss legsup |= EHCI_LEG_HC_OS_OWNED;
306 1.19 augustss pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, legsup);
307 1.19 augustss for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) {
308 1.19 augustss legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
309 1.19 augustss if (!(legsup & EHCI_LEG_HC_BIOS_OWNED))
310 1.19 augustss break;
311 1.19 augustss delay(1000);
312 1.19 augustss }
313 1.19 augustss if (ms == EHCI_MAX_BIOS_WAIT) {
314 1.19 augustss aprint_normal("%s: BIOS refuses to give up ownership, "
315 1.19 augustss "using force\n", devname);
316 1.19 augustss pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 0);
317 1.19 augustss pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0);
318 1.19 augustss } else {
319 1.19 augustss aprint_normal("%s: BIOS has given up ownership\n", devname);
320 1.19 augustss }
321 1.19 augustss }
322 1.23 jmcneill
323 1.23 jmcneill static void
324 1.23 jmcneill ehci_pci_powerhook(int why, void *opaque)
325 1.23 jmcneill {
326 1.23 jmcneill struct ehci_pci_softc *sc;
327 1.23 jmcneill pci_chipset_tag_t pc;
328 1.23 jmcneill pcitag_t tag;
329 1.23 jmcneill
330 1.23 jmcneill sc = (struct ehci_pci_softc *)opaque;
331 1.23 jmcneill pc = sc->sc_pc;
332 1.23 jmcneill tag = sc->sc_tag;
333 1.23 jmcneill
334 1.23 jmcneill switch (why) {
335 1.23 jmcneill case PWR_STANDBY:
336 1.23 jmcneill case PWR_SUSPEND:
337 1.23 jmcneill pci_conf_capture(pc, tag, &sc->sc_pciconf);
338 1.23 jmcneill break;
339 1.23 jmcneill case PWR_RESUME:
340 1.23 jmcneill pci_conf_restore(pc, tag, &sc->sc_pciconf);
341 1.23 jmcneill ehci_get_ownership(&sc->sc, pc, tag);
342 1.23 jmcneill break;
343 1.23 jmcneill }
344 1.23 jmcneill
345 1.23 jmcneill return;
346 1.23 jmcneill }
347