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ehci_pci.c revision 1.32
      1  1.32  jmcneill /*	$NetBSD: ehci_pci.c,v 1.32 2007/12/09 20:28:07 jmcneill Exp $	*/
      2   1.1  augustss 
      3   1.1  augustss /*
      4   1.8  augustss  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
      5   1.1  augustss  * All rights reserved.
      6   1.1  augustss  *
      7   1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1  augustss  * by Lennart Augustsson (lennart (at) augustsson.net).
      9   1.1  augustss  *
     10   1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11   1.1  augustss  * modification, are permitted provided that the following conditions
     12   1.1  augustss  * are met:
     13   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15   1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17   1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18   1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     19   1.1  augustss  *    must display the following acknowledgement:
     20   1.1  augustss  *        This product includes software developed by the NetBSD
     21   1.1  augustss  *        Foundation, Inc. and its contributors.
     22   1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23   1.1  augustss  *    contributors may be used to endorse or promote products derived
     24   1.1  augustss  *    from this software without specific prior written permission.
     25   1.1  augustss  *
     26   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27   1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28   1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29   1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30   1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31   1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32   1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33   1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34   1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35   1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36   1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     37   1.1  augustss  */
     38   1.6     lukem 
     39   1.6     lukem #include <sys/cdefs.h>
     40  1.32  jmcneill __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.32 2007/12/09 20:28:07 jmcneill Exp $");
     41   1.1  augustss 
     42   1.1  augustss #include <sys/param.h>
     43   1.1  augustss #include <sys/systm.h>
     44   1.1  augustss #include <sys/kernel.h>
     45   1.1  augustss #include <sys/device.h>
     46   1.1  augustss #include <sys/proc.h>
     47   1.1  augustss #include <sys/queue.h>
     48   1.1  augustss 
     49  1.31        ad #include <sys/bus.h>
     50   1.1  augustss 
     51  1.22   xtraeme #include <dev/pci/pcidevs.h>
     52   1.1  augustss #include <dev/pci/pcivar.h>
     53   1.4  augustss #include <dev/pci/usb_pci.h>
     54   1.1  augustss 
     55   1.1  augustss #include <dev/usb/usb.h>
     56   1.1  augustss #include <dev/usb/usbdi.h>
     57   1.1  augustss #include <dev/usb/usbdivar.h>
     58   1.1  augustss #include <dev/usb/usb_mem.h>
     59   1.1  augustss 
     60   1.1  augustss #include <dev/usb/ehcireg.h>
     61   1.1  augustss #include <dev/usb/ehcivar.h>
     62   1.1  augustss 
     63   1.5  augustss #ifdef EHCI_DEBUG
     64   1.5  augustss #define DPRINTF(x)	if (ehcidebug) printf x
     65   1.5  augustss extern int ehcidebug;
     66   1.5  augustss #else
     67   1.5  augustss #define DPRINTF(x)
     68   1.5  augustss #endif
     69   1.5  augustss 
     70  1.19  augustss static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
     71  1.19  augustss 			       pcitag_t tag);
     72  1.32  jmcneill static bool ehci_pci_resume(device_t);
     73  1.19  augustss 
     74   1.1  augustss struct ehci_pci_softc {
     75   1.1  augustss 	ehci_softc_t		sc;
     76   1.1  augustss 	pci_chipset_tag_t	sc_pc;
     77   1.1  augustss 	pcitag_t		sc_tag;
     78   1.1  augustss 	void 			*sc_ih;		/* interrupt vectoring */
     79   1.1  augustss };
     80   1.1  augustss 
     81  1.19  augustss #define EHCI_MAX_BIOS_WAIT		1000 /* ms */
     82  1.19  augustss 
     83  1.18   thorpej static int
     84  1.26  christos ehci_pci_match(struct device *parent, struct cfdata *match,
     85  1.25  christos     void *aux)
     86   1.1  augustss {
     87   1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     88   1.1  augustss 
     89   1.1  augustss 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
     90   1.1  augustss 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
     91   1.1  augustss 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
     92   1.1  augustss 		return (1);
     93  1.17     perry 
     94   1.1  augustss 	return (0);
     95   1.1  augustss }
     96   1.1  augustss 
     97  1.18   thorpej static void
     98  1.26  christos ehci_pci_attach(struct device *parent, struct device *self, void *aux)
     99   1.1  augustss {
    100   1.1  augustss 	struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
    101   1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    102   1.1  augustss 	pci_chipset_tag_t pc = pa->pa_pc;
    103   1.1  augustss 	pcitag_t tag = pa->pa_tag;
    104   1.1  augustss 	char const *intrstr;
    105   1.1  augustss 	pci_intr_handle_t ih;
    106   1.1  augustss 	pcireg_t csr;
    107  1.16   mycroft 	const char *vendor;
    108  1.16   mycroft 	const char *devname = sc->sc.sc_bus.bdev.dv_xname;
    109   1.1  augustss 	char devinfo[256];
    110   1.1  augustss 	usbd_status r;
    111   1.5  augustss 	int ncomp;
    112   1.5  augustss 	struct usb_pci *up;
    113   1.1  augustss 
    114  1.13   thorpej 	aprint_naive(": USB controller\n");
    115  1.13   thorpej 
    116  1.15    itojun 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    117  1.13   thorpej 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    118  1.13   thorpej 	    PCI_REVISION(pa->pa_class));
    119   1.1  augustss 
    120   1.1  augustss 	/* Map I/O registers */
    121   1.1  augustss 	if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
    122   1.1  augustss 			   &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
    123  1.13   thorpej 		aprint_error("%s: can't map memory space\n", devname);
    124   1.1  augustss 		return;
    125   1.1  augustss 	}
    126   1.1  augustss 
    127   1.1  augustss 	sc->sc_pc = pc;
    128   1.1  augustss 	sc->sc_tag = tag;
    129   1.1  augustss 	sc->sc.sc_bus.dmatag = pa->pa_dmat;
    130   1.1  augustss 
    131   1.1  augustss 	/* Enable the device. */
    132   1.1  augustss 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    133   1.1  augustss 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
    134   1.1  augustss 		       csr | PCI_COMMAND_MASTER_ENABLE);
    135   1.1  augustss 
    136   1.4  augustss 	/* Disable interrupts, so we don't get any spurious ones. */
    137   1.5  augustss 	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
    138   1.5  augustss 	DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
    139   1.4  augustss 	EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
    140   1.4  augustss 
    141   1.1  augustss 	/* Map and establish the interrupt. */
    142   1.3  sommerfe 	if (pci_intr_map(pa, &ih)) {
    143  1.13   thorpej 		aprint_error("%s: couldn't map interrupt\n", devname);
    144   1.1  augustss 		return;
    145   1.1  augustss 	}
    146   1.1  augustss 	intrstr = pci_intr_string(pc, ih);
    147   1.1  augustss 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc);
    148   1.1  augustss 	if (sc->sc_ih == NULL) {
    149  1.13   thorpej 		aprint_error("%s: couldn't establish interrupt", devname);
    150   1.1  augustss 		if (intrstr != NULL)
    151  1.13   thorpej 			aprint_normal(" at %s", intrstr);
    152  1.13   thorpej 		aprint_normal("\n");
    153   1.1  augustss 		return;
    154   1.1  augustss 	}
    155  1.13   thorpej 	aprint_normal("%s: interrupting at %s\n", devname, intrstr);
    156   1.1  augustss 
    157   1.1  augustss 	switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
    158   1.1  augustss 	case PCI_USBREV_PRE_1_0:
    159   1.1  augustss 	case PCI_USBREV_1_0:
    160   1.1  augustss 	case PCI_USBREV_1_1:
    161   1.4  augustss 		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
    162  1.27        ad 		aprint_verbose("%s: pre-2.0 USB rev\n", devname);
    163   1.4  augustss 		return;
    164   1.1  augustss 	case PCI_USBREV_2_0:
    165   1.1  augustss 		sc->sc.sc_bus.usbrev = USBREV_2_0;
    166   1.1  augustss 		break;
    167   1.1  augustss 	default:
    168   1.1  augustss 		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
    169   1.1  augustss 		break;
    170   1.1  augustss 	}
    171   1.1  augustss 
    172   1.1  augustss 	/* Figure out vendor for root hub descriptor. */
    173   1.1  augustss 	vendor = pci_findvendor(pa->pa_id);
    174   1.1  augustss 	sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
    175   1.1  augustss 	if (vendor)
    176  1.14    itojun 		strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
    177   1.1  augustss 	else
    178  1.14    itojun 		snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
    179  1.14    itojun 		    "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
    180  1.17     perry 
    181  1.22   xtraeme 	/* Enable workaround for dropped interrupts as required */
    182  1.30   tsutsui 	switch (sc->sc.sc_id_vendor) {
    183  1.30   tsutsui 	case PCI_VENDOR_ATI:
    184  1.30   tsutsui 	case PCI_VENDOR_VIATECH:
    185  1.22   xtraeme 		sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
    186  1.30   tsutsui 		aprint_normal("%s: dropped intr workaround enabled\n", devname);
    187  1.30   tsutsui 		break;
    188  1.30   tsutsui 	default:
    189  1.30   tsutsui 		break;
    190  1.30   tsutsui 	}
    191  1.22   xtraeme 
    192   1.5  augustss 	/*
    193   1.5  augustss 	 * Find companion controllers.  According to the spec they always
    194   1.5  augustss 	 * have lower function numbers so they should be enumerated already.
    195   1.5  augustss 	 */
    196   1.5  augustss 	ncomp = 0;
    197   1.5  augustss 	TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
    198   1.5  augustss 		if (up->bus == pa->pa_bus && up->device == pa->pa_device) {
    199   1.5  augustss 			DPRINTF(("ehci_pci_attach: companion %s\n",
    200   1.5  augustss 				 USBDEVNAME(up->usb->bdev)));
    201   1.5  augustss 			sc->sc.sc_comps[ncomp++] = up->usb;
    202   1.5  augustss 			if (ncomp >= EHCI_COMPANION_MAX)
    203   1.5  augustss 				break;
    204   1.5  augustss 		}
    205   1.5  augustss 	}
    206   1.5  augustss 	sc->sc.sc_ncomp = ncomp;
    207   1.5  augustss 
    208  1.19  augustss 	ehci_get_ownership(&sc->sc, pc, tag);
    209  1.19  augustss 
    210   1.1  augustss 	r = ehci_init(&sc->sc);
    211   1.1  augustss 	if (r != USBD_NORMAL_COMPLETION) {
    212  1.13   thorpej 		aprint_error("%s: init failed, error=%d\n", devname, r);
    213   1.1  augustss 		return;
    214   1.1  augustss 	}
    215   1.1  augustss 
    216  1.32  jmcneill 	if (!pmf_device_register(self, ehci_suspend, ehci_pci_resume))
    217  1.32  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    218  1.32  jmcneill 
    219   1.1  augustss 	/* Attach usb device. */
    220   1.1  augustss 	sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
    221   1.1  augustss 				       usbctlprint);
    222   1.1  augustss }
    223   1.1  augustss 
    224  1.18   thorpej static int
    225   1.1  augustss ehci_pci_detach(device_ptr_t self, int flags)
    226   1.1  augustss {
    227   1.1  augustss 	struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
    228   1.1  augustss 	int rv;
    229   1.1  augustss 
    230  1.32  jmcneill 	pmf_device_deregister(self);
    231   1.1  augustss 	rv = ehci_detach(&sc->sc, flags);
    232   1.1  augustss 	if (rv)
    233   1.1  augustss 		return (rv);
    234   1.1  augustss 	if (sc->sc_ih != NULL) {
    235   1.1  augustss 		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
    236   1.1  augustss 		sc->sc_ih = NULL;
    237   1.1  augustss 	}
    238   1.1  augustss 	if (sc->sc.sc_size) {
    239   1.1  augustss 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
    240   1.1  augustss 		sc->sc.sc_size = 0;
    241   1.1  augustss 	}
    242   1.1  augustss 	return (0);
    243   1.1  augustss }
    244  1.18   thorpej 
    245  1.18   thorpej CFATTACH_DECL(ehci_pci, sizeof(struct ehci_pci_softc),
    246  1.18   thorpej     ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate);
    247  1.19  augustss 
    248  1.19  augustss #ifdef EHCI_DEBUG
    249  1.19  augustss static void
    250  1.19  augustss ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    251  1.19  augustss {
    252  1.19  augustss 	u_int32_t cparams, legctlsts, addr, cap, id;
    253  1.19  augustss 	int maxdump = 10;
    254  1.19  augustss 
    255  1.19  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    256  1.19  augustss 	addr = EHCI_HCC_EECP(cparams);
    257  1.19  augustss 	while (addr != 0) {
    258  1.19  augustss 		cap = pci_conf_read(pc, tag, addr);
    259  1.19  augustss 		id = EHCI_CAP_GET_ID(cap);
    260  1.19  augustss 		switch (id) {
    261  1.19  augustss 		case EHCI_CAP_ID_LEGACY:
    262  1.19  augustss 			legctlsts = pci_conf_read(pc, tag,
    263  1.19  augustss 						  addr + PCI_EHCI_USBLEGCTLSTS);
    264  1.20  augustss 			printf("ehci_dump_caps: legsup=0x%08x "
    265  1.20  augustss 			       "legctlsts=0x%08x\n", cap, legctlsts);
    266  1.19  augustss 			break;
    267  1.19  augustss 		default:
    268  1.20  augustss 			printf("ehci_dump_caps: cap=0x%08x\n", cap);
    269  1.19  augustss 			break;
    270  1.19  augustss 		}
    271  1.19  augustss 		if (--maxdump < 0)
    272  1.19  augustss 			break;
    273  1.19  augustss 		addr = EHCI_CAP_GET_NEXT(cap);
    274  1.19  augustss 	}
    275  1.19  augustss }
    276  1.19  augustss #endif
    277  1.19  augustss 
    278  1.19  augustss static void
    279  1.19  augustss ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    280  1.19  augustss {
    281  1.19  augustss 	const char *devname = sc->sc_bus.bdev.dv_xname;
    282  1.19  augustss 	u_int32_t cparams, addr, cap, legsup;
    283  1.19  augustss 	int maxcap = 10;
    284  1.19  augustss 	int ms;
    285  1.19  augustss 
    286  1.19  augustss #ifdef EHCI_DEBUG
    287  1.20  augustss 	if (ehcidebug)
    288  1.20  augustss 		ehci_dump_caps(sc, pc, tag);
    289  1.19  augustss #endif
    290  1.19  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    291  1.19  augustss 	addr = EHCI_HCC_EECP(cparams);
    292  1.19  augustss 	while (addr != 0) {
    293  1.19  augustss 		cap = pci_conf_read(pc, tag, addr);
    294  1.19  augustss 		if (EHCI_CAP_GET_ID(cap) == EHCI_CAP_ID_LEGACY)
    295  1.19  augustss 			break;
    296  1.21  augustss 		if (--maxcap < 0) {
    297  1.21  augustss 			aprint_normal("%s: broken extended capabilities "
    298  1.21  augustss 				      "ignored\n", devname);
    299  1.19  augustss 			return;
    300  1.21  augustss 		}
    301  1.19  augustss 		addr = EHCI_CAP_GET_NEXT(cap);
    302  1.19  augustss 	}
    303  1.19  augustss 
    304  1.28  jmcneill 	/* If the USB legacy capability is not specified, we are done */
    305  1.28  jmcneill 	if (addr == 0)
    306  1.28  jmcneill 		return;
    307  1.28  jmcneill 
    308  1.19  augustss 	legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
    309  1.19  augustss 	/* Ask BIOS to give up ownership */
    310  1.19  augustss 	legsup |= EHCI_LEG_HC_OS_OWNED;
    311  1.19  augustss 	pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, legsup);
    312  1.19  augustss 	for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) {
    313  1.19  augustss 		legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
    314  1.19  augustss 		if (!(legsup & EHCI_LEG_HC_BIOS_OWNED))
    315  1.19  augustss 			break;
    316  1.19  augustss 		delay(1000);
    317  1.19  augustss 	}
    318  1.19  augustss 	if (ms == EHCI_MAX_BIOS_WAIT) {
    319  1.19  augustss 		aprint_normal("%s: BIOS refuses to give up ownership, "
    320  1.19  augustss 			      "using force\n", devname);
    321  1.19  augustss 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 0);
    322  1.19  augustss 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0);
    323  1.19  augustss 	} else {
    324  1.27        ad 		aprint_verbose("%s: BIOS has given up ownership\n", devname);
    325  1.19  augustss 	}
    326  1.19  augustss }
    327  1.23  jmcneill 
    328  1.32  jmcneill static bool
    329  1.32  jmcneill ehci_pci_resume(device_t dv)
    330  1.23  jmcneill {
    331  1.32  jmcneill 	struct ehci_pci_softc *sc = device_private(dv);
    332  1.23  jmcneill 
    333  1.32  jmcneill 	ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    334  1.32  jmcneill 	return ehci_resume(dv);
    335  1.23  jmcneill }
    336