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ehci_pci.c revision 1.37.2.1
      1  1.37.2.1      yamt /*	$NetBSD: ehci_pci.c,v 1.37.2.1 2008/05/18 12:34:19 yamt Exp $	*/
      2       1.1  augustss 
      3       1.1  augustss /*
      4       1.8  augustss  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1  augustss  * by Lennart Augustsson (lennart (at) augustsson.net).
      9       1.1  augustss  *
     10       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11       1.1  augustss  * modification, are permitted provided that the following conditions
     12       1.1  augustss  * are met:
     13       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18       1.1  augustss  *
     19       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1  augustss  */
     31       1.6     lukem 
     32       1.6     lukem #include <sys/cdefs.h>
     33  1.37.2.1      yamt __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.37.2.1 2008/05/18 12:34:19 yamt Exp $");
     34       1.1  augustss 
     35       1.1  augustss #include <sys/param.h>
     36       1.1  augustss #include <sys/systm.h>
     37       1.1  augustss #include <sys/kernel.h>
     38       1.1  augustss #include <sys/device.h>
     39       1.1  augustss #include <sys/proc.h>
     40       1.1  augustss #include <sys/queue.h>
     41       1.1  augustss 
     42      1.31        ad #include <sys/bus.h>
     43       1.1  augustss 
     44      1.22   xtraeme #include <dev/pci/pcidevs.h>
     45       1.1  augustss #include <dev/pci/pcivar.h>
     46       1.4  augustss #include <dev/pci/usb_pci.h>
     47       1.1  augustss 
     48       1.1  augustss #include <dev/usb/usb.h>
     49       1.1  augustss #include <dev/usb/usbdi.h>
     50       1.1  augustss #include <dev/usb/usbdivar.h>
     51       1.1  augustss #include <dev/usb/usb_mem.h>
     52       1.1  augustss 
     53       1.1  augustss #include <dev/usb/ehcireg.h>
     54       1.1  augustss #include <dev/usb/ehcivar.h>
     55       1.1  augustss 
     56       1.5  augustss #ifdef EHCI_DEBUG
     57       1.5  augustss #define DPRINTF(x)	if (ehcidebug) printf x
     58       1.5  augustss extern int ehcidebug;
     59       1.5  augustss #else
     60       1.5  augustss #define DPRINTF(x)
     61       1.5  augustss #endif
     62       1.5  augustss 
     63      1.34  jmcneill static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
     64      1.34  jmcneill 				   pcitag_t tag);
     65      1.19  augustss static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
     66      1.19  augustss 			       pcitag_t tag);
     67      1.35    dyoung static bool ehci_pci_suspend(device_t PMF_FN_PROTO);
     68      1.35    dyoung static bool ehci_pci_resume(device_t PMF_FN_PROTO);
     69      1.19  augustss 
     70       1.1  augustss struct ehci_pci_softc {
     71       1.1  augustss 	ehci_softc_t		sc;
     72       1.1  augustss 	pci_chipset_tag_t	sc_pc;
     73       1.1  augustss 	pcitag_t		sc_tag;
     74       1.1  augustss 	void 			*sc_ih;		/* interrupt vectoring */
     75       1.1  augustss };
     76       1.1  augustss 
     77      1.19  augustss #define EHCI_MAX_BIOS_WAIT		1000 /* ms */
     78      1.19  augustss 
     79      1.18   thorpej static int
     80      1.26  christos ehci_pci_match(struct device *parent, struct cfdata *match,
     81      1.25  christos     void *aux)
     82       1.1  augustss {
     83       1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     84       1.1  augustss 
     85       1.1  augustss 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
     86       1.1  augustss 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
     87       1.1  augustss 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
     88       1.1  augustss 		return (1);
     89      1.17     perry 
     90       1.1  augustss 	return (0);
     91       1.1  augustss }
     92       1.1  augustss 
     93      1.18   thorpej static void
     94      1.26  christos ehci_pci_attach(struct device *parent, struct device *self, void *aux)
     95       1.1  augustss {
     96      1.37  drochner 	struct ehci_pci_softc *sc = device_private(self);
     97       1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
     98       1.1  augustss 	pci_chipset_tag_t pc = pa->pa_pc;
     99       1.1  augustss 	pcitag_t tag = pa->pa_tag;
    100       1.1  augustss 	char const *intrstr;
    101       1.1  augustss 	pci_intr_handle_t ih;
    102       1.1  augustss 	pcireg_t csr;
    103      1.16   mycroft 	const char *vendor;
    104      1.37  drochner 	const char *devname = device_xname(self);
    105       1.1  augustss 	char devinfo[256];
    106       1.1  augustss 	usbd_status r;
    107       1.5  augustss 	int ncomp;
    108       1.5  augustss 	struct usb_pci *up;
    109       1.1  augustss 
    110      1.37  drochner 	sc->sc.sc_dev = self;
    111      1.37  drochner 	sc->sc.sc_bus.hci_private = sc;
    112      1.37  drochner 
    113      1.13   thorpej 	aprint_naive(": USB controller\n");
    114      1.13   thorpej 
    115      1.15    itojun 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    116      1.13   thorpej 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    117      1.13   thorpej 	    PCI_REVISION(pa->pa_class));
    118       1.1  augustss 
    119       1.1  augustss 	/* Map I/O registers */
    120       1.1  augustss 	if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
    121       1.1  augustss 			   &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
    122      1.13   thorpej 		aprint_error("%s: can't map memory space\n", devname);
    123       1.1  augustss 		return;
    124       1.1  augustss 	}
    125       1.1  augustss 
    126       1.1  augustss 	sc->sc_pc = pc;
    127       1.1  augustss 	sc->sc_tag = tag;
    128       1.1  augustss 	sc->sc.sc_bus.dmatag = pa->pa_dmat;
    129       1.1  augustss 
    130       1.1  augustss 	/* Enable the device. */
    131       1.1  augustss 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    132       1.1  augustss 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
    133       1.1  augustss 		       csr | PCI_COMMAND_MASTER_ENABLE);
    134       1.1  augustss 
    135       1.4  augustss 	/* Disable interrupts, so we don't get any spurious ones. */
    136       1.5  augustss 	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
    137       1.5  augustss 	DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
    138       1.4  augustss 	EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
    139       1.4  augustss 
    140       1.1  augustss 	/* Map and establish the interrupt. */
    141       1.3  sommerfe 	if (pci_intr_map(pa, &ih)) {
    142      1.13   thorpej 		aprint_error("%s: couldn't map interrupt\n", devname);
    143       1.1  augustss 		return;
    144       1.1  augustss 	}
    145       1.1  augustss 	intrstr = pci_intr_string(pc, ih);
    146       1.1  augustss 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc);
    147       1.1  augustss 	if (sc->sc_ih == NULL) {
    148      1.13   thorpej 		aprint_error("%s: couldn't establish interrupt", devname);
    149       1.1  augustss 		if (intrstr != NULL)
    150      1.13   thorpej 			aprint_normal(" at %s", intrstr);
    151      1.13   thorpej 		aprint_normal("\n");
    152       1.1  augustss 		return;
    153       1.1  augustss 	}
    154      1.13   thorpej 	aprint_normal("%s: interrupting at %s\n", devname, intrstr);
    155       1.1  augustss 
    156       1.1  augustss 	switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
    157       1.1  augustss 	case PCI_USBREV_PRE_1_0:
    158       1.1  augustss 	case PCI_USBREV_1_0:
    159       1.1  augustss 	case PCI_USBREV_1_1:
    160       1.4  augustss 		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
    161      1.27        ad 		aprint_verbose("%s: pre-2.0 USB rev\n", devname);
    162       1.4  augustss 		return;
    163       1.1  augustss 	case PCI_USBREV_2_0:
    164       1.1  augustss 		sc->sc.sc_bus.usbrev = USBREV_2_0;
    165       1.1  augustss 		break;
    166       1.1  augustss 	default:
    167       1.1  augustss 		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
    168       1.1  augustss 		break;
    169       1.1  augustss 	}
    170       1.1  augustss 
    171       1.1  augustss 	/* Figure out vendor for root hub descriptor. */
    172       1.1  augustss 	vendor = pci_findvendor(pa->pa_id);
    173       1.1  augustss 	sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
    174       1.1  augustss 	if (vendor)
    175      1.14    itojun 		strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
    176       1.1  augustss 	else
    177      1.14    itojun 		snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
    178      1.14    itojun 		    "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
    179      1.17     perry 
    180      1.22   xtraeme 	/* Enable workaround for dropped interrupts as required */
    181      1.30   tsutsui 	switch (sc->sc.sc_id_vendor) {
    182      1.30   tsutsui 	case PCI_VENDOR_ATI:
    183      1.30   tsutsui 	case PCI_VENDOR_VIATECH:
    184      1.22   xtraeme 		sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
    185      1.30   tsutsui 		aprint_normal("%s: dropped intr workaround enabled\n", devname);
    186      1.30   tsutsui 		break;
    187      1.30   tsutsui 	default:
    188      1.30   tsutsui 		break;
    189      1.30   tsutsui 	}
    190      1.22   xtraeme 
    191       1.5  augustss 	/*
    192       1.5  augustss 	 * Find companion controllers.  According to the spec they always
    193       1.5  augustss 	 * have lower function numbers so they should be enumerated already.
    194       1.5  augustss 	 */
    195       1.5  augustss 	ncomp = 0;
    196       1.5  augustss 	TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
    197       1.5  augustss 		if (up->bus == pa->pa_bus && up->device == pa->pa_device) {
    198       1.5  augustss 			DPRINTF(("ehci_pci_attach: companion %s\n",
    199      1.37  drochner 				 device_xname(up->usb)));
    200       1.5  augustss 			sc->sc.sc_comps[ncomp++] = up->usb;
    201       1.5  augustss 			if (ncomp >= EHCI_COMPANION_MAX)
    202       1.5  augustss 				break;
    203       1.5  augustss 		}
    204       1.5  augustss 	}
    205       1.5  augustss 	sc->sc.sc_ncomp = ncomp;
    206       1.5  augustss 
    207      1.19  augustss 	ehci_get_ownership(&sc->sc, pc, tag);
    208      1.19  augustss 
    209       1.1  augustss 	r = ehci_init(&sc->sc);
    210       1.1  augustss 	if (r != USBD_NORMAL_COMPLETION) {
    211      1.13   thorpej 		aprint_error("%s: init failed, error=%d\n", devname, r);
    212       1.1  augustss 		return;
    213       1.1  augustss 	}
    214       1.1  augustss 
    215      1.36    dyoung 	if (!pmf_device_register1(self, ehci_pci_suspend, ehci_pci_resume,
    216      1.36    dyoung 	                          ehci_shutdown))
    217      1.32  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    218      1.32  jmcneill 
    219       1.1  augustss 	/* Attach usb device. */
    220      1.37  drochner 	sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
    221       1.1  augustss }
    222       1.1  augustss 
    223      1.18   thorpej static int
    224       1.1  augustss ehci_pci_detach(device_ptr_t self, int flags)
    225       1.1  augustss {
    226      1.37  drochner 	struct ehci_pci_softc *sc = device_private(self);
    227       1.1  augustss 	int rv;
    228       1.1  augustss 
    229      1.32  jmcneill 	pmf_device_deregister(self);
    230       1.1  augustss 	rv = ehci_detach(&sc->sc, flags);
    231       1.1  augustss 	if (rv)
    232       1.1  augustss 		return (rv);
    233       1.1  augustss 	if (sc->sc_ih != NULL) {
    234       1.1  augustss 		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
    235       1.1  augustss 		sc->sc_ih = NULL;
    236       1.1  augustss 	}
    237       1.1  augustss 	if (sc->sc.sc_size) {
    238      1.34  jmcneill 		ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    239       1.1  augustss 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
    240       1.1  augustss 		sc->sc.sc_size = 0;
    241       1.1  augustss 	}
    242      1.34  jmcneill 
    243       1.1  augustss 	return (0);
    244       1.1  augustss }
    245      1.18   thorpej 
    246      1.37  drochner CFATTACH_DECL2_NEW(ehci_pci, sizeof(struct ehci_pci_softc),
    247      1.35    dyoung     ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate, NULL,
    248      1.35    dyoung     ehci_childdet);
    249      1.19  augustss 
    250      1.19  augustss #ifdef EHCI_DEBUG
    251      1.19  augustss static void
    252      1.19  augustss ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    253      1.19  augustss {
    254      1.19  augustss 	u_int32_t cparams, legctlsts, addr, cap, id;
    255      1.19  augustss 	int maxdump = 10;
    256      1.19  augustss 
    257      1.19  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    258      1.19  augustss 	addr = EHCI_HCC_EECP(cparams);
    259      1.19  augustss 	while (addr != 0) {
    260      1.19  augustss 		cap = pci_conf_read(pc, tag, addr);
    261      1.19  augustss 		id = EHCI_CAP_GET_ID(cap);
    262      1.19  augustss 		switch (id) {
    263      1.19  augustss 		case EHCI_CAP_ID_LEGACY:
    264      1.19  augustss 			legctlsts = pci_conf_read(pc, tag,
    265      1.19  augustss 						  addr + PCI_EHCI_USBLEGCTLSTS);
    266      1.20  augustss 			printf("ehci_dump_caps: legsup=0x%08x "
    267      1.20  augustss 			       "legctlsts=0x%08x\n", cap, legctlsts);
    268      1.19  augustss 			break;
    269      1.19  augustss 		default:
    270      1.20  augustss 			printf("ehci_dump_caps: cap=0x%08x\n", cap);
    271      1.19  augustss 			break;
    272      1.19  augustss 		}
    273      1.19  augustss 		if (--maxdump < 0)
    274      1.19  augustss 			break;
    275      1.19  augustss 		addr = EHCI_CAP_GET_NEXT(cap);
    276      1.19  augustss 	}
    277      1.19  augustss }
    278      1.19  augustss #endif
    279      1.19  augustss 
    280      1.19  augustss static void
    281      1.34  jmcneill ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    282      1.34  jmcneill {
    283      1.37  drochner 	const char *devname = device_xname(sc->sc_dev);
    284      1.34  jmcneill 	u_int32_t cparams, addr, cap;
    285      1.34  jmcneill 	pcireg_t legsup;
    286      1.34  jmcneill 	int maxcap = 10;
    287      1.34  jmcneill 
    288      1.34  jmcneill 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    289      1.34  jmcneill 	addr = EHCI_HCC_EECP(cparams);
    290      1.34  jmcneill 	while (addr != 0) {
    291      1.34  jmcneill 		cap = pci_conf_read(pc, tag, addr);
    292      1.34  jmcneill 		if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
    293      1.34  jmcneill 			goto next;
    294      1.34  jmcneill 		legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
    295      1.34  jmcneill 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
    296      1.34  jmcneill 		    legsup & ~EHCI_LEG_HC_OS_OWNED);
    297      1.34  jmcneill 
    298      1.34  jmcneill next:
    299      1.34  jmcneill 		if (--maxcap < 0) {
    300      1.34  jmcneill 			aprint_normal("%s: broken extended capabilities "
    301      1.34  jmcneill 				      "ignored\n", devname);
    302      1.34  jmcneill 			return;
    303      1.34  jmcneill 		}
    304      1.34  jmcneill 		addr = EHCI_CAP_GET_NEXT(cap);
    305      1.34  jmcneill 	}
    306      1.34  jmcneill }
    307      1.34  jmcneill 
    308      1.34  jmcneill static void
    309      1.19  augustss ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    310      1.19  augustss {
    311      1.37  drochner 	const char *devname = device_xname(sc->sc_dev);
    312      1.33  jmcneill 	u_int32_t cparams, addr, cap;
    313      1.33  jmcneill 	pcireg_t legsup;
    314      1.19  augustss 	int maxcap = 10;
    315      1.19  augustss 	int ms;
    316      1.19  augustss 
    317      1.19  augustss #ifdef EHCI_DEBUG
    318      1.20  augustss 	if (ehcidebug)
    319      1.20  augustss 		ehci_dump_caps(sc, pc, tag);
    320      1.19  augustss #endif
    321      1.19  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    322      1.19  augustss 	addr = EHCI_HCC_EECP(cparams);
    323      1.19  augustss 	while (addr != 0) {
    324      1.19  augustss 		cap = pci_conf_read(pc, tag, addr);
    325      1.34  jmcneill 		if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
    326      1.34  jmcneill 			goto next;
    327      1.34  jmcneill 		legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
    328      1.34  jmcneill 		/* Ask BIOS to give up ownership */
    329      1.34  jmcneill 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
    330      1.34  jmcneill 		    legsup | EHCI_LEG_HC_OS_OWNED);
    331      1.34  jmcneill 		if (legsup & EHCI_LEG_HC_BIOS_OWNED) {
    332      1.34  jmcneill 			for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) {
    333      1.34  jmcneill 				legsup = pci_conf_read(pc, tag,
    334      1.34  jmcneill 				    addr + PCI_EHCI_USBLEGSUP);
    335      1.34  jmcneill 				if (!(legsup & EHCI_LEG_HC_BIOS_OWNED))
    336      1.34  jmcneill 					break;
    337      1.34  jmcneill 				delay(1000);
    338      1.34  jmcneill 			}
    339      1.34  jmcneill 			if (ms == EHCI_MAX_BIOS_WAIT) {
    340      1.34  jmcneill 				aprint_normal("%s: BIOS refuses to give up "
    341      1.34  jmcneill 				    "ownership, using force\n", devname);
    342      1.34  jmcneill 				pci_conf_write(pc, tag,
    343      1.34  jmcneill 				    addr + PCI_EHCI_USBLEGSUP, 0);
    344      1.34  jmcneill 			} else
    345      1.34  jmcneill 				aprint_verbose("%s: BIOS has given up "
    346      1.34  jmcneill 				    "ownership\n", devname);
    347      1.34  jmcneill 		}
    348      1.34  jmcneill 
    349      1.34  jmcneill 		/* Disable SMIs */
    350      1.34  jmcneill 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS,
    351      1.34  jmcneill 		    EHCI_LEG_EXT_SMI_BAR | EHCI_LEG_EXT_SMI_PCICMD |
    352      1.34  jmcneill 		    EHCI_LEG_EXT_SMI_OS_CHANGE);
    353      1.34  jmcneill 
    354      1.34  jmcneill next:
    355      1.21  augustss 		if (--maxcap < 0) {
    356      1.21  augustss 			aprint_normal("%s: broken extended capabilities "
    357      1.21  augustss 				      "ignored\n", devname);
    358      1.19  augustss 			return;
    359      1.21  augustss 		}
    360      1.19  augustss 		addr = EHCI_CAP_GET_NEXT(cap);
    361      1.19  augustss 	}
    362      1.19  augustss 
    363      1.34  jmcneill }
    364      1.34  jmcneill 
    365      1.34  jmcneill static bool
    366      1.35    dyoung ehci_pci_suspend(device_t dv PMF_FN_ARGS)
    367      1.34  jmcneill {
    368      1.34  jmcneill 	struct ehci_pci_softc *sc = device_private(dv);
    369      1.28  jmcneill 
    370      1.35    dyoung 	ehci_suspend(dv PMF_FN_CALL);
    371      1.34  jmcneill 	ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    372      1.33  jmcneill 
    373      1.34  jmcneill 	return true;
    374      1.19  augustss }
    375      1.23  jmcneill 
    376      1.32  jmcneill static bool
    377      1.35    dyoung ehci_pci_resume(device_t dv PMF_FN_ARGS)
    378      1.23  jmcneill {
    379      1.32  jmcneill 	struct ehci_pci_softc *sc = device_private(dv);
    380      1.23  jmcneill 
    381      1.32  jmcneill 	ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    382      1.35    dyoung 	return ehci_resume(dv PMF_FN_CALL);
    383      1.23  jmcneill }
    384