ehci_pci.c revision 1.41 1 1.41 dyoung /* $NetBSD: ehci_pci.c,v 1.41 2009/04/17 19:44:13 dyoung Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.8 augustss * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss *
19 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
30 1.1 augustss */
31 1.6 lukem
32 1.6 lukem #include <sys/cdefs.h>
33 1.41 dyoung __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.41 2009/04/17 19:44:13 dyoung Exp $");
34 1.1 augustss
35 1.1 augustss #include <sys/param.h>
36 1.1 augustss #include <sys/systm.h>
37 1.1 augustss #include <sys/kernel.h>
38 1.1 augustss #include <sys/device.h>
39 1.1 augustss #include <sys/proc.h>
40 1.1 augustss #include <sys/queue.h>
41 1.1 augustss
42 1.31 ad #include <sys/bus.h>
43 1.1 augustss
44 1.22 xtraeme #include <dev/pci/pcidevs.h>
45 1.1 augustss #include <dev/pci/pcivar.h>
46 1.4 augustss #include <dev/pci/usb_pci.h>
47 1.1 augustss
48 1.1 augustss #include <dev/usb/usb.h>
49 1.1 augustss #include <dev/usb/usbdi.h>
50 1.1 augustss #include <dev/usb/usbdivar.h>
51 1.1 augustss #include <dev/usb/usb_mem.h>
52 1.1 augustss
53 1.1 augustss #include <dev/usb/ehcireg.h>
54 1.1 augustss #include <dev/usb/ehcivar.h>
55 1.1 augustss
56 1.5 augustss #ifdef EHCI_DEBUG
57 1.5 augustss #define DPRINTF(x) if (ehcidebug) printf x
58 1.5 augustss extern int ehcidebug;
59 1.5 augustss #else
60 1.5 augustss #define DPRINTF(x)
61 1.5 augustss #endif
62 1.5 augustss
63 1.34 jmcneill static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
64 1.34 jmcneill pcitag_t tag);
65 1.19 augustss static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
66 1.19 augustss pcitag_t tag);
67 1.35 dyoung static bool ehci_pci_suspend(device_t PMF_FN_PROTO);
68 1.35 dyoung static bool ehci_pci_resume(device_t PMF_FN_PROTO);
69 1.19 augustss
70 1.1 augustss struct ehci_pci_softc {
71 1.1 augustss ehci_softc_t sc;
72 1.1 augustss pci_chipset_tag_t sc_pc;
73 1.1 augustss pcitag_t sc_tag;
74 1.1 augustss void *sc_ih; /* interrupt vectoring */
75 1.1 augustss };
76 1.1 augustss
77 1.19 augustss #define EHCI_MAX_BIOS_WAIT 1000 /* ms */
78 1.19 augustss
79 1.18 thorpej static int
80 1.41 dyoung ehci_pci_match(device_t parent, cfdata_t match, void *aux)
81 1.1 augustss {
82 1.1 augustss struct pci_attach_args *pa = (struct pci_attach_args *) aux;
83 1.1 augustss
84 1.1 augustss if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
85 1.1 augustss PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
86 1.1 augustss PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
87 1.41 dyoung return 1;
88 1.17 perry
89 1.41 dyoung return 0;
90 1.1 augustss }
91 1.1 augustss
92 1.18 thorpej static void
93 1.41 dyoung ehci_pci_attach(device_t parent, device_t self, void *aux)
94 1.1 augustss {
95 1.37 drochner struct ehci_pci_softc *sc = device_private(self);
96 1.1 augustss struct pci_attach_args *pa = (struct pci_attach_args *)aux;
97 1.1 augustss pci_chipset_tag_t pc = pa->pa_pc;
98 1.1 augustss pcitag_t tag = pa->pa_tag;
99 1.1 augustss char const *intrstr;
100 1.1 augustss pci_intr_handle_t ih;
101 1.1 augustss pcireg_t csr;
102 1.16 mycroft const char *vendor;
103 1.37 drochner const char *devname = device_xname(self);
104 1.1 augustss char devinfo[256];
105 1.1 augustss usbd_status r;
106 1.5 augustss int ncomp;
107 1.5 augustss struct usb_pci *up;
108 1.1 augustss
109 1.37 drochner sc->sc.sc_dev = self;
110 1.37 drochner sc->sc.sc_bus.hci_private = sc;
111 1.37 drochner
112 1.13 thorpej aprint_naive(": USB controller\n");
113 1.13 thorpej
114 1.15 itojun pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
115 1.13 thorpej aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
116 1.13 thorpej PCI_REVISION(pa->pa_class));
117 1.1 augustss
118 1.1 augustss /* Map I/O registers */
119 1.1 augustss if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
120 1.1 augustss &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
121 1.13 thorpej aprint_error("%s: can't map memory space\n", devname);
122 1.1 augustss return;
123 1.1 augustss }
124 1.1 augustss
125 1.1 augustss sc->sc_pc = pc;
126 1.1 augustss sc->sc_tag = tag;
127 1.1 augustss sc->sc.sc_bus.dmatag = pa->pa_dmat;
128 1.1 augustss
129 1.1 augustss /* Enable the device. */
130 1.1 augustss csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
131 1.1 augustss pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
132 1.1 augustss csr | PCI_COMMAND_MASTER_ENABLE);
133 1.1 augustss
134 1.4 augustss /* Disable interrupts, so we don't get any spurious ones. */
135 1.5 augustss sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
136 1.5 augustss DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
137 1.4 augustss EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
138 1.4 augustss
139 1.1 augustss /* Map and establish the interrupt. */
140 1.3 sommerfe if (pci_intr_map(pa, &ih)) {
141 1.13 thorpej aprint_error("%s: couldn't map interrupt\n", devname);
142 1.1 augustss return;
143 1.1 augustss }
144 1.1 augustss intrstr = pci_intr_string(pc, ih);
145 1.1 augustss sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc);
146 1.1 augustss if (sc->sc_ih == NULL) {
147 1.13 thorpej aprint_error("%s: couldn't establish interrupt", devname);
148 1.1 augustss if (intrstr != NULL)
149 1.13 thorpej aprint_normal(" at %s", intrstr);
150 1.13 thorpej aprint_normal("\n");
151 1.1 augustss return;
152 1.1 augustss }
153 1.13 thorpej aprint_normal("%s: interrupting at %s\n", devname, intrstr);
154 1.1 augustss
155 1.1 augustss switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
156 1.1 augustss case PCI_USBREV_PRE_1_0:
157 1.1 augustss case PCI_USBREV_1_0:
158 1.1 augustss case PCI_USBREV_1_1:
159 1.4 augustss sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
160 1.27 ad aprint_verbose("%s: pre-2.0 USB rev\n", devname);
161 1.4 augustss return;
162 1.1 augustss case PCI_USBREV_2_0:
163 1.1 augustss sc->sc.sc_bus.usbrev = USBREV_2_0;
164 1.1 augustss break;
165 1.1 augustss default:
166 1.1 augustss sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
167 1.1 augustss break;
168 1.1 augustss }
169 1.1 augustss
170 1.1 augustss /* Figure out vendor for root hub descriptor. */
171 1.1 augustss vendor = pci_findvendor(pa->pa_id);
172 1.1 augustss sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
173 1.1 augustss if (vendor)
174 1.14 itojun strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
175 1.1 augustss else
176 1.14 itojun snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
177 1.14 itojun "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
178 1.17 perry
179 1.22 xtraeme /* Enable workaround for dropped interrupts as required */
180 1.30 tsutsui switch (sc->sc.sc_id_vendor) {
181 1.30 tsutsui case PCI_VENDOR_ATI:
182 1.30 tsutsui case PCI_VENDOR_VIATECH:
183 1.22 xtraeme sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
184 1.30 tsutsui aprint_normal("%s: dropped intr workaround enabled\n", devname);
185 1.30 tsutsui break;
186 1.30 tsutsui default:
187 1.30 tsutsui break;
188 1.30 tsutsui }
189 1.22 xtraeme
190 1.5 augustss /*
191 1.5 augustss * Find companion controllers. According to the spec they always
192 1.5 augustss * have lower function numbers so they should be enumerated already.
193 1.5 augustss */
194 1.5 augustss ncomp = 0;
195 1.5 augustss TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
196 1.5 augustss if (up->bus == pa->pa_bus && up->device == pa->pa_device) {
197 1.5 augustss DPRINTF(("ehci_pci_attach: companion %s\n",
198 1.37 drochner device_xname(up->usb)));
199 1.5 augustss sc->sc.sc_comps[ncomp++] = up->usb;
200 1.5 augustss if (ncomp >= EHCI_COMPANION_MAX)
201 1.5 augustss break;
202 1.5 augustss }
203 1.5 augustss }
204 1.5 augustss sc->sc.sc_ncomp = ncomp;
205 1.5 augustss
206 1.19 augustss ehci_get_ownership(&sc->sc, pc, tag);
207 1.19 augustss
208 1.1 augustss r = ehci_init(&sc->sc);
209 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
210 1.13 thorpej aprint_error("%s: init failed, error=%d\n", devname, r);
211 1.1 augustss return;
212 1.1 augustss }
213 1.1 augustss
214 1.36 dyoung if (!pmf_device_register1(self, ehci_pci_suspend, ehci_pci_resume,
215 1.36 dyoung ehci_shutdown))
216 1.32 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
217 1.32 jmcneill
218 1.1 augustss /* Attach usb device. */
219 1.37 drochner sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
220 1.1 augustss }
221 1.1 augustss
222 1.18 thorpej static int
223 1.41 dyoung ehci_pci_detach(device_t self, int flags)
224 1.1 augustss {
225 1.37 drochner struct ehci_pci_softc *sc = device_private(self);
226 1.1 augustss int rv;
227 1.1 augustss
228 1.32 jmcneill pmf_device_deregister(self);
229 1.1 augustss rv = ehci_detach(&sc->sc, flags);
230 1.1 augustss if (rv)
231 1.41 dyoung return rv;
232 1.40 dyoung
233 1.40 dyoung /* disable interrupts */
234 1.40 dyoung EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
235 1.40 dyoung /* XXX grotty hack to flush the write */
236 1.40 dyoung EOREAD2(&sc->sc, EHCI_USBINTR);
237 1.40 dyoung
238 1.1 augustss if (sc->sc_ih != NULL) {
239 1.1 augustss pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
240 1.1 augustss sc->sc_ih = NULL;
241 1.1 augustss }
242 1.1 augustss if (sc->sc.sc_size) {
243 1.34 jmcneill ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
244 1.1 augustss bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
245 1.1 augustss sc->sc.sc_size = 0;
246 1.1 augustss }
247 1.34 jmcneill
248 1.41 dyoung return 0;
249 1.1 augustss }
250 1.18 thorpej
251 1.39 dyoung CFATTACH_DECL3_NEW(ehci_pci, sizeof(struct ehci_pci_softc),
252 1.35 dyoung ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate, NULL,
253 1.39 dyoung ehci_childdet, DVF_DETACH_SHUTDOWN);
254 1.19 augustss
255 1.19 augustss #ifdef EHCI_DEBUG
256 1.19 augustss static void
257 1.19 augustss ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
258 1.19 augustss {
259 1.19 augustss u_int32_t cparams, legctlsts, addr, cap, id;
260 1.19 augustss int maxdump = 10;
261 1.19 augustss
262 1.19 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
263 1.19 augustss addr = EHCI_HCC_EECP(cparams);
264 1.19 augustss while (addr != 0) {
265 1.19 augustss cap = pci_conf_read(pc, tag, addr);
266 1.19 augustss id = EHCI_CAP_GET_ID(cap);
267 1.19 augustss switch (id) {
268 1.19 augustss case EHCI_CAP_ID_LEGACY:
269 1.19 augustss legctlsts = pci_conf_read(pc, tag,
270 1.19 augustss addr + PCI_EHCI_USBLEGCTLSTS);
271 1.20 augustss printf("ehci_dump_caps: legsup=0x%08x "
272 1.20 augustss "legctlsts=0x%08x\n", cap, legctlsts);
273 1.19 augustss break;
274 1.19 augustss default:
275 1.20 augustss printf("ehci_dump_caps: cap=0x%08x\n", cap);
276 1.19 augustss break;
277 1.19 augustss }
278 1.19 augustss if (--maxdump < 0)
279 1.19 augustss break;
280 1.19 augustss addr = EHCI_CAP_GET_NEXT(cap);
281 1.19 augustss }
282 1.19 augustss }
283 1.19 augustss #endif
284 1.19 augustss
285 1.19 augustss static void
286 1.34 jmcneill ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
287 1.34 jmcneill {
288 1.37 drochner const char *devname = device_xname(sc->sc_dev);
289 1.34 jmcneill u_int32_t cparams, addr, cap;
290 1.34 jmcneill pcireg_t legsup;
291 1.34 jmcneill int maxcap = 10;
292 1.34 jmcneill
293 1.34 jmcneill cparams = EREAD4(sc, EHCI_HCCPARAMS);
294 1.34 jmcneill addr = EHCI_HCC_EECP(cparams);
295 1.34 jmcneill while (addr != 0) {
296 1.34 jmcneill cap = pci_conf_read(pc, tag, addr);
297 1.34 jmcneill if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
298 1.34 jmcneill goto next;
299 1.34 jmcneill legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
300 1.34 jmcneill pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
301 1.34 jmcneill legsup & ~EHCI_LEG_HC_OS_OWNED);
302 1.34 jmcneill
303 1.34 jmcneill next:
304 1.34 jmcneill if (--maxcap < 0) {
305 1.34 jmcneill aprint_normal("%s: broken extended capabilities "
306 1.34 jmcneill "ignored\n", devname);
307 1.34 jmcneill return;
308 1.34 jmcneill }
309 1.34 jmcneill addr = EHCI_CAP_GET_NEXT(cap);
310 1.34 jmcneill }
311 1.34 jmcneill }
312 1.34 jmcneill
313 1.34 jmcneill static void
314 1.19 augustss ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
315 1.19 augustss {
316 1.37 drochner const char *devname = device_xname(sc->sc_dev);
317 1.33 jmcneill u_int32_t cparams, addr, cap;
318 1.33 jmcneill pcireg_t legsup;
319 1.19 augustss int maxcap = 10;
320 1.19 augustss int ms;
321 1.19 augustss
322 1.19 augustss #ifdef EHCI_DEBUG
323 1.20 augustss if (ehcidebug)
324 1.20 augustss ehci_dump_caps(sc, pc, tag);
325 1.19 augustss #endif
326 1.19 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
327 1.19 augustss addr = EHCI_HCC_EECP(cparams);
328 1.19 augustss while (addr != 0) {
329 1.19 augustss cap = pci_conf_read(pc, tag, addr);
330 1.34 jmcneill if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
331 1.34 jmcneill goto next;
332 1.34 jmcneill legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
333 1.34 jmcneill /* Ask BIOS to give up ownership */
334 1.34 jmcneill pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
335 1.34 jmcneill legsup | EHCI_LEG_HC_OS_OWNED);
336 1.34 jmcneill if (legsup & EHCI_LEG_HC_BIOS_OWNED) {
337 1.34 jmcneill for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) {
338 1.34 jmcneill legsup = pci_conf_read(pc, tag,
339 1.34 jmcneill addr + PCI_EHCI_USBLEGSUP);
340 1.34 jmcneill if (!(legsup & EHCI_LEG_HC_BIOS_OWNED))
341 1.34 jmcneill break;
342 1.34 jmcneill delay(1000);
343 1.34 jmcneill }
344 1.34 jmcneill if (ms == EHCI_MAX_BIOS_WAIT) {
345 1.34 jmcneill aprint_normal("%s: BIOS refuses to give up "
346 1.34 jmcneill "ownership, using force\n", devname);
347 1.34 jmcneill pci_conf_write(pc, tag,
348 1.34 jmcneill addr + PCI_EHCI_USBLEGSUP, 0);
349 1.34 jmcneill } else
350 1.34 jmcneill aprint_verbose("%s: BIOS has given up "
351 1.34 jmcneill "ownership\n", devname);
352 1.34 jmcneill }
353 1.34 jmcneill
354 1.34 jmcneill /* Disable SMIs */
355 1.34 jmcneill pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS,
356 1.34 jmcneill EHCI_LEG_EXT_SMI_BAR | EHCI_LEG_EXT_SMI_PCICMD |
357 1.34 jmcneill EHCI_LEG_EXT_SMI_OS_CHANGE);
358 1.34 jmcneill
359 1.34 jmcneill next:
360 1.21 augustss if (--maxcap < 0) {
361 1.21 augustss aprint_normal("%s: broken extended capabilities "
362 1.21 augustss "ignored\n", devname);
363 1.19 augustss return;
364 1.21 augustss }
365 1.19 augustss addr = EHCI_CAP_GET_NEXT(cap);
366 1.19 augustss }
367 1.19 augustss
368 1.34 jmcneill }
369 1.34 jmcneill
370 1.34 jmcneill static bool
371 1.35 dyoung ehci_pci_suspend(device_t dv PMF_FN_ARGS)
372 1.34 jmcneill {
373 1.34 jmcneill struct ehci_pci_softc *sc = device_private(dv);
374 1.28 jmcneill
375 1.35 dyoung ehci_suspend(dv PMF_FN_CALL);
376 1.34 jmcneill ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
377 1.33 jmcneill
378 1.34 jmcneill return true;
379 1.19 augustss }
380 1.23 jmcneill
381 1.32 jmcneill static bool
382 1.35 dyoung ehci_pci_resume(device_t dv PMF_FN_ARGS)
383 1.23 jmcneill {
384 1.32 jmcneill struct ehci_pci_softc *sc = device_private(dv);
385 1.23 jmcneill
386 1.32 jmcneill ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
387 1.35 dyoung return ehci_resume(dv PMF_FN_CALL);
388 1.23 jmcneill }
389