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ehci_pci.c revision 1.51
      1  1.51    dyoung /*	$NetBSD: ehci_pci.c,v 1.51 2011/04/04 20:37:56 dyoung Exp $	*/
      2   1.1  augustss 
      3   1.1  augustss /*
      4   1.8  augustss  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
      5   1.1  augustss  * All rights reserved.
      6   1.1  augustss  *
      7   1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1  augustss  * by Lennart Augustsson (lennart (at) augustsson.net).
      9   1.1  augustss  *
     10   1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11   1.1  augustss  * modification, are permitted provided that the following conditions
     12   1.1  augustss  * are met:
     13   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15   1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17   1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18   1.1  augustss  *
     19   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1  augustss  */
     31   1.6     lukem 
     32   1.6     lukem #include <sys/cdefs.h>
     33  1.51    dyoung __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.51 2011/04/04 20:37:56 dyoung Exp $");
     34   1.1  augustss 
     35   1.1  augustss #include <sys/param.h>
     36   1.1  augustss #include <sys/systm.h>
     37   1.1  augustss #include <sys/kernel.h>
     38   1.1  augustss #include <sys/device.h>
     39   1.1  augustss #include <sys/proc.h>
     40   1.1  augustss #include <sys/queue.h>
     41   1.1  augustss 
     42  1.31        ad #include <sys/bus.h>
     43   1.1  augustss 
     44  1.22   xtraeme #include <dev/pci/pcidevs.h>
     45   1.1  augustss #include <dev/pci/pcivar.h>
     46   1.4  augustss #include <dev/pci/usb_pci.h>
     47   1.1  augustss 
     48   1.1  augustss #include <dev/usb/usb.h>
     49   1.1  augustss #include <dev/usb/usbdi.h>
     50   1.1  augustss #include <dev/usb/usbdivar.h>
     51   1.1  augustss #include <dev/usb/usb_mem.h>
     52   1.1  augustss 
     53   1.1  augustss #include <dev/usb/ehcireg.h>
     54   1.1  augustss #include <dev/usb/ehcivar.h>
     55   1.1  augustss 
     56   1.5  augustss #ifdef EHCI_DEBUG
     57   1.5  augustss #define DPRINTF(x)	if (ehcidebug) printf x
     58   1.5  augustss extern int ehcidebug;
     59   1.5  augustss #else
     60   1.5  augustss #define DPRINTF(x)
     61   1.5  augustss #endif
     62   1.5  augustss 
     63  1.45    cegger enum ehci_pci_quirk_flags {
     64  1.45    cegger 	EHCI_PCI_QUIRK_AMD_SB600 = 0x1,	/* always need a quirk */
     65  1.45    cegger 	EHCI_PCI_QUIRK_AMD_SB700 = 0x2,	/* depends on the SMB revision */
     66  1.45    cegger };
     67  1.45    cegger 
     68  1.45    cegger static const struct pci_quirkdata ehci_pci_quirks[] = {
     69  1.45    cegger 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_EHCI,
     70  1.45    cegger 	    EHCI_PCI_QUIRK_AMD_SB600 },
     71  1.45    cegger 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_EHCI,
     72  1.45    cegger 	    EHCI_PCI_QUIRK_AMD_SB700 },
     73  1.45    cegger };
     74  1.45    cegger 
     75  1.34  jmcneill static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
     76  1.34  jmcneill 				   pcitag_t tag);
     77  1.19  augustss static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc,
     78  1.19  augustss 			       pcitag_t tag);
     79  1.47    dyoung static bool ehci_pci_suspend(device_t, const pmf_qual_t *);
     80  1.47    dyoung static bool ehci_pci_resume(device_t, const pmf_qual_t *);
     81  1.19  augustss 
     82   1.1  augustss struct ehci_pci_softc {
     83   1.1  augustss 	ehci_softc_t		sc;
     84   1.1  augustss 	pci_chipset_tag_t	sc_pc;
     85   1.1  augustss 	pcitag_t		sc_tag;
     86   1.1  augustss 	void 			*sc_ih;		/* interrupt vectoring */
     87   1.1  augustss };
     88   1.1  augustss 
     89  1.51    dyoung static int ehci_sb700_match(const struct pci_attach_args *pa);
     90  1.45    cegger static int ehci_apply_amd_quirks(struct ehci_pci_softc *sc);
     91  1.45    cegger enum ehci_pci_quirk_flags ehci_pci_lookup_quirkdata(pci_vendor_id_t,
     92  1.45    cegger 	pci_product_id_t);
     93  1.45    cegger 
     94  1.19  augustss #define EHCI_MAX_BIOS_WAIT		1000 /* ms */
     95  1.45    cegger #define EHCI_SBx00_WORKAROUND_REG	0x50
     96  1.45    cegger #define EHCI_SBx00_WORKAROUND_ENABLE	__BIT(27)
     97  1.45    cegger 
     98  1.19  augustss 
     99  1.18   thorpej static int
    100  1.41    dyoung ehci_pci_match(device_t parent, cfdata_t match, void *aux)
    101   1.1  augustss {
    102   1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
    103   1.1  augustss 
    104   1.1  augustss 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
    105   1.1  augustss 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
    106   1.1  augustss 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI)
    107  1.41    dyoung 		return 1;
    108  1.17     perry 
    109  1.41    dyoung 	return 0;
    110   1.1  augustss }
    111   1.1  augustss 
    112  1.18   thorpej static void
    113  1.41    dyoung ehci_pci_attach(device_t parent, device_t self, void *aux)
    114   1.1  augustss {
    115  1.37  drochner 	struct ehci_pci_softc *sc = device_private(self);
    116   1.1  augustss 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    117   1.1  augustss 	pci_chipset_tag_t pc = pa->pa_pc;
    118   1.1  augustss 	pcitag_t tag = pa->pa_tag;
    119   1.1  augustss 	char const *intrstr;
    120   1.1  augustss 	pci_intr_handle_t ih;
    121   1.1  augustss 	pcireg_t csr;
    122  1.16   mycroft 	const char *vendor;
    123   1.1  augustss 	char devinfo[256];
    124   1.1  augustss 	usbd_status r;
    125   1.5  augustss 	int ncomp;
    126   1.5  augustss 	struct usb_pci *up;
    127  1.45    cegger 	int quirk;
    128   1.1  augustss 
    129  1.37  drochner 	sc->sc.sc_dev = self;
    130  1.37  drochner 	sc->sc.sc_bus.hci_private = sc;
    131  1.37  drochner 
    132  1.13   thorpej 	aprint_naive(": USB controller\n");
    133  1.13   thorpej 
    134  1.15    itojun 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    135  1.13   thorpej 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    136  1.13   thorpej 	    PCI_REVISION(pa->pa_class));
    137   1.1  augustss 
    138  1.45    cegger 	/* Check for quirks */
    139  1.45    cegger 	quirk = ehci_pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
    140  1.45    cegger 					   PCI_PRODUCT(pa->pa_id));
    141  1.45    cegger 
    142   1.1  augustss 	/* Map I/O registers */
    143   1.1  augustss 	if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
    144   1.1  augustss 			   &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
    145  1.43    cegger 		sc->sc.sc_size = 0;
    146  1.43    cegger 		aprint_error_dev(self, "can't map memory space\n");
    147   1.1  augustss 		return;
    148   1.1  augustss 	}
    149   1.1  augustss 
    150  1.43    cegger 	/* Disable interrupts, so we don't get any spurious ones. */
    151  1.43    cegger 	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
    152  1.43    cegger 	DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs));
    153  1.43    cegger 	EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
    154  1.43    cegger 
    155   1.1  augustss 	sc->sc_pc = pc;
    156   1.1  augustss 	sc->sc_tag = tag;
    157   1.1  augustss 	sc->sc.sc_bus.dmatag = pa->pa_dmat;
    158   1.1  augustss 
    159  1.45    cegger 	/* Handle quirks */
    160  1.45    cegger 	switch (quirk) {
    161  1.45    cegger 	case EHCI_PCI_QUIRK_AMD_SB600:
    162  1.45    cegger 		ehci_apply_amd_quirks(sc);
    163  1.45    cegger 		break;
    164  1.45    cegger 	case EHCI_PCI_QUIRK_AMD_SB700:
    165  1.45    cegger 		if (pci_find_device(NULL, ehci_sb700_match))
    166  1.45    cegger 			ehci_apply_amd_quirks(sc);
    167  1.45    cegger 		break;
    168  1.45    cegger 	}
    169  1.45    cegger 
    170   1.1  augustss 	/* Enable the device. */
    171   1.1  augustss 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    172   1.1  augustss 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
    173   1.1  augustss 		       csr | PCI_COMMAND_MASTER_ENABLE);
    174   1.1  augustss 
    175   1.1  augustss 	/* Map and establish the interrupt. */
    176   1.3  sommerfe 	if (pci_intr_map(pa, &ih)) {
    177  1.43    cegger 		aprint_error_dev(self, "couldn't map interrupt\n");
    178  1.43    cegger 		goto fail;
    179   1.1  augustss 	}
    180  1.43    cegger 
    181  1.43    cegger 	/*
    182  1.43    cegger 	 * Allocate IRQ
    183  1.43    cegger 	 */
    184   1.1  augustss 	intrstr = pci_intr_string(pc, ih);
    185   1.1  augustss 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc);
    186   1.1  augustss 	if (sc->sc_ih == NULL) {
    187  1.43    cegger 		aprint_error_dev(self, "couldn't establish interrupt");
    188   1.1  augustss 		if (intrstr != NULL)
    189  1.43    cegger 			aprint_error(" at %s", intrstr);
    190  1.43    cegger 		aprint_error("\n");
    191   1.1  augustss 		return;
    192   1.1  augustss 	}
    193  1.43    cegger 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
    194   1.1  augustss 
    195   1.1  augustss 	switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
    196   1.1  augustss 	case PCI_USBREV_PRE_1_0:
    197   1.1  augustss 	case PCI_USBREV_1_0:
    198   1.1  augustss 	case PCI_USBREV_1_1:
    199   1.4  augustss 		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
    200  1.43    cegger 		aprint_verbose_dev(self, "pre-2.0 USB rev\n");
    201   1.4  augustss 		return;
    202   1.1  augustss 	case PCI_USBREV_2_0:
    203   1.1  augustss 		sc->sc.sc_bus.usbrev = USBREV_2_0;
    204   1.1  augustss 		break;
    205   1.1  augustss 	default:
    206   1.1  augustss 		sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
    207   1.1  augustss 		break;
    208   1.1  augustss 	}
    209   1.1  augustss 
    210   1.1  augustss 	/* Figure out vendor for root hub descriptor. */
    211  1.49  pgoyette 	vendor = pci_findvendor(pa->pa_id);
    212   1.1  augustss 	sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
    213   1.1  augustss 	if (vendor)
    214  1.14    itojun 		strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
    215   1.1  augustss 	else
    216  1.14    itojun 		snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
    217  1.14    itojun 		    "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
    218  1.17     perry 
    219  1.22   xtraeme 	/* Enable workaround for dropped interrupts as required */
    220  1.30   tsutsui 	switch (sc->sc.sc_id_vendor) {
    221  1.30   tsutsui 	case PCI_VENDOR_ATI:
    222  1.30   tsutsui 	case PCI_VENDOR_VIATECH:
    223  1.22   xtraeme 		sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
    224  1.43    cegger 		aprint_normal_dev(self, "dropped intr workaround enabled\n");
    225  1.30   tsutsui 		break;
    226  1.30   tsutsui 	default:
    227  1.30   tsutsui 		break;
    228  1.30   tsutsui 	}
    229  1.22   xtraeme 
    230   1.5  augustss 	/*
    231   1.5  augustss 	 * Find companion controllers.  According to the spec they always
    232   1.5  augustss 	 * have lower function numbers so they should be enumerated already.
    233   1.5  augustss 	 */
    234  1.50      matt 	const u_int maxncomp = EHCI_HCS_N_CC(EREAD4(&sc->sc, EHCI_HCSPARAMS));
    235  1.50      matt 	KASSERT(maxncomp <= EHCI_COMPANION_MAX);
    236   1.5  augustss 	ncomp = 0;
    237   1.5  augustss 	TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
    238  1.50      matt 		if (up->bus == pa->pa_bus && up->device == pa->pa_device
    239  1.50      matt 		    && !up->claimed) {
    240   1.5  augustss 			DPRINTF(("ehci_pci_attach: companion %s\n",
    241  1.37  drochner 				 device_xname(up->usb)));
    242   1.5  augustss 			sc->sc.sc_comps[ncomp++] = up->usb;
    243  1.50      matt 			up->claimed = true;
    244  1.50      matt 			if (ncomp == maxncomp)
    245   1.5  augustss 				break;
    246   1.5  augustss 		}
    247   1.5  augustss 	}
    248   1.5  augustss 	sc->sc.sc_ncomp = ncomp;
    249   1.5  augustss 
    250  1.19  augustss 	ehci_get_ownership(&sc->sc, pc, tag);
    251  1.19  augustss 
    252   1.1  augustss 	r = ehci_init(&sc->sc);
    253   1.1  augustss 	if (r != USBD_NORMAL_COMPLETION) {
    254  1.43    cegger 		aprint_error_dev(self, "init failed, error=%d\n", r);
    255  1.43    cegger 		goto fail;
    256   1.1  augustss 	}
    257   1.1  augustss 
    258  1.36    dyoung 	if (!pmf_device_register1(self, ehci_pci_suspend, ehci_pci_resume,
    259  1.36    dyoung 	                          ehci_shutdown))
    260  1.32  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    261  1.32  jmcneill 
    262   1.1  augustss 	/* Attach usb device. */
    263  1.37  drochner 	sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
    264  1.43    cegger 	return;
    265  1.43    cegger 
    266  1.43    cegger fail:
    267  1.43    cegger 	if (sc->sc_ih) {
    268  1.43    cegger 		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
    269  1.43    cegger 		sc->sc_ih = NULL;
    270  1.43    cegger 	}
    271  1.43    cegger 	if (sc->sc.sc_size) {
    272  1.43    cegger 		ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    273  1.43    cegger 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
    274  1.43    cegger 		sc->sc.sc_size = 0;
    275  1.43    cegger 	}
    276  1.43    cegger 	return;
    277   1.1  augustss }
    278   1.1  augustss 
    279  1.18   thorpej static int
    280  1.41    dyoung ehci_pci_detach(device_t self, int flags)
    281   1.1  augustss {
    282  1.37  drochner 	struct ehci_pci_softc *sc = device_private(self);
    283   1.1  augustss 	int rv;
    284   1.1  augustss 
    285  1.32  jmcneill 	pmf_device_deregister(self);
    286   1.1  augustss 	rv = ehci_detach(&sc->sc, flags);
    287   1.1  augustss 	if (rv)
    288  1.41    dyoung 		return rv;
    289  1.40    dyoung 
    290  1.40    dyoung 	/* disable interrupts */
    291  1.40    dyoung 	EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
    292  1.40    dyoung 	/* XXX grotty hack to flush the write */
    293  1.42  christos 	(void)EOREAD2(&sc->sc, EHCI_USBINTR);
    294  1.40    dyoung 
    295   1.1  augustss 	if (sc->sc_ih != NULL) {
    296   1.1  augustss 		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
    297   1.1  augustss 		sc->sc_ih = NULL;
    298   1.1  augustss 	}
    299   1.1  augustss 	if (sc->sc.sc_size) {
    300  1.34  jmcneill 		ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    301   1.1  augustss 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
    302   1.1  augustss 		sc->sc.sc_size = 0;
    303   1.1  augustss 	}
    304  1.34  jmcneill 
    305  1.41    dyoung 	return 0;
    306   1.1  augustss }
    307  1.18   thorpej 
    308  1.39    dyoung CFATTACH_DECL3_NEW(ehci_pci, sizeof(struct ehci_pci_softc),
    309  1.35    dyoung     ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate, NULL,
    310  1.39    dyoung     ehci_childdet, DVF_DETACH_SHUTDOWN);
    311  1.19  augustss 
    312  1.19  augustss #ifdef EHCI_DEBUG
    313  1.19  augustss static void
    314  1.19  augustss ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    315  1.19  augustss {
    316  1.44    cegger 	uint32_t cparams, legctlsts, addr, cap, id;
    317  1.19  augustss 	int maxdump = 10;
    318  1.19  augustss 
    319  1.19  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    320  1.19  augustss 	addr = EHCI_HCC_EECP(cparams);
    321  1.19  augustss 	while (addr != 0) {
    322  1.19  augustss 		cap = pci_conf_read(pc, tag, addr);
    323  1.19  augustss 		id = EHCI_CAP_GET_ID(cap);
    324  1.19  augustss 		switch (id) {
    325  1.19  augustss 		case EHCI_CAP_ID_LEGACY:
    326  1.19  augustss 			legctlsts = pci_conf_read(pc, tag,
    327  1.19  augustss 						  addr + PCI_EHCI_USBLEGCTLSTS);
    328  1.20  augustss 			printf("ehci_dump_caps: legsup=0x%08x "
    329  1.20  augustss 			       "legctlsts=0x%08x\n", cap, legctlsts);
    330  1.19  augustss 			break;
    331  1.19  augustss 		default:
    332  1.20  augustss 			printf("ehci_dump_caps: cap=0x%08x\n", cap);
    333  1.19  augustss 			break;
    334  1.19  augustss 		}
    335  1.19  augustss 		if (--maxdump < 0)
    336  1.19  augustss 			break;
    337  1.19  augustss 		addr = EHCI_CAP_GET_NEXT(cap);
    338  1.19  augustss 	}
    339  1.19  augustss }
    340  1.19  augustss #endif
    341  1.19  augustss 
    342  1.19  augustss static void
    343  1.34  jmcneill ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    344  1.34  jmcneill {
    345  1.37  drochner 	const char *devname = device_xname(sc->sc_dev);
    346  1.44    cegger 	uint32_t cparams, addr, cap;
    347  1.34  jmcneill 	pcireg_t legsup;
    348  1.34  jmcneill 	int maxcap = 10;
    349  1.34  jmcneill 
    350  1.34  jmcneill 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    351  1.34  jmcneill 	addr = EHCI_HCC_EECP(cparams);
    352  1.34  jmcneill 	while (addr != 0) {
    353  1.34  jmcneill 		cap = pci_conf_read(pc, tag, addr);
    354  1.34  jmcneill 		if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
    355  1.34  jmcneill 			goto next;
    356  1.34  jmcneill 		legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
    357  1.34  jmcneill 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
    358  1.34  jmcneill 		    legsup & ~EHCI_LEG_HC_OS_OWNED);
    359  1.34  jmcneill 
    360  1.34  jmcneill next:
    361  1.34  jmcneill 		if (--maxcap < 0) {
    362  1.34  jmcneill 			aprint_normal("%s: broken extended capabilities "
    363  1.34  jmcneill 				      "ignored\n", devname);
    364  1.34  jmcneill 			return;
    365  1.34  jmcneill 		}
    366  1.34  jmcneill 		addr = EHCI_CAP_GET_NEXT(cap);
    367  1.34  jmcneill 	}
    368  1.34  jmcneill }
    369  1.34  jmcneill 
    370  1.34  jmcneill static void
    371  1.19  augustss ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag)
    372  1.19  augustss {
    373  1.37  drochner 	const char *devname = device_xname(sc->sc_dev);
    374  1.44    cegger 	uint32_t cparams, addr, cap;
    375  1.33  jmcneill 	pcireg_t legsup;
    376  1.19  augustss 	int maxcap = 10;
    377  1.19  augustss 	int ms;
    378  1.19  augustss 
    379  1.19  augustss #ifdef EHCI_DEBUG
    380  1.20  augustss 	if (ehcidebug)
    381  1.20  augustss 		ehci_dump_caps(sc, pc, tag);
    382  1.19  augustss #endif
    383  1.19  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    384  1.19  augustss 	addr = EHCI_HCC_EECP(cparams);
    385  1.19  augustss 	while (addr != 0) {
    386  1.19  augustss 		cap = pci_conf_read(pc, tag, addr);
    387  1.34  jmcneill 		if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY)
    388  1.34  jmcneill 			goto next;
    389  1.34  jmcneill 		legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP);
    390  1.34  jmcneill 		/* Ask BIOS to give up ownership */
    391  1.34  jmcneill 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP,
    392  1.34  jmcneill 		    legsup | EHCI_LEG_HC_OS_OWNED);
    393  1.34  jmcneill 		if (legsup & EHCI_LEG_HC_BIOS_OWNED) {
    394  1.34  jmcneill 			for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) {
    395  1.34  jmcneill 				legsup = pci_conf_read(pc, tag,
    396  1.34  jmcneill 				    addr + PCI_EHCI_USBLEGSUP);
    397  1.34  jmcneill 				if (!(legsup & EHCI_LEG_HC_BIOS_OWNED))
    398  1.34  jmcneill 					break;
    399  1.34  jmcneill 				delay(1000);
    400  1.34  jmcneill 			}
    401  1.34  jmcneill 			if (ms == EHCI_MAX_BIOS_WAIT) {
    402  1.34  jmcneill 				aprint_normal("%s: BIOS refuses to give up "
    403  1.34  jmcneill 				    "ownership, using force\n", devname);
    404  1.34  jmcneill 				pci_conf_write(pc, tag,
    405  1.34  jmcneill 				    addr + PCI_EHCI_USBLEGSUP, 0);
    406  1.34  jmcneill 			} else
    407  1.34  jmcneill 				aprint_verbose("%s: BIOS has given up "
    408  1.34  jmcneill 				    "ownership\n", devname);
    409  1.34  jmcneill 		}
    410  1.34  jmcneill 
    411  1.34  jmcneill 		/* Disable SMIs */
    412  1.34  jmcneill 		pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS,
    413  1.34  jmcneill 		    EHCI_LEG_EXT_SMI_BAR | EHCI_LEG_EXT_SMI_PCICMD |
    414  1.34  jmcneill 		    EHCI_LEG_EXT_SMI_OS_CHANGE);
    415  1.34  jmcneill 
    416  1.34  jmcneill next:
    417  1.21  augustss 		if (--maxcap < 0) {
    418  1.21  augustss 			aprint_normal("%s: broken extended capabilities "
    419  1.21  augustss 				      "ignored\n", devname);
    420  1.19  augustss 			return;
    421  1.21  augustss 		}
    422  1.19  augustss 		addr = EHCI_CAP_GET_NEXT(cap);
    423  1.19  augustss 	}
    424  1.19  augustss 
    425  1.34  jmcneill }
    426  1.34  jmcneill 
    427  1.34  jmcneill static bool
    428  1.47    dyoung ehci_pci_suspend(device_t dv, const pmf_qual_t *qual)
    429  1.34  jmcneill {
    430  1.34  jmcneill 	struct ehci_pci_softc *sc = device_private(dv);
    431  1.28  jmcneill 
    432  1.46    dyoung 	ehci_suspend(dv, qual);
    433  1.34  jmcneill 	ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    434  1.33  jmcneill 
    435  1.34  jmcneill 	return true;
    436  1.19  augustss }
    437  1.23  jmcneill 
    438  1.32  jmcneill static bool
    439  1.47    dyoung ehci_pci_resume(device_t dv, const pmf_qual_t *qual)
    440  1.23  jmcneill {
    441  1.32  jmcneill 	struct ehci_pci_softc *sc = device_private(dv);
    442  1.23  jmcneill 
    443  1.32  jmcneill 	ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag);
    444  1.46    dyoung 	return ehci_resume(dv, qual);
    445  1.23  jmcneill }
    446  1.45    cegger 
    447  1.45    cegger static int
    448  1.51    dyoung ehci_sb700_match(const struct pci_attach_args *pa)
    449  1.45    cegger {
    450  1.45    cegger 	if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI &&
    451  1.45    cegger 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATI_SB600_SMB))
    452  1.45    cegger 		return 0;
    453  1.45    cegger 
    454  1.45    cegger 	switch (PCI_REVISION(pa->pa_class)) {
    455  1.45    cegger 	case 0x3a:
    456  1.45    cegger 	case 0x3b:
    457  1.45    cegger 		return 1;
    458  1.45    cegger 	}
    459  1.45    cegger 
    460  1.45    cegger 	return 0;
    461  1.45    cegger }
    462  1.45    cegger 
    463  1.45    cegger static int
    464  1.45    cegger ehci_apply_amd_quirks(struct ehci_pci_softc *sc)
    465  1.45    cegger {
    466  1.45    cegger 	pcireg_t value;
    467  1.45    cegger 
    468  1.45    cegger 	aprint_normal_dev(sc->sc.sc_dev,
    469  1.45    cegger 	    "applying AMD SB600/SB700 USB freeze workaround\n");
    470  1.45    cegger 	value = pci_conf_read(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG);
    471  1.45    cegger 	pci_conf_write(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG,
    472  1.45    cegger 	    value | EHCI_SBx00_WORKAROUND_ENABLE);
    473  1.45    cegger 
    474  1.45    cegger 	return 0;
    475  1.45    cegger }
    476  1.45    cegger 
    477  1.45    cegger enum ehci_pci_quirk_flags
    478  1.45    cegger ehci_pci_lookup_quirkdata(pci_vendor_id_t vendor, pci_product_id_t product)
    479  1.45    cegger {
    480  1.45    cegger 	int i;
    481  1.45    cegger 
    482  1.45    cegger 	for (i = 0; i < __arraycount(ehci_pci_quirks); i++) {
    483  1.45    cegger 		if (vendor == ehci_pci_quirks[i].vendor &&
    484  1.45    cegger 		    product == ehci_pci_quirks[i].product)
    485  1.45    cegger 			return ehci_pci_quirks[i].quirks;
    486  1.45    cegger 	}
    487  1.45    cegger 	return 0;
    488  1.45    cegger }
    489  1.45    cegger 
    490