ehci_pci.c revision 1.21
1 /* $NetBSD: ehci_pci.c,v 1.21 2005/11/20 18:44:56 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.21 2005/11/20 18:44:56 augustss Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <sys/proc.h> 47 #include <sys/queue.h> 48 49 #include <machine/bus.h> 50 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/usb_pci.h> 53 54 #include <dev/usb/usb.h> 55 #include <dev/usb/usbdi.h> 56 #include <dev/usb/usbdivar.h> 57 #include <dev/usb/usb_mem.h> 58 59 #include <dev/usb/ehcireg.h> 60 #include <dev/usb/ehcivar.h> 61 62 #ifdef EHCI_DEBUG 63 #define DPRINTF(x) if (ehcidebug) printf x 64 extern int ehcidebug; 65 #else 66 #define DPRINTF(x) 67 #endif 68 69 static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 70 pcitag_t tag); 71 72 struct ehci_pci_softc { 73 ehci_softc_t sc; 74 pci_chipset_tag_t sc_pc; 75 pcitag_t sc_tag; 76 void *sc_ih; /* interrupt vectoring */ 77 }; 78 79 #define EHCI_MAX_BIOS_WAIT 1000 /* ms */ 80 81 static int 82 ehci_pci_match(struct device *parent, struct cfdata *match, void *aux) 83 { 84 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 85 86 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 87 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 88 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI) 89 return (1); 90 91 return (0); 92 } 93 94 static void 95 ehci_pci_attach(struct device *parent, struct device *self, void *aux) 96 { 97 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 98 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 99 pci_chipset_tag_t pc = pa->pa_pc; 100 pcitag_t tag = pa->pa_tag; 101 char const *intrstr; 102 pci_intr_handle_t ih; 103 pcireg_t csr; 104 const char *vendor; 105 const char *devname = sc->sc.sc_bus.bdev.dv_xname; 106 char devinfo[256]; 107 usbd_status r; 108 int ncomp; 109 struct usb_pci *up; 110 111 aprint_naive(": USB controller\n"); 112 113 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 114 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 115 PCI_REVISION(pa->pa_class)); 116 117 /* Map I/O registers */ 118 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 119 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 120 aprint_error("%s: can't map memory space\n", devname); 121 return; 122 } 123 124 sc->sc_pc = pc; 125 sc->sc_tag = tag; 126 sc->sc.sc_bus.dmatag = pa->pa_dmat; 127 128 /* Enable the device. */ 129 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 130 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 131 csr | PCI_COMMAND_MASTER_ENABLE); 132 133 /* Disable interrupts, so we don't get any spurious ones. */ 134 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 135 DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs)); 136 EOWRITE2(&sc->sc, EHCI_USBINTR, 0); 137 138 /* Map and establish the interrupt. */ 139 if (pci_intr_map(pa, &ih)) { 140 aprint_error("%s: couldn't map interrupt\n", devname); 141 return; 142 } 143 intrstr = pci_intr_string(pc, ih); 144 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc); 145 if (sc->sc_ih == NULL) { 146 aprint_error("%s: couldn't establish interrupt", devname); 147 if (intrstr != NULL) 148 aprint_normal(" at %s", intrstr); 149 aprint_normal("\n"); 150 return; 151 } 152 aprint_normal("%s: interrupting at %s\n", devname, intrstr); 153 154 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 155 case PCI_USBREV_PRE_1_0: 156 case PCI_USBREV_1_0: 157 case PCI_USBREV_1_1: 158 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 159 aprint_normal("%s: pre-2.0 USB rev\n", devname); 160 return; 161 case PCI_USBREV_2_0: 162 sc->sc.sc_bus.usbrev = USBREV_2_0; 163 break; 164 default: 165 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 166 break; 167 } 168 169 /* Figure out vendor for root hub descriptor. */ 170 vendor = pci_findvendor(pa->pa_id); 171 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 172 if (vendor) 173 strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor)); 174 else 175 snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), 176 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 177 178 /* 179 * Find companion controllers. According to the spec they always 180 * have lower function numbers so they should be enumerated already. 181 */ 182 ncomp = 0; 183 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 184 if (up->bus == pa->pa_bus && up->device == pa->pa_device) { 185 DPRINTF(("ehci_pci_attach: companion %s\n", 186 USBDEVNAME(up->usb->bdev))); 187 sc->sc.sc_comps[ncomp++] = up->usb; 188 if (ncomp >= EHCI_COMPANION_MAX) 189 break; 190 } 191 } 192 sc->sc.sc_ncomp = ncomp; 193 194 ehci_get_ownership(&sc->sc, pc, tag); 195 196 r = ehci_init(&sc->sc); 197 if (r != USBD_NORMAL_COMPLETION) { 198 aprint_error("%s: init failed, error=%d\n", devname, r); 199 return; 200 } 201 202 /* Attach usb device. */ 203 sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus, 204 usbctlprint); 205 } 206 207 static int 208 ehci_pci_detach(device_ptr_t self, int flags) 209 { 210 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 211 int rv; 212 213 rv = ehci_detach(&sc->sc, flags); 214 if (rv) 215 return (rv); 216 if (sc->sc_ih != NULL) { 217 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 218 sc->sc_ih = NULL; 219 } 220 if (sc->sc.sc_size) { 221 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 222 sc->sc.sc_size = 0; 223 } 224 return (0); 225 } 226 227 CFATTACH_DECL(ehci_pci, sizeof(struct ehci_pci_softc), 228 ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate); 229 230 #ifdef EHCI_DEBUG 231 static void 232 ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 233 { 234 u_int32_t cparams, legctlsts, addr, cap, id; 235 int maxdump = 10; 236 237 cparams = EREAD4(sc, EHCI_HCCPARAMS); 238 addr = EHCI_HCC_EECP(cparams); 239 while (addr != 0) { 240 cap = pci_conf_read(pc, tag, addr); 241 id = EHCI_CAP_GET_ID(cap); 242 switch (id) { 243 case EHCI_CAP_ID_LEGACY: 244 legctlsts = pci_conf_read(pc, tag, 245 addr + PCI_EHCI_USBLEGCTLSTS); 246 printf("ehci_dump_caps: legsup=0x%08x " 247 "legctlsts=0x%08x\n", cap, legctlsts); 248 break; 249 default: 250 printf("ehci_dump_caps: cap=0x%08x\n", cap); 251 break; 252 } 253 if (--maxdump < 0) 254 break; 255 addr = EHCI_CAP_GET_NEXT(cap); 256 } 257 } 258 #endif 259 260 static void 261 ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 262 { 263 const char *devname = sc->sc_bus.bdev.dv_xname; 264 u_int32_t cparams, addr, cap, legsup; 265 int maxcap = 10; 266 int ms; 267 268 #ifdef EHCI_DEBUG 269 if (ehcidebug) 270 ehci_dump_caps(sc, pc, tag); 271 #endif 272 cparams = EREAD4(sc, EHCI_HCCPARAMS); 273 addr = EHCI_HCC_EECP(cparams); 274 while (addr != 0) { 275 cap = pci_conf_read(pc, tag, addr); 276 if (EHCI_CAP_GET_ID(cap) == EHCI_CAP_ID_LEGACY) 277 break; 278 if (--maxcap < 0) { 279 aprint_normal("%s: broken extended capabilities " 280 "ignored\n", devname); 281 return; 282 } 283 addr = EHCI_CAP_GET_NEXT(cap); 284 } 285 286 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 287 /* Ask BIOS to give up ownership */ 288 legsup |= EHCI_LEG_HC_OS_OWNED; 289 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, legsup); 290 for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) { 291 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 292 if (!(legsup & EHCI_LEG_HC_BIOS_OWNED)) 293 break; 294 delay(1000); 295 } 296 if (ms == EHCI_MAX_BIOS_WAIT) { 297 aprint_normal("%s: BIOS refuses to give up ownership, " 298 "using force\n", devname); 299 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 0); 300 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0); 301 } else { 302 aprint_normal("%s: BIOS has given up ownership\n", devname); 303 } 304 } 305
Indexes created Sat Sep 27 22:09:54 GMT 2025