ehci_pci.c revision 1.22
1 /* $NetBSD: ehci_pci.c,v 1.22 2006/01/17 12:30:00 xtraeme Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.22 2006/01/17 12:30:00 xtraeme Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <sys/proc.h> 47 #include <sys/queue.h> 48 49 #include <machine/bus.h> 50 51 #include <dev/pci/pcidevs.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/usb_pci.h> 54 55 #include <dev/usb/usb.h> 56 #include <dev/usb/usbdi.h> 57 #include <dev/usb/usbdivar.h> 58 #include <dev/usb/usb_mem.h> 59 60 #include <dev/usb/ehcireg.h> 61 #include <dev/usb/ehcivar.h> 62 63 #ifdef EHCI_DEBUG 64 #define DPRINTF(x) if (ehcidebug) printf x 65 extern int ehcidebug; 66 #else 67 #define DPRINTF(x) 68 #endif 69 70 static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 71 pcitag_t tag); 72 73 struct ehci_pci_softc { 74 ehci_softc_t sc; 75 pci_chipset_tag_t sc_pc; 76 pcitag_t sc_tag; 77 void *sc_ih; /* interrupt vectoring */ 78 }; 79 80 #define EHCI_MAX_BIOS_WAIT 1000 /* ms */ 81 82 static int 83 ehci_pci_match(struct device *parent, struct cfdata *match, void *aux) 84 { 85 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 86 87 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 88 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 89 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI) 90 return (1); 91 92 return (0); 93 } 94 95 static void 96 ehci_pci_attach(struct device *parent, struct device *self, void *aux) 97 { 98 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 99 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 100 pci_chipset_tag_t pc = pa->pa_pc; 101 pcitag_t tag = pa->pa_tag; 102 char const *intrstr; 103 pci_intr_handle_t ih; 104 pcireg_t csr; 105 const char *vendor; 106 const char *devname = sc->sc.sc_bus.bdev.dv_xname; 107 char devinfo[256]; 108 usbd_status r; 109 int ncomp; 110 struct usb_pci *up; 111 112 aprint_naive(": USB controller\n"); 113 114 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 115 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 116 PCI_REVISION(pa->pa_class)); 117 118 /* Map I/O registers */ 119 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 120 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 121 aprint_error("%s: can't map memory space\n", devname); 122 return; 123 } 124 125 sc->sc_pc = pc; 126 sc->sc_tag = tag; 127 sc->sc.sc_bus.dmatag = pa->pa_dmat; 128 129 /* Enable the device. */ 130 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 131 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 132 csr | PCI_COMMAND_MASTER_ENABLE); 133 134 /* Disable interrupts, so we don't get any spurious ones. */ 135 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 136 DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs)); 137 EOWRITE2(&sc->sc, EHCI_USBINTR, 0); 138 139 /* Map and establish the interrupt. */ 140 if (pci_intr_map(pa, &ih)) { 141 aprint_error("%s: couldn't map interrupt\n", devname); 142 return; 143 } 144 intrstr = pci_intr_string(pc, ih); 145 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc); 146 if (sc->sc_ih == NULL) { 147 aprint_error("%s: couldn't establish interrupt", devname); 148 if (intrstr != NULL) 149 aprint_normal(" at %s", intrstr); 150 aprint_normal("\n"); 151 return; 152 } 153 aprint_normal("%s: interrupting at %s\n", devname, intrstr); 154 155 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 156 case PCI_USBREV_PRE_1_0: 157 case PCI_USBREV_1_0: 158 case PCI_USBREV_1_1: 159 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 160 aprint_normal("%s: pre-2.0 USB rev\n", devname); 161 return; 162 case PCI_USBREV_2_0: 163 sc->sc.sc_bus.usbrev = USBREV_2_0; 164 break; 165 default: 166 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 167 break; 168 } 169 170 /* Figure out vendor for root hub descriptor. */ 171 vendor = pci_findvendor(pa->pa_id); 172 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 173 if (vendor) 174 strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor)); 175 else 176 snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), 177 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 178 179 /* Enable workaround for dropped interrupts as required */ 180 if (sc->sc.sc_id_vendor == PCI_VENDOR_VIATECH) 181 sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND; 182 183 /* 184 * Find companion controllers. According to the spec they always 185 * have lower function numbers so they should be enumerated already. 186 */ 187 ncomp = 0; 188 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 189 if (up->bus == pa->pa_bus && up->device == pa->pa_device) { 190 DPRINTF(("ehci_pci_attach: companion %s\n", 191 USBDEVNAME(up->usb->bdev))); 192 sc->sc.sc_comps[ncomp++] = up->usb; 193 if (ncomp >= EHCI_COMPANION_MAX) 194 break; 195 } 196 } 197 sc->sc.sc_ncomp = ncomp; 198 199 ehci_get_ownership(&sc->sc, pc, tag); 200 201 r = ehci_init(&sc->sc); 202 if (r != USBD_NORMAL_COMPLETION) { 203 aprint_error("%s: init failed, error=%d\n", devname, r); 204 return; 205 } 206 207 /* Attach usb device. */ 208 sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus, 209 usbctlprint); 210 } 211 212 static int 213 ehci_pci_detach(device_ptr_t self, int flags) 214 { 215 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 216 int rv; 217 218 rv = ehci_detach(&sc->sc, flags); 219 if (rv) 220 return (rv); 221 if (sc->sc_ih != NULL) { 222 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 223 sc->sc_ih = NULL; 224 } 225 if (sc->sc.sc_size) { 226 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 227 sc->sc.sc_size = 0; 228 } 229 return (0); 230 } 231 232 CFATTACH_DECL(ehci_pci, sizeof(struct ehci_pci_softc), 233 ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate); 234 235 #ifdef EHCI_DEBUG 236 static void 237 ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 238 { 239 u_int32_t cparams, legctlsts, addr, cap, id; 240 int maxdump = 10; 241 242 cparams = EREAD4(sc, EHCI_HCCPARAMS); 243 addr = EHCI_HCC_EECP(cparams); 244 while (addr != 0) { 245 cap = pci_conf_read(pc, tag, addr); 246 id = EHCI_CAP_GET_ID(cap); 247 switch (id) { 248 case EHCI_CAP_ID_LEGACY: 249 legctlsts = pci_conf_read(pc, tag, 250 addr + PCI_EHCI_USBLEGCTLSTS); 251 printf("ehci_dump_caps: legsup=0x%08x " 252 "legctlsts=0x%08x\n", cap, legctlsts); 253 break; 254 default: 255 printf("ehci_dump_caps: cap=0x%08x\n", cap); 256 break; 257 } 258 if (--maxdump < 0) 259 break; 260 addr = EHCI_CAP_GET_NEXT(cap); 261 } 262 } 263 #endif 264 265 static void 266 ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 267 { 268 const char *devname = sc->sc_bus.bdev.dv_xname; 269 u_int32_t cparams, addr, cap, legsup; 270 int maxcap = 10; 271 int ms; 272 273 #ifdef EHCI_DEBUG 274 if (ehcidebug) 275 ehci_dump_caps(sc, pc, tag); 276 #endif 277 cparams = EREAD4(sc, EHCI_HCCPARAMS); 278 addr = EHCI_HCC_EECP(cparams); 279 while (addr != 0) { 280 cap = pci_conf_read(pc, tag, addr); 281 if (EHCI_CAP_GET_ID(cap) == EHCI_CAP_ID_LEGACY) 282 break; 283 if (--maxcap < 0) { 284 aprint_normal("%s: broken extended capabilities " 285 "ignored\n", devname); 286 return; 287 } 288 addr = EHCI_CAP_GET_NEXT(cap); 289 } 290 291 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 292 /* Ask BIOS to give up ownership */ 293 legsup |= EHCI_LEG_HC_OS_OWNED; 294 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, legsup); 295 for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) { 296 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 297 if (!(legsup & EHCI_LEG_HC_BIOS_OWNED)) 298 break; 299 delay(1000); 300 } 301 if (ms == EHCI_MAX_BIOS_WAIT) { 302 aprint_normal("%s: BIOS refuses to give up ownership, " 303 "using force\n", devname); 304 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 0); 305 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0); 306 } else { 307 aprint_normal("%s: BIOS has given up ownership\n", devname); 308 } 309 } 310
Indexes created Sat Sep 27 22:09:54 GMT 2025