ehci_pci.c revision 1.23
1 /* $NetBSD: ehci_pci.c,v 1.23 2006/03/10 17:21:20 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.23 2006/03/10 17:21:20 jmcneill Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <sys/proc.h> 47 #include <sys/queue.h> 48 49 #include <machine/bus.h> 50 51 #include <dev/pci/pcidevs.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/usb_pci.h> 54 55 #include <dev/usb/usb.h> 56 #include <dev/usb/usbdi.h> 57 #include <dev/usb/usbdivar.h> 58 #include <dev/usb/usb_mem.h> 59 60 #include <dev/usb/ehcireg.h> 61 #include <dev/usb/ehcivar.h> 62 63 #ifdef EHCI_DEBUG 64 #define DPRINTF(x) if (ehcidebug) printf x 65 extern int ehcidebug; 66 #else 67 #define DPRINTF(x) 68 #endif 69 70 static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 71 pcitag_t tag); 72 static void ehci_pci_powerhook(int, void *); 73 74 struct ehci_pci_softc { 75 ehci_softc_t sc; 76 pci_chipset_tag_t sc_pc; 77 pcitag_t sc_tag; 78 void *sc_ih; /* interrupt vectoring */ 79 80 void *sc_powerhook; 81 struct pci_conf_state sc_pciconf; 82 }; 83 84 #define EHCI_MAX_BIOS_WAIT 1000 /* ms */ 85 86 static int 87 ehci_pci_match(struct device *parent, struct cfdata *match, void *aux) 88 { 89 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 90 91 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 92 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 93 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI) 94 return (1); 95 96 return (0); 97 } 98 99 static void 100 ehci_pci_attach(struct device *parent, struct device *self, void *aux) 101 { 102 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 103 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 104 pci_chipset_tag_t pc = pa->pa_pc; 105 pcitag_t tag = pa->pa_tag; 106 char const *intrstr; 107 pci_intr_handle_t ih; 108 pcireg_t csr; 109 const char *vendor; 110 const char *devname = sc->sc.sc_bus.bdev.dv_xname; 111 char devinfo[256]; 112 usbd_status r; 113 int ncomp; 114 struct usb_pci *up; 115 116 aprint_naive(": USB controller\n"); 117 118 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 119 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 120 PCI_REVISION(pa->pa_class)); 121 122 /* Map I/O registers */ 123 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 124 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 125 aprint_error("%s: can't map memory space\n", devname); 126 return; 127 } 128 129 sc->sc_pc = pc; 130 sc->sc_tag = tag; 131 sc->sc.sc_bus.dmatag = pa->pa_dmat; 132 133 /* Enable the device. */ 134 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 135 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 136 csr | PCI_COMMAND_MASTER_ENABLE); 137 138 /* Disable interrupts, so we don't get any spurious ones. */ 139 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 140 DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs)); 141 EOWRITE2(&sc->sc, EHCI_USBINTR, 0); 142 143 /* Map and establish the interrupt. */ 144 if (pci_intr_map(pa, &ih)) { 145 aprint_error("%s: couldn't map interrupt\n", devname); 146 return; 147 } 148 intrstr = pci_intr_string(pc, ih); 149 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc); 150 if (sc->sc_ih == NULL) { 151 aprint_error("%s: couldn't establish interrupt", devname); 152 if (intrstr != NULL) 153 aprint_normal(" at %s", intrstr); 154 aprint_normal("\n"); 155 return; 156 } 157 aprint_normal("%s: interrupting at %s\n", devname, intrstr); 158 159 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 160 case PCI_USBREV_PRE_1_0: 161 case PCI_USBREV_1_0: 162 case PCI_USBREV_1_1: 163 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 164 aprint_normal("%s: pre-2.0 USB rev\n", devname); 165 return; 166 case PCI_USBREV_2_0: 167 sc->sc.sc_bus.usbrev = USBREV_2_0; 168 break; 169 default: 170 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 171 break; 172 } 173 174 /* Figure out vendor for root hub descriptor. */ 175 vendor = pci_findvendor(pa->pa_id); 176 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 177 if (vendor) 178 strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor)); 179 else 180 snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), 181 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 182 183 /* Enable workaround for dropped interrupts as required */ 184 if (sc->sc.sc_id_vendor == PCI_VENDOR_VIATECH) 185 sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND; 186 187 /* 188 * Find companion controllers. According to the spec they always 189 * have lower function numbers so they should be enumerated already. 190 */ 191 ncomp = 0; 192 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 193 if (up->bus == pa->pa_bus && up->device == pa->pa_device) { 194 DPRINTF(("ehci_pci_attach: companion %s\n", 195 USBDEVNAME(up->usb->bdev))); 196 sc->sc.sc_comps[ncomp++] = up->usb; 197 if (ncomp >= EHCI_COMPANION_MAX) 198 break; 199 } 200 } 201 sc->sc.sc_ncomp = ncomp; 202 203 ehci_get_ownership(&sc->sc, pc, tag); 204 205 r = ehci_init(&sc->sc); 206 if (r != USBD_NORMAL_COMPLETION) { 207 aprint_error("%s: init failed, error=%d\n", devname, r); 208 return; 209 } 210 211 sc->sc_powerhook = powerhook_establish(ehci_pci_powerhook, sc); 212 if (sc->sc_powerhook == NULL) 213 aprint_error("%s: couldn't establish powerhook\n", 214 devname); 215 216 /* Attach usb device. */ 217 sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus, 218 usbctlprint); 219 } 220 221 static int 222 ehci_pci_detach(device_ptr_t self, int flags) 223 { 224 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 225 int rv; 226 227 if (sc->sc_powerhook != NULL) 228 powerhook_disestablish(sc->sc_powerhook); 229 230 rv = ehci_detach(&sc->sc, flags); 231 if (rv) 232 return (rv); 233 if (sc->sc_ih != NULL) { 234 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 235 sc->sc_ih = NULL; 236 } 237 if (sc->sc.sc_size) { 238 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 239 sc->sc.sc_size = 0; 240 } 241 return (0); 242 } 243 244 CFATTACH_DECL(ehci_pci, sizeof(struct ehci_pci_softc), 245 ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate); 246 247 #ifdef EHCI_DEBUG 248 static void 249 ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 250 { 251 u_int32_t cparams, legctlsts, addr, cap, id; 252 int maxdump = 10; 253 254 cparams = EREAD4(sc, EHCI_HCCPARAMS); 255 addr = EHCI_HCC_EECP(cparams); 256 while (addr != 0) { 257 cap = pci_conf_read(pc, tag, addr); 258 id = EHCI_CAP_GET_ID(cap); 259 switch (id) { 260 case EHCI_CAP_ID_LEGACY: 261 legctlsts = pci_conf_read(pc, tag, 262 addr + PCI_EHCI_USBLEGCTLSTS); 263 printf("ehci_dump_caps: legsup=0x%08x " 264 "legctlsts=0x%08x\n", cap, legctlsts); 265 break; 266 default: 267 printf("ehci_dump_caps: cap=0x%08x\n", cap); 268 break; 269 } 270 if (--maxdump < 0) 271 break; 272 addr = EHCI_CAP_GET_NEXT(cap); 273 } 274 } 275 #endif 276 277 static void 278 ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 279 { 280 const char *devname = sc->sc_bus.bdev.dv_xname; 281 u_int32_t cparams, addr, cap, legsup; 282 int maxcap = 10; 283 int ms; 284 285 #ifdef EHCI_DEBUG 286 if (ehcidebug) 287 ehci_dump_caps(sc, pc, tag); 288 #endif 289 cparams = EREAD4(sc, EHCI_HCCPARAMS); 290 addr = EHCI_HCC_EECP(cparams); 291 while (addr != 0) { 292 cap = pci_conf_read(pc, tag, addr); 293 if (EHCI_CAP_GET_ID(cap) == EHCI_CAP_ID_LEGACY) 294 break; 295 if (--maxcap < 0) { 296 aprint_normal("%s: broken extended capabilities " 297 "ignored\n", devname); 298 return; 299 } 300 addr = EHCI_CAP_GET_NEXT(cap); 301 } 302 303 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 304 /* Ask BIOS to give up ownership */ 305 legsup |= EHCI_LEG_HC_OS_OWNED; 306 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, legsup); 307 for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) { 308 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 309 if (!(legsup & EHCI_LEG_HC_BIOS_OWNED)) 310 break; 311 delay(1000); 312 } 313 if (ms == EHCI_MAX_BIOS_WAIT) { 314 aprint_normal("%s: BIOS refuses to give up ownership, " 315 "using force\n", devname); 316 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 0); 317 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0); 318 } else { 319 aprint_normal("%s: BIOS has given up ownership\n", devname); 320 } 321 } 322 323 static void 324 ehci_pci_powerhook(int why, void *opaque) 325 { 326 struct ehci_pci_softc *sc; 327 pci_chipset_tag_t pc; 328 pcitag_t tag; 329 330 sc = (struct ehci_pci_softc *)opaque; 331 pc = sc->sc_pc; 332 tag = sc->sc_tag; 333 334 switch (why) { 335 case PWR_STANDBY: 336 case PWR_SUSPEND: 337 pci_conf_capture(pc, tag, &sc->sc_pciconf); 338 break; 339 case PWR_RESUME: 340 pci_conf_restore(pc, tag, &sc->sc_pciconf); 341 ehci_get_ownership(&sc->sc, pc, tag); 342 break; 343 } 344 345 return; 346 } 347
Indexes created Sat Sep 27 22:09:54 GMT 2025