ehci_pci.c revision 1.29.2.3
1 /* $NetBSD: ehci_pci.c,v 1.29.2.3 2007/08/21 06:37:02 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.29.2.3 2007/08/21 06:37:02 joerg Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 #include <sys/proc.h> 47 #include <sys/queue.h> 48 49 #include <machine/bus.h> 50 51 #include <dev/pci/pcidevs.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/usb_pci.h> 54 55 #include <dev/usb/usb.h> 56 #include <dev/usb/usbdi.h> 57 #include <dev/usb/usbdivar.h> 58 #include <dev/usb/usb_mem.h> 59 60 #include <dev/usb/ehcireg.h> 61 #include <dev/usb/ehcivar.h> 62 63 #ifdef EHCI_DEBUG 64 #define DPRINTF(x) if (ehcidebug) printf x 65 extern int ehcidebug; 66 #else 67 #define DPRINTF(x) 68 #endif 69 70 static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 71 pcitag_t tag); 72 static pnp_status_t ehci_pci_power(device_t, pnp_request_t, void *); 73 74 struct ehci_pci_softc { 75 ehci_softc_t sc; 76 pci_chipset_tag_t sc_pc; 77 pcitag_t sc_tag; 78 void *sc_ih; /* interrupt vectoring */ 79 80 struct pci_conf_state sc_pciconf; 81 }; 82 83 #define EHCI_MAX_BIOS_WAIT 1000 /* ms */ 84 85 static int 86 ehci_pci_match(struct device *parent, struct cfdata *match, 87 void *aux) 88 { 89 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 90 91 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 92 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 93 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI) 94 return (1); 95 96 return (0); 97 } 98 99 static void 100 ehci_pci_attach(struct device *parent, struct device *self, void *aux) 101 { 102 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 103 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 104 pci_chipset_tag_t pc = pa->pa_pc; 105 pcitag_t tag = pa->pa_tag; 106 pnp_status_t status; 107 char const *intrstr; 108 pci_intr_handle_t ih; 109 pcireg_t csr; 110 const char *vendor; 111 const char *devname = sc->sc.sc_bus.bdev.dv_xname; 112 char devinfo[256]; 113 usbd_status r; 114 int ncomp; 115 struct usb_pci *up; 116 117 aprint_naive(": USB controller\n"); 118 119 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 120 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 121 PCI_REVISION(pa->pa_class)); 122 123 /* Map I/O registers */ 124 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 125 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 126 aprint_error("%s: can't map memory space\n", devname); 127 return; 128 } 129 130 sc->sc_pc = pc; 131 sc->sc_tag = tag; 132 sc->sc.sc_bus.dmatag = pa->pa_dmat; 133 134 /* Enable the device. */ 135 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 136 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 137 csr | PCI_COMMAND_MASTER_ENABLE); 138 139 /* Disable interrupts, so we don't get any spurious ones. */ 140 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 141 DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs)); 142 EOWRITE2(&sc->sc, EHCI_USBINTR, 0); 143 144 /* Map and establish the interrupt. */ 145 if (pci_intr_map(pa, &ih)) { 146 aprint_error("%s: couldn't map interrupt\n", devname); 147 return; 148 } 149 intrstr = pci_intr_string(pc, ih); 150 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc); 151 if (sc->sc_ih == NULL) { 152 aprint_error("%s: couldn't establish interrupt", devname); 153 if (intrstr != NULL) 154 aprint_normal(" at %s", intrstr); 155 aprint_normal("\n"); 156 return; 157 } 158 aprint_normal("%s: interrupting at %s\n", devname, intrstr); 159 160 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 161 case PCI_USBREV_PRE_1_0: 162 case PCI_USBREV_1_0: 163 case PCI_USBREV_1_1: 164 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 165 aprint_verbose("%s: pre-2.0 USB rev\n", devname); 166 return; 167 case PCI_USBREV_2_0: 168 sc->sc.sc_bus.usbrev = USBREV_2_0; 169 break; 170 default: 171 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 172 break; 173 } 174 175 /* Figure out vendor for root hub descriptor. */ 176 vendor = pci_findvendor(pa->pa_id); 177 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 178 if (vendor) 179 strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor)); 180 else 181 snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), 182 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 183 184 /* Enable workaround for dropped interrupts as required */ 185 switch (sc->sc.sc_id_vendor) { 186 case PCI_VENDOR_ATI: 187 case PCI_VENDOR_VIATECH: 188 sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND; 189 aprint_normal("%s: dropped intr workaround enabled\n", devname); 190 break; 191 default: 192 break; 193 } 194 195 /* 196 * Find companion controllers. According to the spec they always 197 * have lower function numbers so they should be enumerated already. 198 */ 199 ncomp = 0; 200 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 201 if (up->bus == pa->pa_bus && up->device == pa->pa_device) { 202 DPRINTF(("ehci_pci_attach: companion %s\n", 203 USBDEVNAME(up->usb->bdev))); 204 sc->sc.sc_comps[ncomp++] = up->usb; 205 if (ncomp >= EHCI_COMPANION_MAX) 206 break; 207 } 208 } 209 sc->sc.sc_ncomp = ncomp; 210 211 ehci_get_ownership(&sc->sc, pc, tag); 212 213 r = ehci_init(&sc->sc); 214 if (r != USBD_NORMAL_COMPLETION) { 215 aprint_error("%s: init failed, error=%d\n", devname, r); 216 return; 217 } 218 219 status = pnp_register(self, ehci_pci_power); 220 if (status != PNP_STATUS_SUCCESS) 221 aprint_error("%s: couldn't establish power handler\n", 222 devname); 223 224 /* Attach usb device. */ 225 sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus, 226 usbctlprint); 227 } 228 229 static int 230 ehci_pci_detach(device_ptr_t self, int flags) 231 { 232 struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self; 233 int rv; 234 235 rv = ehci_detach(&sc->sc, flags); 236 if (rv) 237 return (rv); 238 if (sc->sc_ih != NULL) { 239 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 240 sc->sc_ih = NULL; 241 } 242 if (sc->sc.sc_size) { 243 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 244 sc->sc.sc_size = 0; 245 } 246 return (0); 247 } 248 249 CFATTACH_DECL(ehci_pci, sizeof(struct ehci_pci_softc), 250 ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate); 251 252 #ifdef EHCI_DEBUG 253 static void 254 ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 255 { 256 u_int32_t cparams, legctlsts, addr, cap, id; 257 int maxdump = 10; 258 259 cparams = EREAD4(sc, EHCI_HCCPARAMS); 260 addr = EHCI_HCC_EECP(cparams); 261 while (addr != 0) { 262 cap = pci_conf_read(pc, tag, addr); 263 id = EHCI_CAP_GET_ID(cap); 264 switch (id) { 265 case EHCI_CAP_ID_LEGACY: 266 legctlsts = pci_conf_read(pc, tag, 267 addr + PCI_EHCI_USBLEGCTLSTS); 268 printf("ehci_dump_caps: legsup=0x%08x " 269 "legctlsts=0x%08x\n", cap, legctlsts); 270 break; 271 default: 272 printf("ehci_dump_caps: cap=0x%08x\n", cap); 273 break; 274 } 275 if (--maxdump < 0) 276 break; 277 addr = EHCI_CAP_GET_NEXT(cap); 278 } 279 } 280 #endif 281 282 static void 283 ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 284 { 285 const char *devname = sc->sc_bus.bdev.dv_xname; 286 u_int32_t cparams, addr, cap, legsup; 287 int maxcap = 10; 288 int ms; 289 290 #ifdef EHCI_DEBUG 291 if (ehcidebug) 292 ehci_dump_caps(sc, pc, tag); 293 #endif 294 cparams = EREAD4(sc, EHCI_HCCPARAMS); 295 addr = EHCI_HCC_EECP(cparams); 296 while (addr != 0) { 297 cap = pci_conf_read(pc, tag, addr); 298 if (EHCI_CAP_GET_ID(cap) == EHCI_CAP_ID_LEGACY) 299 break; 300 if (--maxcap < 0) { 301 aprint_normal("%s: broken extended capabilities " 302 "ignored\n", devname); 303 return; 304 } 305 addr = EHCI_CAP_GET_NEXT(cap); 306 } 307 308 /* If the USB legacy capability is not specified, we are done */ 309 if (addr == 0) 310 return; 311 312 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 313 /* Ask BIOS to give up ownership */ 314 legsup |= EHCI_LEG_HC_OS_OWNED; 315 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, legsup); 316 for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) { 317 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 318 if (!(legsup & EHCI_LEG_HC_BIOS_OWNED)) 319 break; 320 delay(1000); 321 } 322 if (ms == EHCI_MAX_BIOS_WAIT) { 323 aprint_normal("%s: BIOS refuses to give up ownership, " 324 "using force\n", devname); 325 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 0); 326 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0); 327 } else { 328 aprint_verbose("%s: BIOS has given up ownership\n", devname); 329 } 330 } 331 332 static pnp_status_t 333 ehci_pci_power(device_t dv, pnp_request_t req, void *opaque) 334 { 335 struct ehci_pci_softc *sc; 336 pnp_status_t status; 337 pnp_capabilities_t *pcaps; 338 pnp_state_t *pstate; 339 pci_chipset_tag_t pc; 340 pcitag_t tag; 341 pcireg_t val; 342 int off, s; 343 344 sc = (struct ehci_pci_softc *)dv; 345 pc = sc->sc_pc; 346 tag = sc->sc_tag; 347 348 switch (req) { 349 case PNP_REQUEST_GET_CAPABILITIES: 350 pcaps = opaque; 351 352 if (!pci_get_capability(pc, tag, PCI_CAP_PWRMGMT, &off, &val)) 353 return PNP_STATUS_UNSUPPORTED; 354 pcaps->state = pci_pnp_capabilities(val); 355 status = ehci_power(dv, req, opaque); 356 break; 357 358 case PNP_REQUEST_GET_STATE: 359 pstate = opaque; 360 if (pci_get_powerstate(pc, tag, &val) != 0) 361 return PNP_STATUS_UNSUPPORTED; 362 *pstate = pci_pnp_powerstate(val); 363 status = PNP_STATUS_SUCCESS; 364 break; 365 366 case PNP_REQUEST_SET_STATE: 367 pstate = opaque; 368 switch (*pstate) { 369 case PNP_STATE_D0: 370 val = PCI_PMCSR_STATE_D0; 371 break; 372 case PNP_STATE_D3: 373 val = PCI_PMCSR_STATE_D3; 374 status = ehci_power(dv, req, opaque); 375 s = splhardusb(); 376 pci_conf_capture(pc, tag, &sc->sc_pciconf); 377 splx(s); 378 break; 379 default: 380 return PNP_STATUS_UNSUPPORTED; 381 } 382 383 status = PNP_STATUS_SUCCESS; 384 if (pci_set_powerstate(pc, tag, val) == 0) { 385 if (*pstate != PNP_STATE_D0) 386 break; 387 388 s = splhardusb(); 389 pci_conf_restore(pc, tag, &sc->sc_pciconf); 390 ehci_get_ownership(&sc->sc, pc, tag); 391 splx(s); 392 393 status = ehci_power(dv, req, opaque); 394 } 395 break; 396 397 default: 398 status = PNP_STATUS_UNSUPPORTED; 399 break; 400 } 401 402 return status; 403 } 404
Indexes created Sat Oct 11 14:09:46 GMT 2025