ehci_pci.c revision 1.56.2.3
1 /* $NetBSD: ehci_pci.c,v 1.56.2.3 2017/12/03 11:37:07 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.56.2.3 2017/12/03 11:37:07 jdolecek Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/device.h> 39 #include <sys/proc.h> 40 #include <sys/queue.h> 41 42 #include <sys/bus.h> 43 44 #include <dev/pci/pcidevs.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/usb_pci.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 #include <dev/usb/usbdivar.h> 51 #include <dev/usb/usb_mem.h> 52 53 #include <dev/usb/ehcireg.h> 54 #include <dev/usb/ehcivar.h> 55 56 #ifdef EHCI_DEBUG 57 #define DPRINTF(x) if (ehcidebug) printf x 58 extern int ehcidebug; 59 #else 60 #define DPRINTF(x) 61 #endif 62 63 enum ehci_pci_quirk_flags { 64 EHCI_PCI_QUIRK_AMD_SB600 = 0x1, /* always need a quirk */ 65 EHCI_PCI_QUIRK_AMD_SB700 = 0x2, /* depends on the SMB revision */ 66 }; 67 68 static const struct pci_quirkdata ehci_pci_quirks[] = { 69 { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_EHCI, 70 EHCI_PCI_QUIRK_AMD_SB600 }, 71 { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_EHCI, 72 EHCI_PCI_QUIRK_AMD_SB700 }, 73 }; 74 75 static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 76 pcitag_t tag); 77 static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 78 pcitag_t tag); 79 static bool ehci_pci_suspend(device_t, const pmf_qual_t *); 80 static bool ehci_pci_resume(device_t, const pmf_qual_t *); 81 82 struct ehci_pci_softc { 83 ehci_softc_t sc; 84 pci_chipset_tag_t sc_pc; 85 pcitag_t sc_tag; 86 void *sc_ih; /* interrupt vectoring */ 87 }; 88 89 static int ehci_sb700_match(const struct pci_attach_args *pa); 90 static int ehci_apply_amd_quirks(struct ehci_pci_softc *sc); 91 enum ehci_pci_quirk_flags ehci_pci_lookup_quirkdata(pci_vendor_id_t, 92 pci_product_id_t); 93 94 #define EHCI_MAX_BIOS_WAIT 100 /* ms*10 */ 95 #define EHCI_SBx00_WORKAROUND_REG 0x50 96 #define EHCI_SBx00_WORKAROUND_ENABLE __BIT(27) 97 98 99 static int 100 ehci_pci_match(device_t parent, cfdata_t match, void *aux) 101 { 102 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 103 104 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 105 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 106 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI) 107 return 1; 108 109 return 0; 110 } 111 112 static void 113 ehci_pci_attach(device_t parent, device_t self, void *aux) 114 { 115 struct ehci_pci_softc *sc = device_private(self); 116 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 117 pci_chipset_tag_t pc = pa->pa_pc; 118 pcitag_t tag = pa->pa_tag; 119 char const *intrstr; 120 pci_intr_handle_t ih; 121 pcireg_t csr; 122 int ncomp; 123 struct usb_pci *up; 124 int quirk; 125 char intrbuf[PCI_INTRSTR_LEN]; 126 127 sc->sc.sc_dev = self; 128 sc->sc.sc_bus.ub_hcpriv = sc; 129 130 pci_aprint_devinfo(pa, "USB controller"); 131 132 /* Check for quirks */ 133 quirk = ehci_pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id), 134 PCI_PRODUCT(pa->pa_id)); 135 136 /* Map I/O registers */ 137 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 138 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 139 sc->sc.sc_size = 0; 140 aprint_error_dev(self, "can't map memory space\n"); 141 return; 142 } 143 144 sc->sc_pc = pc; 145 sc->sc_tag = tag; 146 sc->sc.sc_bus.ub_dmatag = pa->pa_dmat; 147 148 /* Disable interrupts, so we don't get any spurious ones. */ 149 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 150 DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs)); 151 EOWRITE4(&sc->sc, EHCI_USBINTR, 0); 152 153 /* Handle quirks */ 154 switch (quirk) { 155 case EHCI_PCI_QUIRK_AMD_SB600: 156 ehci_apply_amd_quirks(sc); 157 break; 158 case EHCI_PCI_QUIRK_AMD_SB700: 159 if (pci_find_device(NULL, ehci_sb700_match)) 160 ehci_apply_amd_quirks(sc); 161 break; 162 } 163 164 pcireg_t intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 165 int pin = PCI_INTERRUPT_PIN(intr); 166 167 /* Enable the device. */ 168 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 169 csr |= PCI_COMMAND_MASTER_ENABLE; 170 csr &= ~(pin ? PCI_COMMAND_INTERRUPT_DISABLE : 0); 171 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 172 173 /* Map and establish the interrupt. */ 174 if (pci_intr_map(pa, &ih)) { 175 aprint_error_dev(self, "couldn't map interrupt\n"); 176 goto fail; 177 } 178 179 /* 180 * Allocate IRQ 181 */ 182 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 183 sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_USB, ehci_intr, sc, 184 device_xname(self)); 185 if (sc->sc_ih == NULL) { 186 aprint_error_dev(self, "couldn't establish interrupt"); 187 if (intrstr != NULL) 188 aprint_error(" at %s", intrstr); 189 aprint_error("\n"); 190 goto fail; 191 } 192 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 193 194 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 195 case PCI_USBREV_PRE_1_0: 196 case PCI_USBREV_1_0: 197 case PCI_USBREV_1_1: 198 sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; 199 aprint_verbose_dev(self, "pre-2.0 USB rev\n"); 200 goto fail; 201 case PCI_USBREV_2_0: 202 sc->sc.sc_bus.ub_revision = USBREV_2_0; 203 break; 204 default: 205 sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; 206 break; 207 } 208 209 /* Figure out vendor for root hub descriptor. */ 210 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 211 pci_findvendor(sc->sc.sc_vendor, 212 sizeof(sc->sc.sc_vendor), sc->sc.sc_id_vendor); 213 /* Enable workaround for dropped interrupts as required */ 214 switch (sc->sc.sc_id_vendor) { 215 case PCI_VENDOR_ATI: 216 case PCI_VENDOR_VIATECH: 217 sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND; 218 aprint_normal_dev(self, "dropped intr workaround enabled\n"); 219 break; 220 default: 221 break; 222 } 223 224 /* 225 * Find companion controllers. According to the spec they always 226 * have lower function numbers so they should be enumerated already. 227 */ 228 const u_int maxncomp = EHCI_HCS_N_CC(EREAD4(&sc->sc, EHCI_HCSPARAMS)); 229 KASSERT(maxncomp <= EHCI_COMPANION_MAX); 230 ncomp = 0; 231 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 232 if (up->bus == pa->pa_bus && up->device == pa->pa_device 233 && !up->claimed) { 234 DPRINTF(("ehci_pci_attach: companion %s\n", 235 device_xname(up->usb))); 236 sc->sc.sc_comps[ncomp++] = up->usb; 237 up->claimed = true; 238 if (ncomp == maxncomp) 239 break; 240 } 241 } 242 sc->sc.sc_ncomp = ncomp; 243 244 ehci_get_ownership(&sc->sc, pc, tag); 245 246 int err = ehci_init(&sc->sc); 247 if (err) { 248 aprint_error_dev(self, "init failed, error=%d\n", err); 249 goto fail; 250 } 251 252 if (!pmf_device_register1(self, ehci_pci_suspend, ehci_pci_resume, 253 ehci_shutdown)) 254 aprint_error_dev(self, "couldn't establish power handler\n"); 255 256 /* Attach usb device. */ 257 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 258 return; 259 260 fail: 261 if (sc->sc_ih) { 262 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 263 sc->sc_ih = NULL; 264 } 265 if (sc->sc.sc_size) { 266 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 267 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 268 sc->sc.sc_size = 0; 269 } 270 return; 271 } 272 273 static int 274 ehci_pci_detach(device_t self, int flags) 275 { 276 struct ehci_pci_softc *sc = device_private(self); 277 int rv; 278 279 rv = ehci_detach(&sc->sc, flags); 280 if (rv) 281 return rv; 282 283 pmf_device_deregister(self); 284 ehci_shutdown(self, flags); 285 286 /* disable interrupts */ 287 EOWRITE4(&sc->sc, EHCI_USBINTR, 0); 288 /* XXX grotty hack to flush the write */ 289 (void)EOREAD4(&sc->sc, EHCI_USBINTR); 290 291 if (sc->sc_ih != NULL) { 292 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 293 sc->sc_ih = NULL; 294 } 295 if (sc->sc.sc_size) { 296 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 297 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 298 sc->sc.sc_size = 0; 299 } 300 301 #if 1 302 /* XXX created in ehci.c */ 303 mutex_destroy(&sc->sc.sc_lock); 304 mutex_destroy(&sc->sc.sc_intr_lock); 305 306 softint_disestablish(sc->sc.sc_doorbell_si); 307 softint_disestablish(sc->sc.sc_pcd_si); 308 #endif 309 310 return 0; 311 } 312 313 CFATTACH_DECL3_NEW(ehci_pci, sizeof(struct ehci_pci_softc), 314 ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate, NULL, 315 ehci_childdet, DVF_DETACH_SHUTDOWN); 316 317 #ifdef EHCI_DEBUG 318 static void 319 ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 320 { 321 uint32_t cparams, legctlsts, addr, cap, id; 322 int maxdump = 10; 323 324 cparams = EREAD4(sc, EHCI_HCCPARAMS); 325 addr = EHCI_HCC_EECP(cparams); 326 while (addr != 0) { 327 cap = pci_conf_read(pc, tag, addr); 328 id = EHCI_CAP_GET_ID(cap); 329 switch (id) { 330 case EHCI_CAP_ID_LEGACY: 331 legctlsts = pci_conf_read(pc, tag, 332 addr + PCI_EHCI_USBLEGCTLSTS); 333 printf("ehci_dump_caps: legsup=0x%08x " 334 "legctlsts=0x%08x\n", cap, legctlsts); 335 break; 336 default: 337 printf("ehci_dump_caps: cap=0x%08x\n", cap); 338 break; 339 } 340 if (--maxdump < 0) 341 break; 342 addr = EHCI_CAP_GET_NEXT(cap); 343 } 344 } 345 #endif 346 347 static void 348 ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 349 { 350 const char *devname = device_xname(sc->sc_dev); 351 uint32_t cparams, addr, cap; 352 pcireg_t legsup; 353 int maxcap = 10; 354 355 cparams = EREAD4(sc, EHCI_HCCPARAMS); 356 addr = EHCI_HCC_EECP(cparams); 357 while (addr != 0) { 358 cap = pci_conf_read(pc, tag, addr); 359 if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY) 360 goto next; 361 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 362 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 363 legsup & ~EHCI_LEG_HC_OS_OWNED); 364 365 next: 366 if (--maxcap < 0) { 367 aprint_normal("%s: broken extended capabilities " 368 "ignored\n", devname); 369 return; 370 } 371 addr = EHCI_CAP_GET_NEXT(cap); 372 } 373 } 374 375 static void 376 ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 377 { 378 const char *devname = device_xname(sc->sc_dev); 379 uint32_t cparams, addr, cap; 380 pcireg_t legsup; 381 int maxcap = 10; 382 int ms; 383 384 #ifdef EHCI_DEBUG 385 if (ehcidebug) 386 ehci_dump_caps(sc, pc, tag); 387 #endif 388 cparams = EREAD4(sc, EHCI_HCCPARAMS); 389 addr = EHCI_HCC_EECP(cparams); 390 while (addr != 0) { 391 cap = pci_conf_read(pc, tag, addr); 392 if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY) 393 goto next; 394 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 395 if (legsup & EHCI_LEG_HC_BIOS_OWNED) { 396 /* Ask BIOS to give up ownership */ 397 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 398 legsup | EHCI_LEG_HC_OS_OWNED); 399 for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) { 400 legsup = pci_conf_read(pc, tag, 401 addr + PCI_EHCI_USBLEGSUP); 402 if (!(legsup & EHCI_LEG_HC_BIOS_OWNED)) 403 break; 404 delay(10000); 405 } 406 if (ms == EHCI_MAX_BIOS_WAIT) { 407 aprint_normal("%s: BIOS refuses to give up " 408 "ownership, using force\n", devname); 409 pci_conf_write(pc, tag, 410 addr + PCI_EHCI_USBLEGSUP, 0); 411 } else 412 aprint_verbose("%s: BIOS has given up " 413 "ownership\n", devname); 414 } 415 416 /* Disable SMIs */ 417 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0); 418 419 next: 420 if (--maxcap < 0) { 421 aprint_normal("%s: broken extended capabilities " 422 "ignored\n", devname); 423 return; 424 } 425 addr = EHCI_CAP_GET_NEXT(cap); 426 } 427 428 } 429 430 static bool 431 ehci_pci_suspend(device_t dv, const pmf_qual_t *qual) 432 { 433 struct ehci_pci_softc *sc = device_private(dv); 434 435 ehci_suspend(dv, qual); 436 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 437 438 return true; 439 } 440 441 static bool 442 ehci_pci_resume(device_t dv, const pmf_qual_t *qual) 443 { 444 struct ehci_pci_softc *sc = device_private(dv); 445 446 ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 447 return ehci_resume(dv, qual); 448 } 449 450 static int 451 ehci_sb700_match(const struct pci_attach_args *pa) 452 { 453 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI && 454 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATI_SB600_SMB)) 455 return 0; 456 457 switch (PCI_REVISION(pa->pa_class)) { 458 case 0x3a: 459 case 0x3b: 460 return 1; 461 } 462 463 return 0; 464 } 465 466 static int 467 ehci_apply_amd_quirks(struct ehci_pci_softc *sc) 468 { 469 pcireg_t value; 470 471 aprint_normal_dev(sc->sc.sc_dev, 472 "applying AMD SB600/SB700 USB freeze workaround\n"); 473 value = pci_conf_read(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG); 474 pci_conf_write(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG, 475 value | EHCI_SBx00_WORKAROUND_ENABLE); 476 477 return 0; 478 } 479 480 enum ehci_pci_quirk_flags 481 ehci_pci_lookup_quirkdata(pci_vendor_id_t vendor, pci_product_id_t product) 482 { 483 int i; 484 485 for (i = 0; i < __arraycount(ehci_pci_quirks); i++) { 486 if (vendor == ehci_pci_quirks[i].vendor && 487 product == ehci_pci_quirks[i].product) 488 return ehci_pci_quirks[i].quirks; 489 } 490 return 0; 491 } 492 493
Indexes created Sat Oct 11 14:09:46 GMT 2025