ehci_pci.c revision 1.58.4.1
1 /* $NetBSD: ehci_pci.c,v 1.58.4.1 2017/04/05 19:54:19 snj Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.58.4.1 2017/04/05 19:54:19 snj Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/device.h> 39 #include <sys/proc.h> 40 #include <sys/queue.h> 41 42 #include <sys/bus.h> 43 44 #include <dev/pci/pcidevs.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/usb_pci.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 #include <dev/usb/usbdivar.h> 51 #include <dev/usb/usb_mem.h> 52 53 #include <dev/usb/ehcireg.h> 54 #include <dev/usb/ehcivar.h> 55 56 #ifdef EHCI_DEBUG 57 #define DPRINTF(x) if (ehcidebug) printf x 58 extern int ehcidebug; 59 #else 60 #define DPRINTF(x) 61 #endif 62 63 enum ehci_pci_quirk_flags { 64 EHCI_PCI_QUIRK_AMD_SB600 = 0x1, /* always need a quirk */ 65 EHCI_PCI_QUIRK_AMD_SB700 = 0x2, /* depends on the SMB revision */ 66 }; 67 68 static const struct pci_quirkdata ehci_pci_quirks[] = { 69 { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_EHCI, 70 EHCI_PCI_QUIRK_AMD_SB600 }, 71 { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_EHCI, 72 EHCI_PCI_QUIRK_AMD_SB700 }, 73 }; 74 75 static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 76 pcitag_t tag); 77 static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 78 pcitag_t tag); 79 static bool ehci_pci_suspend(device_t, const pmf_qual_t *); 80 static bool ehci_pci_resume(device_t, const pmf_qual_t *); 81 82 struct ehci_pci_softc { 83 ehci_softc_t sc; 84 pci_chipset_tag_t sc_pc; 85 pcitag_t sc_tag; 86 void *sc_ih; /* interrupt vectoring */ 87 }; 88 89 static int ehci_sb700_match(const struct pci_attach_args *pa); 90 static int ehci_apply_amd_quirks(struct ehci_pci_softc *sc); 91 enum ehci_pci_quirk_flags ehci_pci_lookup_quirkdata(pci_vendor_id_t, 92 pci_product_id_t); 93 94 #define EHCI_MAX_BIOS_WAIT 100 /* ms*10 */ 95 #define EHCI_SBx00_WORKAROUND_REG 0x50 96 #define EHCI_SBx00_WORKAROUND_ENABLE __BIT(27) 97 98 99 static int 100 ehci_pci_match(device_t parent, cfdata_t match, void *aux) 101 { 102 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 103 104 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 105 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 106 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI) 107 return 1; 108 109 return 0; 110 } 111 112 static void 113 ehci_pci_attach(device_t parent, device_t self, void *aux) 114 { 115 struct ehci_pci_softc *sc = device_private(self); 116 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 117 pci_chipset_tag_t pc = pa->pa_pc; 118 pcitag_t tag = pa->pa_tag; 119 char const *intrstr; 120 pci_intr_handle_t ih; 121 pcireg_t csr; 122 const char *vendor; 123 usbd_status r; 124 int ncomp; 125 struct usb_pci *up; 126 int quirk; 127 char intrbuf[PCI_INTRSTR_LEN]; 128 129 sc->sc.sc_dev = self; 130 sc->sc.sc_bus.ub_hcpriv = sc; 131 132 pci_aprint_devinfo(pa, "USB controller"); 133 134 /* Check for quirks */ 135 quirk = ehci_pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id), 136 PCI_PRODUCT(pa->pa_id)); 137 138 /* Map I/O registers */ 139 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 140 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 141 sc->sc.sc_size = 0; 142 aprint_error_dev(self, "can't map memory space\n"); 143 return; 144 } 145 146 /* Disable interrupts, so we don't get any spurious ones. */ 147 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 148 DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs)); 149 EOWRITE4(&sc->sc, EHCI_USBINTR, 0); 150 151 sc->sc_pc = pc; 152 sc->sc_tag = tag; 153 sc->sc.sc_bus.ub_dmatag = pa->pa_dmat; 154 155 /* Handle quirks */ 156 switch (quirk) { 157 case EHCI_PCI_QUIRK_AMD_SB600: 158 ehci_apply_amd_quirks(sc); 159 break; 160 case EHCI_PCI_QUIRK_AMD_SB700: 161 if (pci_find_device(NULL, ehci_sb700_match)) 162 ehci_apply_amd_quirks(sc); 163 break; 164 } 165 166 /* Enable the device. */ 167 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 168 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 169 csr | PCI_COMMAND_MASTER_ENABLE); 170 171 /* Map and establish the interrupt. */ 172 if (pci_intr_map(pa, &ih)) { 173 aprint_error_dev(self, "couldn't map interrupt\n"); 174 goto fail; 175 } 176 177 /* 178 * Allocate IRQ 179 */ 180 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 181 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc); 182 if (sc->sc_ih == NULL) { 183 aprint_error_dev(self, "couldn't establish interrupt"); 184 if (intrstr != NULL) 185 aprint_error(" at %s", intrstr); 186 aprint_error("\n"); 187 return; 188 } 189 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 190 191 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 192 case PCI_USBREV_PRE_1_0: 193 case PCI_USBREV_1_0: 194 case PCI_USBREV_1_1: 195 sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; 196 aprint_verbose_dev(self, "pre-2.0 USB rev\n"); 197 return; 198 case PCI_USBREV_2_0: 199 sc->sc.sc_bus.ub_revision = USBREV_2_0; 200 break; 201 default: 202 sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; 203 break; 204 } 205 206 /* Figure out vendor for root hub descriptor. */ 207 vendor = pci_findvendor(pa->pa_id); 208 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 209 if (vendor) 210 strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor)); 211 else 212 snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), 213 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 214 215 /* Enable workaround for dropped interrupts as required */ 216 switch (sc->sc.sc_id_vendor) { 217 case PCI_VENDOR_ATI: 218 case PCI_VENDOR_VIATECH: 219 sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND; 220 aprint_normal_dev(self, "dropped intr workaround enabled\n"); 221 break; 222 default: 223 break; 224 } 225 226 /* 227 * Find companion controllers. According to the spec they always 228 * have lower function numbers so they should be enumerated already. 229 */ 230 const u_int maxncomp = EHCI_HCS_N_CC(EREAD4(&sc->sc, EHCI_HCSPARAMS)); 231 KASSERT(maxncomp <= EHCI_COMPANION_MAX); 232 ncomp = 0; 233 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 234 if (up->bus == pa->pa_bus && up->device == pa->pa_device 235 && !up->claimed) { 236 DPRINTF(("ehci_pci_attach: companion %s\n", 237 device_xname(up->usb))); 238 sc->sc.sc_comps[ncomp++] = up->usb; 239 up->claimed = true; 240 if (ncomp == maxncomp) 241 break; 242 } 243 } 244 sc->sc.sc_ncomp = ncomp; 245 246 ehci_get_ownership(&sc->sc, pc, tag); 247 248 r = ehci_init(&sc->sc); 249 if (r != USBD_NORMAL_COMPLETION) { 250 aprint_error_dev(self, "init failed, error=%d\n", r); 251 goto fail; 252 } 253 254 if (!pmf_device_register1(self, ehci_pci_suspend, ehci_pci_resume, 255 ehci_shutdown)) 256 aprint_error_dev(self, "couldn't establish power handler\n"); 257 258 /* Attach usb device. */ 259 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 260 return; 261 262 fail: 263 if (sc->sc_ih) { 264 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 265 sc->sc_ih = NULL; 266 } 267 if (sc->sc.sc_size) { 268 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 269 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 270 sc->sc.sc_size = 0; 271 } 272 return; 273 } 274 275 static int 276 ehci_pci_detach(device_t self, int flags) 277 { 278 struct ehci_pci_softc *sc = device_private(self); 279 int rv; 280 281 rv = ehci_detach(&sc->sc, flags); 282 if (rv) 283 return rv; 284 285 pmf_device_deregister(self); 286 ehci_shutdown(self, flags); 287 288 /* disable interrupts */ 289 EOWRITE4(&sc->sc, EHCI_USBINTR, 0); 290 /* XXX grotty hack to flush the write */ 291 (void)EOREAD4(&sc->sc, EHCI_USBINTR); 292 293 if (sc->sc_ih != NULL) { 294 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 295 sc->sc_ih = NULL; 296 } 297 if (sc->sc.sc_size) { 298 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 299 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 300 sc->sc.sc_size = 0; 301 } 302 303 #if 1 304 /* XXX created in ehci.c */ 305 mutex_destroy(&sc->sc.sc_lock); 306 mutex_destroy(&sc->sc.sc_intr_lock); 307 308 softint_disestablish(sc->sc.sc_doorbell_si); 309 softint_disestablish(sc->sc.sc_pcd_si); 310 #endif 311 312 return 0; 313 } 314 315 CFATTACH_DECL3_NEW(ehci_pci, sizeof(struct ehci_pci_softc), 316 ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate, NULL, 317 ehci_childdet, DVF_DETACH_SHUTDOWN); 318 319 #ifdef EHCI_DEBUG 320 static void 321 ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 322 { 323 uint32_t cparams, legctlsts, addr, cap, id; 324 int maxdump = 10; 325 326 cparams = EREAD4(sc, EHCI_HCCPARAMS); 327 addr = EHCI_HCC_EECP(cparams); 328 while (addr != 0) { 329 cap = pci_conf_read(pc, tag, addr); 330 id = EHCI_CAP_GET_ID(cap); 331 switch (id) { 332 case EHCI_CAP_ID_LEGACY: 333 legctlsts = pci_conf_read(pc, tag, 334 addr + PCI_EHCI_USBLEGCTLSTS); 335 printf("ehci_dump_caps: legsup=0x%08x " 336 "legctlsts=0x%08x\n", cap, legctlsts); 337 break; 338 default: 339 printf("ehci_dump_caps: cap=0x%08x\n", cap); 340 break; 341 } 342 if (--maxdump < 0) 343 break; 344 addr = EHCI_CAP_GET_NEXT(cap); 345 } 346 } 347 #endif 348 349 static void 350 ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 351 { 352 const char *devname = device_xname(sc->sc_dev); 353 uint32_t cparams, addr, cap; 354 pcireg_t legsup; 355 int maxcap = 10; 356 357 cparams = EREAD4(sc, EHCI_HCCPARAMS); 358 addr = EHCI_HCC_EECP(cparams); 359 while (addr != 0) { 360 cap = pci_conf_read(pc, tag, addr); 361 if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY) 362 goto next; 363 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 364 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 365 legsup & ~EHCI_LEG_HC_OS_OWNED); 366 367 next: 368 if (--maxcap < 0) { 369 aprint_normal("%s: broken extended capabilities " 370 "ignored\n", devname); 371 return; 372 } 373 addr = EHCI_CAP_GET_NEXT(cap); 374 } 375 } 376 377 static void 378 ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 379 { 380 const char *devname = device_xname(sc->sc_dev); 381 uint32_t cparams, addr, cap; 382 pcireg_t legsup; 383 int maxcap = 10; 384 int ms; 385 386 #ifdef EHCI_DEBUG 387 if (ehcidebug) 388 ehci_dump_caps(sc, pc, tag); 389 #endif 390 cparams = EREAD4(sc, EHCI_HCCPARAMS); 391 addr = EHCI_HCC_EECP(cparams); 392 while (addr != 0) { 393 cap = pci_conf_read(pc, tag, addr); 394 if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY) 395 goto next; 396 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 397 if (legsup & EHCI_LEG_HC_BIOS_OWNED) { 398 /* Ask BIOS to give up ownership */ 399 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 400 legsup | EHCI_LEG_HC_OS_OWNED); 401 for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) { 402 legsup = pci_conf_read(pc, tag, 403 addr + PCI_EHCI_USBLEGSUP); 404 if (!(legsup & EHCI_LEG_HC_BIOS_OWNED)) 405 break; 406 delay(10000); 407 } 408 if (ms == EHCI_MAX_BIOS_WAIT) { 409 aprint_normal("%s: BIOS refuses to give up " 410 "ownership, using force\n", devname); 411 pci_conf_write(pc, tag, 412 addr + PCI_EHCI_USBLEGSUP, 0); 413 } else 414 aprint_verbose("%s: BIOS has given up " 415 "ownership\n", devname); 416 } 417 418 /* Disable SMIs */ 419 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0); 420 421 next: 422 if (--maxcap < 0) { 423 aprint_normal("%s: broken extended capabilities " 424 "ignored\n", devname); 425 return; 426 } 427 addr = EHCI_CAP_GET_NEXT(cap); 428 } 429 430 } 431 432 static bool 433 ehci_pci_suspend(device_t dv, const pmf_qual_t *qual) 434 { 435 struct ehci_pci_softc *sc = device_private(dv); 436 437 ehci_suspend(dv, qual); 438 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 439 440 return true; 441 } 442 443 static bool 444 ehci_pci_resume(device_t dv, const pmf_qual_t *qual) 445 { 446 struct ehci_pci_softc *sc = device_private(dv); 447 448 ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 449 return ehci_resume(dv, qual); 450 } 451 452 static int 453 ehci_sb700_match(const struct pci_attach_args *pa) 454 { 455 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI && 456 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATI_SB600_SMB)) 457 return 0; 458 459 switch (PCI_REVISION(pa->pa_class)) { 460 case 0x3a: 461 case 0x3b: 462 return 1; 463 } 464 465 return 0; 466 } 467 468 static int 469 ehci_apply_amd_quirks(struct ehci_pci_softc *sc) 470 { 471 pcireg_t value; 472 473 aprint_normal_dev(sc->sc.sc_dev, 474 "applying AMD SB600/SB700 USB freeze workaround\n"); 475 value = pci_conf_read(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG); 476 pci_conf_write(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG, 477 value | EHCI_SBx00_WORKAROUND_ENABLE); 478 479 return 0; 480 } 481 482 enum ehci_pci_quirk_flags 483 ehci_pci_lookup_quirkdata(pci_vendor_id_t vendor, pci_product_id_t product) 484 { 485 int i; 486 487 for (i = 0; i < __arraycount(ehci_pci_quirks); i++) { 488 if (vendor == ehci_pci_quirks[i].vendor && 489 product == ehci_pci_quirks[i].product) 490 return ehci_pci_quirks[i].quirks; 491 } 492 return 0; 493 } 494 495
Indexes created Sat Oct 11 14:09:46 GMT 2025