ehci_pci.c revision 1.58.4.2
1 /* $NetBSD: ehci_pci.c,v 1.58.4.2 2017/07/08 16:34:35 snj Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ehci_pci.c,v 1.58.4.2 2017/07/08 16:34:35 snj Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/device.h> 39 #include <sys/proc.h> 40 #include <sys/queue.h> 41 42 #include <sys/bus.h> 43 44 #include <dev/pci/pcidevs.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/usb_pci.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 #include <dev/usb/usbdivar.h> 51 #include <dev/usb/usb_mem.h> 52 53 #include <dev/usb/ehcireg.h> 54 #include <dev/usb/ehcivar.h> 55 56 #ifdef EHCI_DEBUG 57 #define DPRINTF(x) if (ehcidebug) printf x 58 extern int ehcidebug; 59 #else 60 #define DPRINTF(x) 61 #endif 62 63 enum ehci_pci_quirk_flags { 64 EHCI_PCI_QUIRK_AMD_SB600 = 0x1, /* always need a quirk */ 65 EHCI_PCI_QUIRK_AMD_SB700 = 0x2, /* depends on the SMB revision */ 66 }; 67 68 static const struct pci_quirkdata ehci_pci_quirks[] = { 69 { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_EHCI, 70 EHCI_PCI_QUIRK_AMD_SB600 }, 71 { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_EHCI, 72 EHCI_PCI_QUIRK_AMD_SB700 }, 73 }; 74 75 static void ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 76 pcitag_t tag); 77 static void ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, 78 pcitag_t tag); 79 static bool ehci_pci_suspend(device_t, const pmf_qual_t *); 80 static bool ehci_pci_resume(device_t, const pmf_qual_t *); 81 82 struct ehci_pci_softc { 83 ehci_softc_t sc; 84 pci_chipset_tag_t sc_pc; 85 pcitag_t sc_tag; 86 void *sc_ih; /* interrupt vectoring */ 87 }; 88 89 static int ehci_sb700_match(const struct pci_attach_args *pa); 90 static int ehci_apply_amd_quirks(struct ehci_pci_softc *sc); 91 enum ehci_pci_quirk_flags ehci_pci_lookup_quirkdata(pci_vendor_id_t, 92 pci_product_id_t); 93 94 #define EHCI_MAX_BIOS_WAIT 100 /* ms*10 */ 95 #define EHCI_SBx00_WORKAROUND_REG 0x50 96 #define EHCI_SBx00_WORKAROUND_ENABLE __BIT(27) 97 98 99 static int 100 ehci_pci_match(device_t parent, cfdata_t match, void *aux) 101 { 102 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 103 104 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 105 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 106 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI) 107 return 1; 108 109 return 0; 110 } 111 112 static void 113 ehci_pci_attach(device_t parent, device_t self, void *aux) 114 { 115 struct ehci_pci_softc *sc = device_private(self); 116 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 117 pci_chipset_tag_t pc = pa->pa_pc; 118 pcitag_t tag = pa->pa_tag; 119 char const *intrstr; 120 pci_intr_handle_t ih; 121 pcireg_t csr; 122 const char *vendor; 123 usbd_status r; 124 int ncomp; 125 struct usb_pci *up; 126 int quirk; 127 char intrbuf[PCI_INTRSTR_LEN]; 128 129 sc->sc.sc_dev = self; 130 sc->sc.sc_bus.ub_hcpriv = sc; 131 132 pci_aprint_devinfo(pa, "USB controller"); 133 134 /* Check for quirks */ 135 quirk = ehci_pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id), 136 PCI_PRODUCT(pa->pa_id)); 137 138 /* Map I/O registers */ 139 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 140 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 141 sc->sc.sc_size = 0; 142 aprint_error_dev(self, "can't map memory space\n"); 143 return; 144 } 145 146 /* Disable interrupts, so we don't get any spurious ones. */ 147 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 148 DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs)); 149 EOWRITE4(&sc->sc, EHCI_USBINTR, 0); 150 151 sc->sc_pc = pc; 152 sc->sc_tag = tag; 153 sc->sc.sc_bus.ub_dmatag = pa->pa_dmat; 154 155 /* Handle quirks */ 156 switch (quirk) { 157 case EHCI_PCI_QUIRK_AMD_SB600: 158 ehci_apply_amd_quirks(sc); 159 break; 160 case EHCI_PCI_QUIRK_AMD_SB700: 161 if (pci_find_device(NULL, ehci_sb700_match)) 162 ehci_apply_amd_quirks(sc); 163 break; 164 } 165 166 pcireg_t intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 167 int pin = PCI_INTERRUPT_PIN(intr); 168 169 /* Enable the device. */ 170 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 171 csr |= PCI_COMMAND_MASTER_ENABLE; 172 csr &= ~(pin ? PCI_COMMAND_INTERRUPT_DISABLE : 0); 173 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 174 175 /* Map and establish the interrupt. */ 176 if (pci_intr_map(pa, &ih)) { 177 aprint_error_dev(self, "couldn't map interrupt\n"); 178 goto fail; 179 } 180 181 /* 182 * Allocate IRQ 183 */ 184 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 185 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc); 186 if (sc->sc_ih == NULL) { 187 aprint_error_dev(self, "couldn't establish interrupt"); 188 if (intrstr != NULL) 189 aprint_error(" at %s", intrstr); 190 aprint_error("\n"); 191 return; 192 } 193 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 194 195 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 196 case PCI_USBREV_PRE_1_0: 197 case PCI_USBREV_1_0: 198 case PCI_USBREV_1_1: 199 sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; 200 aprint_verbose_dev(self, "pre-2.0 USB rev\n"); 201 return; 202 case PCI_USBREV_2_0: 203 sc->sc.sc_bus.ub_revision = USBREV_2_0; 204 break; 205 default: 206 sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; 207 break; 208 } 209 210 /* Figure out vendor for root hub descriptor. */ 211 vendor = pci_findvendor(pa->pa_id); 212 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 213 if (vendor) 214 strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor)); 215 else 216 snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), 217 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 218 219 /* Enable workaround for dropped interrupts as required */ 220 switch (sc->sc.sc_id_vendor) { 221 case PCI_VENDOR_ATI: 222 case PCI_VENDOR_VIATECH: 223 sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND; 224 aprint_normal_dev(self, "dropped intr workaround enabled\n"); 225 break; 226 default: 227 break; 228 } 229 230 /* 231 * Find companion controllers. According to the spec they always 232 * have lower function numbers so they should be enumerated already. 233 */ 234 const u_int maxncomp = EHCI_HCS_N_CC(EREAD4(&sc->sc, EHCI_HCSPARAMS)); 235 KASSERT(maxncomp <= EHCI_COMPANION_MAX); 236 ncomp = 0; 237 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 238 if (up->bus == pa->pa_bus && up->device == pa->pa_device 239 && !up->claimed) { 240 DPRINTF(("ehci_pci_attach: companion %s\n", 241 device_xname(up->usb))); 242 sc->sc.sc_comps[ncomp++] = up->usb; 243 up->claimed = true; 244 if (ncomp == maxncomp) 245 break; 246 } 247 } 248 sc->sc.sc_ncomp = ncomp; 249 250 ehci_get_ownership(&sc->sc, pc, tag); 251 252 r = ehci_init(&sc->sc); 253 if (r != USBD_NORMAL_COMPLETION) { 254 aprint_error_dev(self, "init failed, error=%d\n", r); 255 goto fail; 256 } 257 258 if (!pmf_device_register1(self, ehci_pci_suspend, ehci_pci_resume, 259 ehci_shutdown)) 260 aprint_error_dev(self, "couldn't establish power handler\n"); 261 262 /* Attach usb device. */ 263 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 264 return; 265 266 fail: 267 if (sc->sc_ih) { 268 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 269 sc->sc_ih = NULL; 270 } 271 if (sc->sc.sc_size) { 272 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 273 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 274 sc->sc.sc_size = 0; 275 } 276 return; 277 } 278 279 static int 280 ehci_pci_detach(device_t self, int flags) 281 { 282 struct ehci_pci_softc *sc = device_private(self); 283 int rv; 284 285 rv = ehci_detach(&sc->sc, flags); 286 if (rv) 287 return rv; 288 289 pmf_device_deregister(self); 290 ehci_shutdown(self, flags); 291 292 /* disable interrupts */ 293 EOWRITE4(&sc->sc, EHCI_USBINTR, 0); 294 /* XXX grotty hack to flush the write */ 295 (void)EOREAD4(&sc->sc, EHCI_USBINTR); 296 297 if (sc->sc_ih != NULL) { 298 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 299 sc->sc_ih = NULL; 300 } 301 if (sc->sc.sc_size) { 302 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 303 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 304 sc->sc.sc_size = 0; 305 } 306 307 #if 1 308 /* XXX created in ehci.c */ 309 mutex_destroy(&sc->sc.sc_lock); 310 mutex_destroy(&sc->sc.sc_intr_lock); 311 312 softint_disestablish(sc->sc.sc_doorbell_si); 313 softint_disestablish(sc->sc.sc_pcd_si); 314 #endif 315 316 return 0; 317 } 318 319 CFATTACH_DECL3_NEW(ehci_pci, sizeof(struct ehci_pci_softc), 320 ehci_pci_match, ehci_pci_attach, ehci_pci_detach, ehci_activate, NULL, 321 ehci_childdet, DVF_DETACH_SHUTDOWN); 322 323 #ifdef EHCI_DEBUG 324 static void 325 ehci_dump_caps(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 326 { 327 uint32_t cparams, legctlsts, addr, cap, id; 328 int maxdump = 10; 329 330 cparams = EREAD4(sc, EHCI_HCCPARAMS); 331 addr = EHCI_HCC_EECP(cparams); 332 while (addr != 0) { 333 cap = pci_conf_read(pc, tag, addr); 334 id = EHCI_CAP_GET_ID(cap); 335 switch (id) { 336 case EHCI_CAP_ID_LEGACY: 337 legctlsts = pci_conf_read(pc, tag, 338 addr + PCI_EHCI_USBLEGCTLSTS); 339 printf("ehci_dump_caps: legsup=0x%08x " 340 "legctlsts=0x%08x\n", cap, legctlsts); 341 break; 342 default: 343 printf("ehci_dump_caps: cap=0x%08x\n", cap); 344 break; 345 } 346 if (--maxdump < 0) 347 break; 348 addr = EHCI_CAP_GET_NEXT(cap); 349 } 350 } 351 #endif 352 353 static void 354 ehci_release_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 355 { 356 const char *devname = device_xname(sc->sc_dev); 357 uint32_t cparams, addr, cap; 358 pcireg_t legsup; 359 int maxcap = 10; 360 361 cparams = EREAD4(sc, EHCI_HCCPARAMS); 362 addr = EHCI_HCC_EECP(cparams); 363 while (addr != 0) { 364 cap = pci_conf_read(pc, tag, addr); 365 if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY) 366 goto next; 367 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 368 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 369 legsup & ~EHCI_LEG_HC_OS_OWNED); 370 371 next: 372 if (--maxcap < 0) { 373 aprint_normal("%s: broken extended capabilities " 374 "ignored\n", devname); 375 return; 376 } 377 addr = EHCI_CAP_GET_NEXT(cap); 378 } 379 } 380 381 static void 382 ehci_get_ownership(ehci_softc_t *sc, pci_chipset_tag_t pc, pcitag_t tag) 383 { 384 const char *devname = device_xname(sc->sc_dev); 385 uint32_t cparams, addr, cap; 386 pcireg_t legsup; 387 int maxcap = 10; 388 int ms; 389 390 #ifdef EHCI_DEBUG 391 if (ehcidebug) 392 ehci_dump_caps(sc, pc, tag); 393 #endif 394 cparams = EREAD4(sc, EHCI_HCCPARAMS); 395 addr = EHCI_HCC_EECP(cparams); 396 while (addr != 0) { 397 cap = pci_conf_read(pc, tag, addr); 398 if (EHCI_CAP_GET_ID(cap) != EHCI_CAP_ID_LEGACY) 399 goto next; 400 legsup = pci_conf_read(pc, tag, addr + PCI_EHCI_USBLEGSUP); 401 if (legsup & EHCI_LEG_HC_BIOS_OWNED) { 402 /* Ask BIOS to give up ownership */ 403 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGSUP, 404 legsup | EHCI_LEG_HC_OS_OWNED); 405 for (ms = 0; ms < EHCI_MAX_BIOS_WAIT; ms++) { 406 legsup = pci_conf_read(pc, tag, 407 addr + PCI_EHCI_USBLEGSUP); 408 if (!(legsup & EHCI_LEG_HC_BIOS_OWNED)) 409 break; 410 delay(10000); 411 } 412 if (ms == EHCI_MAX_BIOS_WAIT) { 413 aprint_normal("%s: BIOS refuses to give up " 414 "ownership, using force\n", devname); 415 pci_conf_write(pc, tag, 416 addr + PCI_EHCI_USBLEGSUP, 0); 417 } else 418 aprint_verbose("%s: BIOS has given up " 419 "ownership\n", devname); 420 } 421 422 /* Disable SMIs */ 423 pci_conf_write(pc, tag, addr + PCI_EHCI_USBLEGCTLSTS, 0); 424 425 next: 426 if (--maxcap < 0) { 427 aprint_normal("%s: broken extended capabilities " 428 "ignored\n", devname); 429 return; 430 } 431 addr = EHCI_CAP_GET_NEXT(cap); 432 } 433 434 } 435 436 static bool 437 ehci_pci_suspend(device_t dv, const pmf_qual_t *qual) 438 { 439 struct ehci_pci_softc *sc = device_private(dv); 440 441 ehci_suspend(dv, qual); 442 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 443 444 return true; 445 } 446 447 static bool 448 ehci_pci_resume(device_t dv, const pmf_qual_t *qual) 449 { 450 struct ehci_pci_softc *sc = device_private(dv); 451 452 ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 453 return ehci_resume(dv, qual); 454 } 455 456 static int 457 ehci_sb700_match(const struct pci_attach_args *pa) 458 { 459 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI && 460 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATI_SB600_SMB)) 461 return 0; 462 463 switch (PCI_REVISION(pa->pa_class)) { 464 case 0x3a: 465 case 0x3b: 466 return 1; 467 } 468 469 return 0; 470 } 471 472 static int 473 ehci_apply_amd_quirks(struct ehci_pci_softc *sc) 474 { 475 pcireg_t value; 476 477 aprint_normal_dev(sc->sc.sc_dev, 478 "applying AMD SB600/SB700 USB freeze workaround\n"); 479 value = pci_conf_read(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG); 480 pci_conf_write(sc->sc_pc, sc->sc_tag, EHCI_SBx00_WORKAROUND_REG, 481 value | EHCI_SBx00_WORKAROUND_ENABLE); 482 483 return 0; 484 } 485 486 enum ehci_pci_quirk_flags 487 ehci_pci_lookup_quirkdata(pci_vendor_id_t vendor, pci_product_id_t product) 488 { 489 int i; 490 491 for (i = 0; i < __arraycount(ehci_pci_quirks); i++) { 492 if (vendor == ehci_pci_quirks[i].vendor && 493 product == ehci_pci_quirks[i].product) 494 return ehci_pci_quirks[i].quirks; 495 } 496 return 0; 497 } 498 499
Indexes created Sat Oct 11 14:09:46 GMT 2025