emuxkivar.h revision 1.10
1 /* $NetBSD: emuxkivar.h,v 1.10 2007/03/04 06:02:18 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Yannick Montulet. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _DEV_PCI_EMU10K1VAR_H_ 40 #define _DEV_PCI_EMU10K1VAR_H_ 41 42 #define EMU_PCI_CBIO 0x10 43 #define EMU_SUBSYS_APS 0x40011102 44 45 /* 46 * DMA memory management 47 */ 48 49 struct dmamem { 50 bus_dma_tag_t dmat; 51 bus_size_t size; 52 bus_size_t align; 53 bus_size_t bound; 54 bus_dma_segment_t *segs; 55 int nsegs; 56 int rsegs; 57 void * kaddr; 58 bus_dmamap_t map; 59 }; 60 61 #define KERNADDR(ptr) ((void *)((ptr)->kaddr)) 62 #define DMASEGADDR(ptr, segno) ((ptr)->segs[segno].ds_addr) 63 #define DMAADDR(ptr) DMASEGADDR(ptr, 0) 64 #define DMASIZE(ptr) ((ptr)->size) 65 66 /* 67 * Emu10k1 hardware limits 68 */ 69 70 #define EMU_PTESIZE 4096 71 #define EMU_MAXPTE ((EMU_CHAN_PSST_LOOPSTARTADDR_MASK + 1) / \ 72 EMU_PTESIZE) 73 #define EMU_NUMCHAN 64 74 #define EMU_NUMRECSRCS 3 75 76 #define EMU_DMA_ALIGN 4096 77 #define EMU_DMAMEM_NSEG 1 78 79 /* 80 * Emu10k1 memory management 81 */ 82 83 struct emuxki_mem { 84 LIST_ENTRY(emuxki_mem) next; 85 struct dmamem *dmamem; 86 uint16_t ptbidx; 87 #define EMU_RMEM 0xFFFF /* recording memory */ 88 }; 89 90 /* 91 * Emu10k1 play channel params 92 */ 93 94 struct emuxki_chanparms_fxsend { 95 struct { 96 uint8_t level, dest; 97 } a, b, c, d, e, f, g, h; 98 }; 99 100 struct emuxki_chanparms_pitch { 101 uint16_t initial;/* 4 bits of octave, 12 bits of fractional 102 * octave */ 103 uint16_t current;/* 0x4000 == unity pitch shift */ 104 uint16_t target; /* 0x4000 == unity pitch shift */ 105 uint8_t envelope_amount; /* Signed 2's complement, +/- 106 * one octave peak extremes */ 107 }; 108 109 struct emuxki_chanparms_envelope { 110 uint16_t current_state; /* 0x8000-n == 666*n usec delay */ 111 uint8_t hold_time; /* 127-n == n*(volume ? 88.2 : 112 * 42)msec */ 113 uint8_t attack_time; /* 0 = infinite, 1 = (volume ? 11 : 114 * 10.9) msec, 0x7f = 5.5msec */ 115 uint8_t sustain_level; /* 127 = full, 0 = off, 0.75dB 116 * increments */ 117 uint8_t decay_time; /* 0 = 43.7msec, 1 = 21.8msec, 0x7f = 118 * 22msec */ 119 }; 120 121 struct emuxki_chanparms_volume { 122 uint16_t current, target; 123 struct emuxki_chanparms_envelope envelope; 124 }; 125 126 struct emuxki_chanparms_filter { 127 uint16_t initial_cutoff_frequency; 128 /* 129 * 6 most significant bits are semitones, 2 least significant bits 130 * are fractions 131 */ 132 uint16_t current_cutoff_frequency; 133 uint16_t target_cutoff_frequency; 134 uint8_t lowpass_resonance_height; 135 uint8_t interpolation_ROM; /* 1 = full band, 7 = low 136 * pass */ 137 uint8_t envelope_amount; /* Signed 2's complement, +/- 138 * six octaves peak extremes */ 139 uint8_t LFO_modulation_depth; /* Signed 2's complement, +/- 140 * three octave extremes */ 141 }; 142 143 struct emuxki_chanparms_loop { 144 uint32_t start; /* index in the PTB (in samples) */ 145 uint32_t end; /* index in the PTB (in samples) */ 146 }; 147 148 struct emuxki_chanparms_modulation { 149 struct emuxki_chanparms_envelope envelope; 150 uint16_t LFO_state; /* 0x8000-n = 666*n usec delay */ 151 }; 152 153 struct emuxki_chanparms_vibrato_LFO { 154 uint16_t state; /* 0x8000-n == 666*n usec delay */ 155 uint8_t modulation_depth; /* Signed 2's complement, +/- 156 * one octave extremes */ 157 uint8_t vibrato_depth; /* Signed 2's complement, +/- one 158 * octave extremes */ 159 uint8_t frequency; /* 0.039Hz steps, maximum of 9.85 Hz */ 160 }; 161 162 struct emuxki_channel { 163 uint8_t num; /* voice number */ 164 struct emuxki_voice *voice; 165 struct emuxki_chanparms_fxsend fxsend; 166 struct emuxki_chanparms_pitch pitch; 167 uint16_t initial_attenuation; /* 0.375dB steps */ 168 struct emuxki_chanparms_volume volume; 169 struct emuxki_chanparms_filter filter; 170 struct emuxki_chanparms_loop loop; 171 struct emuxki_chanparms_modulation modulation; 172 struct emuxki_chanparms_vibrato_LFO vibrato_LFO; 173 uint8_t tremolo_depth; 174 }; 175 176 /* 177 * Voices, streams 178 */ 179 180 typedef enum { 181 EMU_RECSRC_MIC = 0, 182 EMU_RECSRC_ADC, 183 EMU_RECSRC_FX, 184 EMU_RECSRC_NOTSET 185 } emuxki_recsrc_t; 186 187 struct emuxki_voice { 188 struct emuxki_softc *sc; /* our softc */ 189 190 uint8_t use; 191 #define EMU_VOICE_USE_PLAY (1 << 0) 192 uint8_t state; 193 #define EMU_VOICE_STATE_STARTED (1 << 0) 194 uint8_t stereo; 195 #define EMU_VOICE_STEREO_NOTSET 0xFF 196 uint8_t b16; 197 uint32_t sample_rate; 198 union { 199 struct emuxki_channel *chan[2]; 200 emuxki_recsrc_t source; 201 } dataloc; 202 struct emuxki_mem *buffer; 203 uint16_t blksize;/* in samples */ 204 uint16_t trigblk;/* blk on which to trigger inth */ 205 uint16_t blkmod; /* Modulo value to wrap trigblk */ 206 uint16_t timerate; 207 void (*inth)(void *); 208 void *inthparam; 209 LIST_ENTRY(emuxki_voice) next; 210 }; 211 212 #if 0 /* Not yet */ 213 /* 214 * I intend this to be able to manage things like AC-3 215 */ 216 struct emuxki_stream { 217 struct emu10k1 *emu; 218 uint8_t nmono; 219 uint8_t nstereo; 220 struct emuxki_voice *mono; 221 struct emuxki_voice *stereo; 222 LIST_ENTRY(emuxki_stream) next; 223 }; 224 #endif /* Not yet */ 225 226 struct emuxki_softc { 227 struct device sc_dev; 228 audio_device_t sc_audv; 229 enum { 230 EMUXKI_SBLIVE = 0x00, EMUXKI_AUDIGY = 0x01, 231 EMUXKI_AUDIGY2 = 0x02, EMUXKI_LIVE_5_1 = 0x04, 232 EMUXKI_APS = 0x08 233 } sc_type; 234 235 /* Autoconfig parameters */ 236 bus_space_tag_t sc_iot; 237 bus_space_handle_t sc_ioh; 238 bus_addr_t sc_iob; 239 bus_size_t sc_ios; 240 pci_chipset_tag_t sc_pc; /* PCI tag */ 241 bus_dma_tag_t sc_dmat; 242 void *sc_ih; /* interrupt handler */ 243 244 /* EMU10K1 device structures */ 245 LIST_HEAD(, emuxki_mem) mem; 246 247 struct dmamem *ptb; 248 struct dmamem *silentpage; 249 250 struct emuxki_channel *channel[EMU_NUMCHAN]; 251 struct emuxki_voice *recsrc[EMU_NUMRECSRCS]; 252 253 LIST_HEAD(, emuxki_voice) voices; 254 /* LIST_HEAD(, emuxki_stream) streams; */ 255 256 uint8_t timerstate; 257 #define EMU_TIMER_STATE_ENABLED 1 258 259 struct ac97_host_if hostif; 260 struct ac97_codec_if *codecif; 261 struct device *sc_audev; 262 263 struct emuxki_voice *pvoice, *rvoice, *lvoice; 264 }; 265 266 #endif /* !_DEV_PCI_EMU10K1VAR_H_ */ 267
Indexes created Fri Sep 26 08:10:20 GMT 2025