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      1  1.11    andvar /* $NetBSD: esareg.h,v 1.11 2023/05/13 11:30:27 andvar Exp $ */
      2   1.1  augustss 
      3   1.1  augustss /*
      4   1.1  augustss  * Copyright (c) 2002 Lennart Augustsson
      5   1.1  augustss  * All rights reserved.
      6   1.1  augustss  *
      7   1.1  augustss  * Redistribution and use in source and binary forms, with or without
      8   1.1  augustss  * modification, are permitted provided that the following conditions
      9   1.1  augustss  * are met:
     10   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     11   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     12   1.2  augustss  * 2. The name of the author may not be used to endorse or promote products
     13   1.1  augustss  *    derived from this software without specific prior written permission.
     14   1.1  augustss  *
     15   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16   1.1  augustss  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17   1.1  augustss  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18   1.1  augustss  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19   1.1  augustss  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     20   1.1  augustss  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     21   1.1  augustss  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     22   1.1  augustss  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     23   1.1  augustss  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24   1.1  augustss  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25   1.1  augustss  * SUCH DAMAGE.
     26   1.1  augustss  */
     27   1.1  augustss 
     28   1.1  augustss /*
     29   1.1  augustss  * ESS Allegro-1 / Maestro3 Audio Driver
     30   1.9      kent  *
     31   1.1  augustss  * Lots of magic based on the FreeBSD maestro3 driver and
     32   1.1  augustss  * reverse engineering.
     33   1.3  augustss  * Original driver by Don Kim.
     34   1.1  augustss  *
     35   1.1  augustss  */
     36   1.1  augustss 
     37   1.1  augustss /* Allegro PCI configuration registers */
     38   1.9      kent #define PCI_LEGACY_AUDIO_CTRL	0x40
     39   1.9      kent #define DISABLE_LEGACY		0x00008000
     40   1.4     pooka 
     41   1.9      kent #define ESA_PCI_ALLEGRO_CONFIG	    0x50
     42   1.9      kent #define ESA_SB_ADDR_240		    0x00000004
     43   1.9      kent #define ESA_MPU_ADDR_MASK	    0x00000018
     44   1.9      kent #define ESA_MPU_ADDR_330	    0x00000000
     45   1.9      kent #define ESA_MPU_ADDR_300	    0x00000008
     46   1.9      kent #define ESA_MPU_ADDR_320	    0x00000010
     47   1.9      kent #define ESA_MPU_ADDR_340	    0x00000018
     48   1.9      kent #define ESA_USE_PCI_TIMING	    0x00000040
     49   1.9      kent #define ESA_POSTED_WRITE_ENABLE	    0x00000080
     50   1.9      kent #define ESA_DMA_POLICY_MASK	    0x00000700
     51   1.9      kent #define ESA_DMA_DDMA		    0x00000000
     52   1.9      kent #define ESA_DMA_TDMA		    0x00000100
     53   1.9      kent #define ESA_DMA_PCPCI		    0x00000200
     54   1.9      kent #define ESA_DMA_WBDMA16		    0x00000400
     55   1.9      kent #define ESA_DMA_WBDMA4		    0x00000500
     56   1.9      kent #define ESA_DMA_WBDMA2		    0x00000600
     57   1.9      kent #define ESA_DMA_WBDMA1		    0x00000700
     58   1.9      kent #define ESA_DMA_SAFE_GUARD	    0x00000800
     59   1.9      kent #define ESA_HI_PERF_GP_ENABLE	    0x00001000
     60   1.9      kent #define ESA_PIC_SNOOP_MODE_0	    0x00002000
     61   1.9      kent #define ESA_PIC_SNOOP_MODE_1	    0x00004000
     62   1.1  augustss #define ESA_SOUNDBLASTER_IRQ_MASK   0x00008000
     63   1.9      kent #define ESA_RING_IN_ENABLE	    0x00010000
     64   1.9      kent #define ESA_SPDIF_TEST_MODE	    0x00020000
     65   1.1  augustss #define ESA_CLK_MULT_MODE_SELECT_2  0x00040000
     66   1.9      kent #define ESA_EEPROM_WRITE_ENABLE	    0x00080000
     67   1.9      kent #define ESA_CODEC_DIR_IN	    0x00100000
     68   1.9      kent #define ESA_HV_BUTTON_FROM_GD	    0x00200000
     69   1.9      kent #define ESA_REDUCED_DEBOUNCE	    0x00400000
     70   1.9      kent #define ESA_HV_CTRL_ENABLE	    0x00800000
     71   1.9      kent #define ESA_SPDIF_ENABLE	    0x01000000
     72   1.9      kent #define ESA_CLK_DIV_SELECT	    0x06000000
     73   1.9      kent #define ESA_CLK_DIV_BY_48	    0x00000000
     74   1.9      kent #define ESA_CLK_DIV_BY_49	    0x02000000
     75   1.9      kent #define ESA_CLK_DIV_BY_50	    0x04000000
     76   1.9      kent #define ESA_CLK_DIV_RESERVED	    0x06000000
     77   1.9      kent #define ESA_PM_CTRL_ENABLE	    0x08000000
     78   1.1  augustss #define ESA_CLK_MULT_MODE_SELECT    0x30000000
     79   1.9      kent #define ESA_CLK_MULT_MODE_SHIFT	    28
     80   1.9      kent #define ESA_CLK_MULT_MODE_0	    0x00000000
     81   1.9      kent #define ESA_CLK_MULT_MODE_1	    0x10000000
     82   1.9      kent #define ESA_CLK_MULT_MODE_2	    0x20000000
     83   1.9      kent #define ESA_CLK_MULT_MODE_3	    0x30000000
     84   1.9      kent #define ESA_INT_CLK_SELECT	    0x40000000
     85   1.9      kent #define ESA_INT_CLK_MULT_RESET	    0x80000000
     86   1.1  augustss 
     87   1.1  augustss /* M3 */
     88   1.9      kent #define ESA_INT_CLK_SRC_NOT_PCI	    0x00100000
     89   1.9      kent #define ESA_INT_CLK_MULT_ENABLE	    0x80000000
     90   1.1  augustss 
     91   1.9      kent #define ESA_PCI_ACPI_CONTROL	    0x54
     92   1.9      kent #define ESA_PCI_ACPI_D0		    0x00000000
     93   1.9      kent #define ESA_PCI_ACPI_D1		    0xB4F70000
     94   1.9      kent #define ESA_PCI_ACPI_D2		    0xB4F7B4F7
     95   1.1  augustss 
     96   1.9      kent #define ESA_PCI_USER_CONFIG	    0x58
     97   1.1  augustss #define ESA_EXT_PCI_MASTER_ENABLE   0x00000001
     98   1.9      kent #define ESA_SPDIF_OUT_SELECT	    0x00000002
     99   1.9      kent #define ESA_TEST_PIN_DIR_CTRL	    0x00000004
    100   1.9      kent #define ESA_AC97_CODEC_TEST	    0x00000020
    101   1.9      kent #define ESA_TRI_STATE_BUFFER	    0x00000080
    102   1.9      kent #define ESA_IN_CLK_12MHZ_SELECT	    0x00000100
    103   1.9      kent #define ESA_MULTI_FUNC_DISABLE	    0x00000200
    104   1.9      kent #define ESA_EXT_MASTER_PAIR_SEL	    0x00000400
    105   1.9      kent #define ESA_PCI_MASTER_SUPPORT	    0x00000800
    106   1.9      kent #define ESA_STOP_CLOCK_ENABLE	    0x00001000
    107   1.9      kent #define ESA_EAPD_DRIVE_ENABLE	    0x00002000
    108   1.1  augustss #define ESA_REQ_TRI_STATE_ENABLE    0x00004000
    109   1.9      kent #define ESA_REQ_LOW_ENABLE	    0x00008000
    110   1.9      kent #define ESA_MIDI_1_ENABLE	    0x00010000
    111   1.9      kent #define ESA_MIDI_2_ENABLE	    0x00020000
    112   1.9      kent #define ESA_SB_AUDIO_SYNC	    0x00040000
    113   1.9      kent #define ESA_HV_CTRL_TEST	    0x00100000
    114   1.9      kent #define ESA_SOUNDBLASTER_TEST	    0x00400000
    115   1.1  augustss 
    116   1.9      kent #define ESA_PCI_USER_CONFIG_C	    0x5C
    117   1.1  augustss 
    118   1.9      kent #define ESA_PCI_DDMA_CTRL	    0x60
    119   1.9      kent #define ESA_DDMA_ENABLE		    0x00000001
    120   1.1  augustss 
    121   1.1  augustss 
    122   1.1  augustss /* Allegro registers */
    123   1.9      kent #define ESA_HOST_INT_CTRL	    0x18
    124   1.9      kent #define ESA_SB_INT_ENABLE	    0x0001
    125   1.9      kent #define ESA_MPU401_INT_ENABLE	    0x0002
    126   1.9      kent #define ESA_ASSP_INT_ENABLE	    0x0010
    127   1.9      kent #define ESA_RING_INT_ENABLE	    0x0020
    128   1.9      kent #define ESA_HV_INT_ENABLE	    0x0040
    129   1.9      kent #define ESA_CLKRUN_GEN_ENABLE	    0x0100
    130   1.9      kent #define ESA_HV_CTRL_TO_PME	    0x0400
    131   1.1  augustss #define ESA_SOFTWARE_RESET_ENABLE   0x8000
    132   1.1  augustss 
    133   1.1  augustss /*
    134   1.1  augustss  * should be using the above defines, probably.
    135   1.1  augustss  */
    136   1.9      kent #define ESA_REGB_ENABLE_RESET	    0x01
    137   1.9      kent #define ESA_REGB_STOP_CLOCK	    0x10
    138   1.1  augustss 
    139   1.9      kent #define ESA_HOST_INT_STATUS	    0x1A
    140   1.9      kent #define ESA_SB_INT_PENDING	    0x01
    141   1.9      kent #define ESA_MPU401_INT_PENDING	    0x02
    142   1.9      kent #define ESA_ASSP_INT_PENDING	    0x10
    143   1.9      kent #define ESA_RING_INT_PENDING	    0x20
    144   1.9      kent #define ESA_HV_INT_PENDING	    0x40
    145   1.1  augustss 
    146   1.9      kent #define ESA_HARDWARE_VOL_CTRL	    0x1B
    147   1.1  augustss #define ESA_SHADOW_MIX_REG_VOICE    0x1C
    148   1.1  augustss #define ESA_HW_VOL_COUNTER_VOICE    0x1D
    149   1.1  augustss #define ESA_SHADOW_MIX_REG_MASTER   0x1E
    150   1.1  augustss #define ESA_HW_VOL_COUNTER_MASTER   0x1F
    151   1.1  augustss 
    152   1.9      kent #define ESA_CODEC_COMMAND	    0x30
    153   1.9      kent #define ESA_CODEC_READ_B	    0x80
    154   1.1  augustss 
    155   1.9      kent #define ESA_CODEC_STATUS	    0x30
    156   1.9      kent #define ESA_CODEC_BUSY_B	    0x01
    157   1.1  augustss 
    158   1.9      kent #define ESA_CODEC_DATA		    0x32
    159   1.1  augustss 
    160   1.9      kent #define ESA_RING_BUS_CTRL_A	    0x36
    161   1.9      kent #define ESA_RAC_PME_ENABLE	    0x0100
    162   1.9      kent #define ESA_RAC_SDFS_ENABLE	    0x0200
    163   1.9      kent #define ESA_LAC_PME_ENABLE	    0x0400
    164   1.9      kent #define ESA_LAC_SDFS_ENABLE	    0x0800
    165   1.1  augustss #define ESA_SERIAL_AC_LINK_ENABLE   0x1000
    166   1.9      kent #define ESA_IO_SRAM_ENABLE	    0x2000
    167   1.9      kent #define ESA_IIS_INPUT_ENABLE	    0x8000
    168   1.1  augustss 
    169   1.9      kent #define ESA_RING_BUS_CTRL_B	    0x38
    170   1.1  augustss #define ESA_SECOND_CODEC_ID_MASK    0x0003
    171   1.9      kent #define ESA_SPDIF_FUNC_ENABLE	    0x0010
    172   1.9      kent #define ESA_SECOND_AC_ENABLE	    0x0020
    173   1.1  augustss #define ESA_SB_MODULE_INTF_ENABLE   0x0040
    174   1.9      kent #define ESA_SSPE_ENABLE		    0x0040
    175   1.9      kent #define ESA_M3I_DOCK_ENABLE	    0x0080
    176   1.1  augustss 
    177   1.9      kent #define ESA_SDO_OUT_DEST_CTRL	    0x3A
    178   1.9      kent #define ESA_COMMAND_ADDR_OUT	    0x0003
    179   1.9      kent #define ESA_PCM_LR_OUT_LOCAL	    0x0000
    180   1.9      kent #define ESA_PCM_LR_OUT_REMOTE	    0x0004
    181   1.9      kent #define ESA_PCM_LR_OUT_MUTE	    0x0008
    182   1.9      kent #define ESA_PCM_LR_OUT_BOTH	    0x000C
    183   1.9      kent #define ESA_LINE1_DAC_OUT_LOCAL	    0x0000
    184   1.1  augustss #define ESA_LINE1_DAC_OUT_REMOTE    0x0010
    185   1.9      kent #define ESA_LINE1_DAC_OUT_MUTE	    0x0020
    186   1.9      kent #define ESA_LINE1_DAC_OUT_BOTH	    0x0030
    187   1.9      kent #define ESA_PCM_CLS_OUT_LOCAL	    0x0000
    188   1.9      kent #define ESA_PCM_CLS_OUT_REMOTE	    0x0040
    189   1.9      kent #define ESA_PCM_CLS_OUT_MUTE	    0x0080
    190   1.9      kent #define ESA_PCM_CLS_OUT_BOTH	    0x00C0
    191   1.9      kent #define ESA_PCM_RLF_OUT_LOCAL	    0x0000
    192   1.9      kent #define ESA_PCM_RLF_OUT_REMOTE	    0x0100
    193   1.9      kent #define ESA_PCM_RLF_OUT_MUTE	    0x0200
    194   1.9      kent #define ESA_PCM_RLF_OUT_BOTH	    0x0300
    195   1.9      kent #define ESA_LINE2_DAC_OUT_LOCAL	    0x0000
    196   1.1  augustss #define ESA_LINE2_DAC_OUT_REMOTE    0x0400
    197   1.9      kent #define ESA_LINE2_DAC_OUT_MUTE	    0x0800
    198   1.9      kent #define ESA_LINE2_DAC_OUT_BOTH	    0x0C00
    199   1.9      kent #define ESA_HANDSET_OUT_LOCAL	    0x0000
    200   1.9      kent #define ESA_HANDSET_OUT_REMOTE	    0x1000
    201   1.9      kent #define ESA_HANDSET_OUT_MUTE	    0x2000
    202   1.9      kent #define ESA_HANDSET_OUT_BOTH	    0x3000
    203   1.9      kent #define ESA_IO_CTRL_OUT_LOCAL	    0x0000
    204   1.9      kent #define ESA_IO_CTRL_OUT_REMOTE	    0x4000
    205   1.9      kent #define ESA_IO_CTRL_OUT_MUTE	    0x8000
    206   1.9      kent #define ESA_IO_CTRL_OUT_BOTH	    0xC000
    207   1.9      kent 
    208   1.9      kent #define ESA_SDO_IN_DEST_CTRL	    0x3C
    209   1.9      kent #define ESA_STATUS_ADDR_IN	    0x0003
    210   1.9      kent #define ESA_PCM_LR_IN_LOCAL	    0x0000
    211   1.9      kent #define ESA_PCM_LR_IN_REMOTE	    0x0004
    212   1.9      kent #define ESA_PCM_LR_RESERVED	    0x0008
    213   1.9      kent #define ESA_PCM_LR_IN_BOTH	    0x000C
    214   1.9      kent #define ESA_LINE1_ADC_IN_LOCAL	    0x0000
    215   1.9      kent #define ESA_LINE1_ADC_IN_REMOTE	    0x0010
    216   1.9      kent #define ESA_LINE1_ADC_IN_MUTE	    0x0020
    217   1.9      kent #define ESA_MIC_ADC_IN_LOCAL	    0x0000
    218   1.9      kent #define ESA_MIC_ADC_IN_REMOTE	    0x0040
    219   1.9      kent #define ESA_MIC_ADC_IN_MUTE	    0x0080
    220   1.9      kent #define ESA_LINE2_DAC_IN_LOCAL	    0x0000
    221   1.9      kent #define ESA_LINE2_DAC_IN_REMOTE	    0x0400
    222   1.9      kent #define ESA_LINE2_DAC_IN_MUTE	    0x0800
    223   1.9      kent #define ESA_HANDSET_IN_LOCAL	    0x0000
    224   1.9      kent #define ESA_HANDSET_IN_REMOTE	    0x1000
    225   1.9      kent #define ESA_HANDSET_IN_MUTE	    0x2000
    226   1.9      kent #define ESA_IO_STATUS_IN_LOCAL	    0x0000
    227   1.9      kent #define ESA_IO_STATUS_IN_REMOTE	    0x4000
    228   1.9      kent 
    229   1.9      kent #define ESA_SPDIF_IN_CTRL	    0x3E
    230   1.9      kent #define ESA_SPDIF_IN_ENABLE	    0x0001
    231   1.9      kent 
    232   1.9      kent #define ESA_GPIO_DATA		    0x60
    233   1.9      kent #define ESA_GPIO_DATA_MASK	    0x0FFF
    234   1.9      kent #define ESA_GPIO_HV_STATUS	    0x3000
    235   1.9      kent #define ESA_GPIO_PME_STATUS	    0x4000
    236   1.9      kent 
    237   1.9      kent #define ESA_GPIO_MASK		    0x64
    238   1.9      kent #define ESA_GPIO_DIRECTION	    0x68
    239   1.9      kent #define ESA_GPO_PRIMARY_AC97	    0x0001
    240   1.9      kent #define ESA_GPI_LINEOUT_SENSE	    0x0004
    241   1.9      kent #define ESA_GPO_SECONDARY_AC97	    0x0008
    242   1.9      kent #define ESA_GPI_VOL_DOWN	    0x0010
    243   1.9      kent #define ESA_GPI_VOL_UP		    0x0020
    244   1.9      kent #define ESA_GPI_IIS_CLK		    0x0040
    245   1.9      kent #define ESA_GPI_IIS_LRCLK	    0x0080
    246   1.9      kent #define ESA_GPI_IIS_DATA	    0x0100
    247   1.9      kent #define ESA_GPI_DOCKING_STATUS	    0x0100
    248   1.9      kent #define ESA_GPI_HEADPHONE_SENSE	    0x0200
    249   1.1  augustss #define ESA_GPO_EXT_AMP_SHUTDOWN    0x1000
    250   1.1  augustss 
    251   1.1  augustss /* M3 */
    252   1.1  augustss #define ESA_GPO_M3_EXT_AMP_SHUTDN   0x0002
    253   1.1  augustss 
    254   1.9      kent #define ESA_ASSP_INDEX_PORT	    0x80
    255   1.9      kent #define ESA_ASSP_MEMORY_PORT	    0x82
    256   1.9      kent #define ESA_ASSP_DATA_PORT	    0x84
    257   1.1  augustss 
    258   1.9      kent #define ESA_MPU401_DATA_PORT	    0x98
    259   1.9      kent #define ESA_MPU401_STATUS_PORT	    0x99
    260   1.1  augustss 
    261   1.9      kent #define ESA_CLK_MULT_DATA_PORT	    0x9C
    262   1.1  augustss 
    263   1.9      kent #define ESA_ASSP_CONTROL_A	    0xA2
    264   1.9      kent #define ESA_ASSP_0_WS_ENABLE	    0x01
    265   1.1  augustss #define ESA_ASSP_CTRL_A_RESERVED1   0x02
    266   1.1  augustss #define ESA_ASSP_CTRL_A_RESERVED2   0x04
    267   1.1  augustss #define ESA_ASSP_CLK_49MHZ_SELECT   0x08
    268   1.9      kent #define ESA_FAST_PLU_ENABLE	    0x10
    269   1.1  augustss #define ESA_ASSP_CTRL_A_RESERVED3   0x20
    270   1.1  augustss #define ESA_DSP_CLK_36MHZ_SELECT    0x40
    271   1.1  augustss 
    272   1.9      kent #define ESA_ASSP_CONTROL_B	    0xA4
    273   1.9      kent #define ESA_RESET_ASSP		    0x00
    274   1.9      kent #define ESA_RUN_ASSP		    0x01
    275   1.9      kent #define ESA_ENABLE_ASSP_CLOCK	    0x00
    276   1.9      kent #define ESA_STOP_ASSP_CLOCK	    0x10
    277   1.9      kent #define ESA_RESET_TOGGLE	    0x40
    278   1.1  augustss 
    279   1.9      kent #define ESA_ASSP_CONTROL_C	    0xA6
    280   1.1  augustss #define ESA_ASSP_HOST_INT_ENABLE    0x01
    281   1.1  augustss #define ESA_FM_ADDR_REMAP_DISABLE   0x02
    282   1.1  augustss #define ESA_HOST_WRITE_PORT_ENABLE  0x08
    283   1.1  augustss 
    284   1.1  augustss #define ESA_ASSP_HOST_INT_STATUS    0xAC
    285   1.1  augustss #define ESA_DSP2HOST_REQ_PIORECORD  0x01
    286   1.1  augustss #define ESA_DSP2HOST_REQ_I2SRATE    0x02
    287   1.9      kent #define ESA_DSP2HOST_REQ_TIMER	    0x04
    288   1.1  augustss 
    289   1.1  augustss /*
    290   1.1  augustss  * ASSP control regs
    291   1.1  augustss  */
    292   1.1  augustss #define ESA_DSP_PORT_TIMER_COUNT    0x06
    293   1.1  augustss 
    294   1.1  augustss #define ESA_DSP_PORT_MEMORY_INDEX   0x80
    295   1.1  augustss 
    296   1.1  augustss #define ESA_DSP_PORT_MEMORY_TYPE    0x82
    297   1.1  augustss #define ESA_MEMTYPE_INTERNAL_CODE   0x0002
    298   1.1  augustss #define ESA_MEMTYPE_INTERNAL_DATA   0x0003
    299   1.9      kent #define ESA_MEMTYPE_MASK	    0x0003
    300   1.1  augustss 
    301   1.1  augustss #define ESA_DSP_PORT_MEMORY_DATA    0x84
    302   1.1  augustss 
    303   1.1  augustss #define ESA_DSP_PORT_CONTROL_REG_A  0xA2
    304   1.1  augustss #define ESA_DSP_PORT_CONTROL_REG_B  0xA4
    305   1.1  augustss #define ESA_DSP_PORT_CONTROL_REG_C  0xA6
    306   1.1  augustss 
    307   1.9      kent #define ESA_REV_A_CODE_MEMORY_BEGIN	    0x0000
    308   1.9      kent #define ESA_REV_A_CODE_MEMORY_END	    0x0FFF
    309   1.1  augustss #define ESA_REV_A_CODE_MEMORY_UNIT_LENGTH   0x0040
    310   1.9      kent #define ESA_REV_A_CODE_MEMORY_LENGTH	    (ESA_REV_A_CODE_MEMORY_END - ESA_REV_A_CODE_MEMORY_BEGIN + 1)
    311   1.1  augustss 
    312   1.9      kent #define ESA_REV_B_CODE_MEMORY_BEGIN	    0x0000
    313   1.9      kent #define ESA_REV_B_CODE_MEMORY_END	    0x0BFF
    314   1.1  augustss #define ESA_REV_B_CODE_MEMORY_UNIT_LENGTH   0x0040
    315   1.9      kent #define ESA_REV_B_CODE_MEMORY_LENGTH	    (ESA_REV_B_CODE_MEMORY_END - ESA_REV_B_CODE_MEMORY_BEGIN + 1)
    316   1.1  augustss 
    317   1.9      kent #define ESA_REV_A_DATA_MEMORY_BEGIN	    0x1000
    318   1.9      kent #define ESA_REV_A_DATA_MEMORY_END	    0x2FFF
    319   1.1  augustss #define ESA_REV_A_DATA_MEMORY_UNIT_LENGTH   0x0080
    320   1.9      kent #define ESA_REV_A_DATA_MEMORY_LENGTH	    (ESA_REV_A_DATA_MEMORY_END - ESA_REV_A_DATA_MEMORY_BEGIN + 1)
    321   1.1  augustss 
    322   1.9      kent #define ESA_REV_B_DATA_MEMORY_BEGIN	    0x1000
    323   1.9      kent #define ESA_REV_B_DATA_MEMORY_END	    0x2BFF
    324   1.1  augustss #define ESA_REV_B_DATA_MEMORY_UNIT_LENGTH   0x0080
    325   1.9      kent #define ESA_REV_B_DATA_MEMORY_LENGTH	    (ESA_REV_B_DATA_MEMORY_END - ESA_REV_B_DATA_MEMORY_BEGIN + 1)
    326   1.1  augustss 
    327   1.1  augustss 
    328   1.9      kent #define ESA_NUM_UNITS_KERNEL_CODE	   16
    329   1.9      kent #define ESA_NUM_UNITS_KERNEL_DATA	    2
    330   1.1  augustss 
    331   1.1  augustss #define ESA_NUM_UNITS_KERNEL_CODE_WITH_HSP 16
    332   1.1  augustss #define ESA_NUM_UNITS_KERNEL_DATA_WITH_HSP  5
    333   1.1  augustss 
    334   1.1  augustss /*
    335   1.1  augustss  * Kernel data layout
    336   1.1  augustss  */
    337   1.1  augustss 
    338   1.9      kent #define ESA_DP_SHIFT_COUNT		    7
    339   1.1  augustss 
    340   1.9      kent #define ESA_KDATA_BASE_ADDR		    0x1000
    341   1.9      kent #define ESA_KDATA_BASE_ADDR2		    0x1080
    342   1.1  augustss 
    343   1.9      kent #define ESA_KDATA_TASK0			    (ESA_KDATA_BASE_ADDR + 0x0000)
    344   1.9      kent #define ESA_KDATA_TASK1			    (ESA_KDATA_BASE_ADDR + 0x0001)
    345   1.9      kent #define ESA_KDATA_TASK2			    (ESA_KDATA_BASE_ADDR + 0x0002)
    346   1.9      kent #define ESA_KDATA_TASK3			    (ESA_KDATA_BASE_ADDR + 0x0003)
    347   1.9      kent #define ESA_KDATA_TASK4			    (ESA_KDATA_BASE_ADDR + 0x0004)
    348   1.9      kent #define ESA_KDATA_TASK5			    (ESA_KDATA_BASE_ADDR + 0x0005)
    349   1.9      kent #define ESA_KDATA_TASK6			    (ESA_KDATA_BASE_ADDR + 0x0006)
    350   1.9      kent #define ESA_KDATA_TASK7			    (ESA_KDATA_BASE_ADDR + 0x0007)
    351   1.9      kent #define ESA_KDATA_TASK_ENDMARK		    (ESA_KDATA_BASE_ADDR + 0x0008)
    352   1.9      kent 
    353   1.9      kent #define ESA_KDATA_CURRENT_TASK		    (ESA_KDATA_BASE_ADDR + 0x0009)
    354   1.9      kent #define ESA_KDATA_TASK_SWITCH		    (ESA_KDATA_BASE_ADDR + 0x000A)
    355   1.9      kent 
    356   1.9      kent #define ESA_KDATA_INSTANCE0_POS3D	    (ESA_KDATA_BASE_ADDR + 0x000B)
    357   1.9      kent #define ESA_KDATA_INSTANCE1_POS3D	    (ESA_KDATA_BASE_ADDR + 0x000C)
    358   1.9      kent #define ESA_KDATA_INSTANCE2_POS3D	    (ESA_KDATA_BASE_ADDR + 0x000D)
    359   1.9      kent #define ESA_KDATA_INSTANCE3_POS3D	    (ESA_KDATA_BASE_ADDR + 0x000E)
    360   1.9      kent #define ESA_KDATA_INSTANCE4_POS3D	    (ESA_KDATA_BASE_ADDR + 0x000F)
    361   1.9      kent #define ESA_KDATA_INSTANCE5_POS3D	    (ESA_KDATA_BASE_ADDR + 0x0010)
    362   1.9      kent #define ESA_KDATA_INSTANCE6_POS3D	    (ESA_KDATA_BASE_ADDR + 0x0011)
    363   1.9      kent #define ESA_KDATA_INSTANCE7_POS3D	    (ESA_KDATA_BASE_ADDR + 0x0012)
    364   1.9      kent #define ESA_KDATA_INSTANCE8_POS3D	    (ESA_KDATA_BASE_ADDR + 0x0013)
    365   1.1  augustss #define ESA_KDATA_INSTANCE_POS3D_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x0014)
    366   1.1  augustss 
    367   1.9      kent #define ESA_KDATA_INSTANCE0_SPKVIRT	    (ESA_KDATA_BASE_ADDR + 0x0015)
    368   1.1  augustss #define ESA_KDATA_INSTANCE_SPKVIRT_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0016)
    369   1.1  augustss 
    370   1.9      kent #define ESA_KDATA_INSTANCE0_SPDIF	    (ESA_KDATA_BASE_ADDR + 0x0017)
    371   1.1  augustss #define ESA_KDATA_INSTANCE_SPDIF_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x0018)
    372   1.1  augustss 
    373   1.9      kent #define ESA_KDATA_INSTANCE0_MODEM	    (ESA_KDATA_BASE_ADDR + 0x0019)
    374   1.1  augustss #define ESA_KDATA_INSTANCE_MODEM_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x001A)
    375   1.1  augustss 
    376   1.9      kent #define ESA_KDATA_INSTANCE0_SRC		    (ESA_KDATA_BASE_ADDR + 0x001B)
    377   1.9      kent #define ESA_KDATA_INSTANCE1_SRC		    (ESA_KDATA_BASE_ADDR + 0x001C)
    378   1.9      kent #define ESA_KDATA_INSTANCE_SRC_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x001D)
    379   1.9      kent 
    380   1.9      kent #define ESA_KDATA_INSTANCE0_MINISRC	    (ESA_KDATA_BASE_ADDR + 0x001E)
    381   1.9      kent #define ESA_KDATA_INSTANCE1_MINISRC	    (ESA_KDATA_BASE_ADDR + 0x001F)
    382   1.9      kent #define ESA_KDATA_INSTANCE2_MINISRC	    (ESA_KDATA_BASE_ADDR + 0x0020)
    383   1.9      kent #define ESA_KDATA_INSTANCE3_MINISRC	    (ESA_KDATA_BASE_ADDR + 0x0021)
    384   1.1  augustss #define ESA_KDATA_INSTANCE_MINISRC_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0022)
    385   1.1  augustss 
    386   1.9      kent #define ESA_KDATA_INSTANCE0_CPYTHRU	    (ESA_KDATA_BASE_ADDR + 0x0023)
    387   1.9      kent #define ESA_KDATA_INSTANCE1_CPYTHRU	    (ESA_KDATA_BASE_ADDR + 0x0024)
    388   1.1  augustss #define ESA_KDATA_INSTANCE_CPYTHRU_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0025)
    389   1.1  augustss 
    390   1.9      kent #define ESA_KDATA_CURRENT_DMA		    (ESA_KDATA_BASE_ADDR + 0x0026)
    391   1.9      kent #define ESA_KDATA_DMA_SWITCH		    (ESA_KDATA_BASE_ADDR + 0x0027)
    392   1.9      kent #define ESA_KDATA_DMA_ACTIVE		    (ESA_KDATA_BASE_ADDR + 0x0028)
    393   1.9      kent 
    394   1.9      kent #define ESA_KDATA_DMA_XFER0		    (ESA_KDATA_BASE_ADDR + 0x0029)
    395   1.9      kent #define ESA_KDATA_DMA_XFER1		    (ESA_KDATA_BASE_ADDR + 0x002A)
    396   1.9      kent #define ESA_KDATA_DMA_XFER2		    (ESA_KDATA_BASE_ADDR + 0x002B)
    397   1.9      kent #define ESA_KDATA_DMA_XFER3		    (ESA_KDATA_BASE_ADDR + 0x002C)
    398   1.9      kent #define ESA_KDATA_DMA_XFER4		    (ESA_KDATA_BASE_ADDR + 0x002D)
    399   1.9      kent #define ESA_KDATA_DMA_XFER5		    (ESA_KDATA_BASE_ADDR + 0x002E)
    400   1.9      kent #define ESA_KDATA_DMA_XFER6		    (ESA_KDATA_BASE_ADDR + 0x002F)
    401   1.9      kent #define ESA_KDATA_DMA_XFER7		    (ESA_KDATA_BASE_ADDR + 0x0030)
    402   1.9      kent #define ESA_KDATA_DMA_XFER8		    (ESA_KDATA_BASE_ADDR + 0x0031)
    403   1.9      kent #define ESA_KDATA_DMA_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x0032)
    404   1.9      kent 
    405   1.9      kent #define ESA_KDATA_I2S_SAMPLE_COUNT	    (ESA_KDATA_BASE_ADDR + 0x0033)
    406   1.9      kent #define ESA_KDATA_I2S_INT_METER		    (ESA_KDATA_BASE_ADDR + 0x0034)
    407   1.9      kent #define ESA_KDATA_I2S_ACTIVE		    (ESA_KDATA_BASE_ADDR + 0x0035)
    408   1.9      kent 
    409   1.9      kent #define ESA_KDATA_TIMER_COUNT_RELOAD	    (ESA_KDATA_BASE_ADDR + 0x0036)
    410   1.9      kent #define ESA_KDATA_TIMER_COUNT_CURRENT	    (ESA_KDATA_BASE_ADDR + 0x0037)
    411   1.9      kent 
    412   1.9      kent #define ESA_KDATA_HALT_SYNCH_CLIENT	    (ESA_KDATA_BASE_ADDR + 0x0038)
    413   1.9      kent #define ESA_KDATA_HALT_SYNCH_DMA	    (ESA_KDATA_BASE_ADDR + 0x0039)
    414   1.9      kent #define ESA_KDATA_HALT_ACKNOWLEDGE	    (ESA_KDATA_BASE_ADDR + 0x003A)
    415   1.1  augustss 
    416   1.9      kent #define ESA_KDATA_ADC1_XFER0		    (ESA_KDATA_BASE_ADDR + 0x003B)
    417   1.9      kent #define ESA_KDATA_ADC1_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x003C)
    418   1.1  augustss #define ESA_KDATA_ADC1_LEFT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x003D)
    419   1.9      kent #define ESA_KDATA_ADC1_RIGHT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x003E)
    420   1.1  augustss #define ESA_KDATA_ADC1_LEFT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x003F)
    421   1.1  augustss #define ESA_KDATA_ADC1_RIGHT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x0040)
    422   1.1  augustss 
    423   1.9      kent #define ESA_KDATA_ADC2_XFER0		    (ESA_KDATA_BASE_ADDR + 0x0041)
    424   1.9      kent #define ESA_KDATA_ADC2_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x0042)
    425   1.1  augustss #define ESA_KDATA_ADC2_LEFT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x0043)
    426   1.1  augustss #define ESA_KDATA_ADC2_RIGHT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x0044)
    427   1.1  augustss #define ESA_KDATA_ADC2_LEFT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x0045)
    428   1.1  augustss #define ESA_KDATA_ADC2_RIGHT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x0046)
    429   1.1  augustss 
    430   1.9      kent #define ESA_KDATA_CD_XFER0		    (ESA_KDATA_BASE_ADDR + 0x0047)
    431   1.1  augustss #define ESA_KDATA_CD_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x0048)
    432   1.1  augustss #define ESA_KDATA_CD_LEFT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x0049)
    433   1.1  augustss #define ESA_KDATA_CD_RIGHT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x004A)
    434   1.1  augustss #define ESA_KDATA_CD_LEFT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x004B)
    435   1.1  augustss #define ESA_KDATA_CD_RIGHT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x004C)
    436   1.1  augustss 
    437   1.1  augustss #define ESA_KDATA_MIC_XFER0		    (ESA_KDATA_BASE_ADDR + 0x004D)
    438   1.1  augustss #define ESA_KDATA_MIC_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x004E)
    439   1.1  augustss #define ESA_KDATA_MIC_VOLUME		    (ESA_KDATA_BASE_ADDR + 0x004F)
    440   1.1  augustss #define ESA_KDATA_MIC_SUR_VOL		    (ESA_KDATA_BASE_ADDR + 0x0050)
    441   1.1  augustss 
    442   1.9      kent #define ESA_KDATA_I2S_XFER0		    (ESA_KDATA_BASE_ADDR + 0x0051)
    443   1.9      kent #define ESA_KDATA_I2S_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x0052)
    444   1.1  augustss 
    445   1.9      kent #define ESA_KDATA_CHI_XFER0		    (ESA_KDATA_BASE_ADDR + 0x0053)
    446   1.9      kent #define ESA_KDATA_CHI_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x0054)
    447   1.1  augustss 
    448   1.9      kent #define ESA_KDATA_SPDIF_XFER		    (ESA_KDATA_BASE_ADDR + 0x0055)
    449   1.9      kent #define ESA_KDATA_SPDIF_CURRENT_FRAME	    (ESA_KDATA_BASE_ADDR + 0x0056)
    450   1.9      kent #define ESA_KDATA_SPDIF_FRAME0		    (ESA_KDATA_BASE_ADDR + 0x0057)
    451   1.9      kent #define ESA_KDATA_SPDIF_FRAME1		    (ESA_KDATA_BASE_ADDR + 0x0058)
    452   1.9      kent #define ESA_KDATA_SPDIF_FRAME2		    (ESA_KDATA_BASE_ADDR + 0x0059)
    453   1.9      kent 
    454   1.9      kent #define ESA_KDATA_SPDIF_REQUEST		    (ESA_KDATA_BASE_ADDR + 0x005A)
    455   1.9      kent #define ESA_KDATA_SPDIF_TEMP		    (ESA_KDATA_BASE_ADDR + 0x005B)
    456   1.9      kent 
    457   1.9      kent #define ESA_KDATA_SPDIFIN_XFER0		    (ESA_KDATA_BASE_ADDR + 0x005C)
    458   1.9      kent #define ESA_KDATA_SPDIFIN_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x005D)
    459   1.9      kent #define ESA_KDATA_SPDIFIN_INT_METER	    (ESA_KDATA_BASE_ADDR + 0x005E)
    460   1.9      kent 
    461   1.9      kent #define ESA_KDATA_DSP_RESET_COUNT	    (ESA_KDATA_BASE_ADDR + 0x005F)
    462   1.9      kent #define ESA_KDATA_DEBUG_OUTPUT		    (ESA_KDATA_BASE_ADDR + 0x0060)
    463   1.9      kent 
    464   1.9      kent #define ESA_KDATA_KERNEL_ISR_LIST	    (ESA_KDATA_BASE_ADDR + 0x0061)
    465   1.9      kent 
    466   1.9      kent #define ESA_KDATA_KERNEL_ISR_CBSR1	    (ESA_KDATA_BASE_ADDR + 0x0062)
    467   1.9      kent #define ESA_KDATA_KERNEL_ISR_CBER1	    (ESA_KDATA_BASE_ADDR + 0x0063)
    468   1.9      kent #define ESA_KDATA_KERNEL_ISR_CBCR	    (ESA_KDATA_BASE_ADDR + 0x0064)
    469   1.9      kent #define ESA_KDATA_KERNEL_ISR_AR0	    (ESA_KDATA_BASE_ADDR + 0x0065)
    470   1.9      kent #define ESA_KDATA_KERNEL_ISR_AR1	    (ESA_KDATA_BASE_ADDR + 0x0066)
    471   1.9      kent #define ESA_KDATA_KERNEL_ISR_AR2	    (ESA_KDATA_BASE_ADDR + 0x0067)
    472   1.9      kent #define ESA_KDATA_KERNEL_ISR_AR3	    (ESA_KDATA_BASE_ADDR + 0x0068)
    473   1.9      kent #define ESA_KDATA_KERNEL_ISR_AR4	    (ESA_KDATA_BASE_ADDR + 0x0069)
    474   1.9      kent #define ESA_KDATA_KERNEL_ISR_AR5	    (ESA_KDATA_BASE_ADDR + 0x006A)
    475   1.9      kent #define ESA_KDATA_KERNEL_ISR_BRCR	    (ESA_KDATA_BASE_ADDR + 0x006B)
    476   1.9      kent #define ESA_KDATA_KERNEL_ISR_PASR	    (ESA_KDATA_BASE_ADDR + 0x006C)
    477   1.9      kent #define ESA_KDATA_KERNEL_ISR_PAER	    (ESA_KDATA_BASE_ADDR + 0x006D)
    478   1.9      kent 
    479   1.9      kent #define ESA_KDATA_CLIENT_SCRATCH0	    (ESA_KDATA_BASE_ADDR + 0x006E)
    480   1.9      kent #define ESA_KDATA_CLIENT_SCRATCH1	    (ESA_KDATA_BASE_ADDR + 0x006F)
    481   1.9      kent #define ESA_KDATA_KERNEL_SCRATCH	    (ESA_KDATA_BASE_ADDR + 0x0070)
    482   1.9      kent #define ESA_KDATA_KERNEL_ISR_SCRATCH	    (ESA_KDATA_BASE_ADDR + 0x0071)
    483   1.1  augustss 
    484  1.11    andvar #define ESA_KDATA_QUEUE_LEFT		    (ESA_KDATA_BASE_ADDR + 0x0072)
    485   1.9      kent #define ESA_KDATA_QUEUE_RIGHT		    (ESA_KDATA_BASE_ADDR + 0x0073)
    486   1.1  augustss 
    487   1.9      kent #define ESA_KDATA_ADC1_REQUEST		    (ESA_KDATA_BASE_ADDR + 0x0074)
    488   1.9      kent #define ESA_KDATA_ADC2_REQUEST		    (ESA_KDATA_BASE_ADDR + 0x0075)
    489   1.1  augustss #define ESA_KDATA_CD_REQUEST		    (ESA_KDATA_BASE_ADDR + 0x0076)
    490   1.1  augustss #define ESA_KDATA_MIC_REQUEST		    (ESA_KDATA_BASE_ADDR + 0x0077)
    491   1.1  augustss 
    492   1.9      kent #define ESA_KDATA_ADC1_MIXER_REQUEST	    (ESA_KDATA_BASE_ADDR + 0x0078)
    493   1.9      kent #define ESA_KDATA_ADC2_MIXER_REQUEST	    (ESA_KDATA_BASE_ADDR + 0x0079)
    494   1.1  augustss #define ESA_KDATA_CD_MIXER_REQUEST	    (ESA_KDATA_BASE_ADDR + 0x007A)
    495   1.1  augustss #define ESA_KDATA_MIC_MIXER_REQUEST	    (ESA_KDATA_BASE_ADDR + 0x007B)
    496   1.1  augustss #define ESA_KDATA_MIC_SYNC_COUNTER	    (ESA_KDATA_BASE_ADDR + 0x007C)
    497   1.1  augustss 
    498   1.1  augustss /*
    499   1.1  augustss  * second 'segment' (?) reserved for mixer
    500   1.1  augustss  * buffers..
    501   1.1  augustss  */
    502   1.1  augustss 
    503   1.9      kent #define ESA_KDATA_MIXER_WORD0		    (ESA_KDATA_BASE_ADDR2 + 0x0000)
    504   1.9      kent #define ESA_KDATA_MIXER_WORD1		    (ESA_KDATA_BASE_ADDR2 + 0x0001)
    505   1.9      kent #define ESA_KDATA_MIXER_WORD2		    (ESA_KDATA_BASE_ADDR2 + 0x0002)
    506   1.9      kent #define ESA_KDATA_MIXER_WORD3		    (ESA_KDATA_BASE_ADDR2 + 0x0003)
    507   1.9      kent #define ESA_KDATA_MIXER_WORD4		    (ESA_KDATA_BASE_ADDR2 + 0x0004)
    508   1.9      kent #define ESA_KDATA_MIXER_WORD5		    (ESA_KDATA_BASE_ADDR2 + 0x0005)
    509   1.9      kent #define ESA_KDATA_MIXER_WORD6		    (ESA_KDATA_BASE_ADDR2 + 0x0006)
    510   1.9      kent #define ESA_KDATA_MIXER_WORD7		    (ESA_KDATA_BASE_ADDR2 + 0x0007)
    511   1.9      kent #define ESA_KDATA_MIXER_WORD8		    (ESA_KDATA_BASE_ADDR2 + 0x0008)
    512   1.9      kent #define ESA_KDATA_MIXER_WORD9		    (ESA_KDATA_BASE_ADDR2 + 0x0009)
    513   1.9      kent #define ESA_KDATA_MIXER_WORDA		    (ESA_KDATA_BASE_ADDR2 + 0x000A)
    514   1.9      kent #define ESA_KDATA_MIXER_WORDB		    (ESA_KDATA_BASE_ADDR2 + 0x000B)
    515   1.9      kent #define ESA_KDATA_MIXER_WORDC		    (ESA_KDATA_BASE_ADDR2 + 0x000C)
    516   1.9      kent #define ESA_KDATA_MIXER_WORDD		    (ESA_KDATA_BASE_ADDR2 + 0x000D)
    517   1.9      kent #define ESA_KDATA_MIXER_WORDE		    (ESA_KDATA_BASE_ADDR2 + 0x000E)
    518   1.9      kent #define ESA_KDATA_MIXER_WORDF		    (ESA_KDATA_BASE_ADDR2 + 0x000F)
    519   1.9      kent 
    520   1.9      kent #define ESA_KDATA_MIXER_XFER0		    (ESA_KDATA_BASE_ADDR2 + 0x0010)
    521   1.9      kent #define ESA_KDATA_MIXER_XFER1		    (ESA_KDATA_BASE_ADDR2 + 0x0011)
    522   1.9      kent #define ESA_KDATA_MIXER_XFER2		    (ESA_KDATA_BASE_ADDR2 + 0x0012)
    523   1.9      kent #define ESA_KDATA_MIXER_XFER3		    (ESA_KDATA_BASE_ADDR2 + 0x0013)
    524   1.9      kent #define ESA_KDATA_MIXER_XFER4		    (ESA_KDATA_BASE_ADDR2 + 0x0014)
    525   1.9      kent #define ESA_KDATA_MIXER_XFER5		    (ESA_KDATA_BASE_ADDR2 + 0x0015)
    526   1.9      kent #define ESA_KDATA_MIXER_XFER6		    (ESA_KDATA_BASE_ADDR2 + 0x0016)
    527   1.9      kent #define ESA_KDATA_MIXER_XFER7		    (ESA_KDATA_BASE_ADDR2 + 0x0017)
    528   1.9      kent #define ESA_KDATA_MIXER_XFER8		    (ESA_KDATA_BASE_ADDR2 + 0x0018)
    529   1.9      kent #define ESA_KDATA_MIXER_XFER9		    (ESA_KDATA_BASE_ADDR2 + 0x0019)
    530   1.9      kent #define ESA_KDATA_MIXER_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR2 + 0x001A)
    531   1.9      kent 
    532   1.9      kent #define ESA_KDATA_MIXER_TASK_NUMBER	    (ESA_KDATA_BASE_ADDR2 + 0x001B)
    533   1.9      kent #define ESA_KDATA_CURRENT_MIXER		    (ESA_KDATA_BASE_ADDR2 + 0x001C)
    534   1.9      kent #define ESA_KDATA_MIXER_ACTIVE		    (ESA_KDATA_BASE_ADDR2 + 0x001D)
    535   1.9      kent #define ESA_KDATA_MIXER_BANK_STATUS	    (ESA_KDATA_BASE_ADDR2 + 0x001E)
    536   1.9      kent #define ESA_KDATA_DAC_LEFT_VOLUME		(ESA_KDATA_BASE_ADDR2 + 0x001F)
    537   1.9      kent #define ESA_KDATA_DAC_RIGHT_VOLUME	    (ESA_KDATA_BASE_ADDR2 + 0x0020)
    538   1.9      kent 
    539   1.9      kent #define ESA_MAX_INSTANCE_MINISRC	    (ESA_KDATA_INSTANCE_MINISRC_ENDMARK - ESA_KDATA_INSTANCE0_MINISRC)
    540   1.9      kent #define ESA_MAX_VIRTUAL_DMA_CHANNELS	    (ESA_KDATA_DMA_XFER_ENDMARK - ESA_KDATA_DMA_XFER0)
    541   1.9      kent #define ESA_MAX_VIRTUAL_MIXER_CHANNELS	    (ESA_KDATA_MIXER_XFER_ENDMARK - ESA_KDATA_MIXER_XFER0)
    542   1.9      kent #define ESA_MAX_VIRTUAL_ADC1_CHANNELS	    (ESA_KDATA_ADC1_XFER_ENDMARK - ESA_KDATA_ADC1_XFER0)
    543   1.1  augustss 
    544   1.1  augustss /*
    545   1.1  augustss  * client data area offsets
    546   1.1  augustss  */
    547   1.9      kent #define ESA_CDATA_INSTANCE_READY	    0x00
    548   1.1  augustss 
    549   1.9      kent #define ESA_CDATA_HOST_SRC_ADDRL	    0x01
    550   1.9      kent #define ESA_CDATA_HOST_SRC_ADDRH	    0x02
    551   1.9      kent #define ESA_CDATA_HOST_SRC_END_PLUS_1L	    0x03
    552   1.9      kent #define ESA_CDATA_HOST_SRC_END_PLUS_1H	    0x04
    553   1.9      kent #define ESA_CDATA_HOST_SRC_CURRENTL	    0x05
    554   1.9      kent #define ESA_CDATA_HOST_SRC_CURRENTH	    0x06
    555   1.9      kent 
    556   1.9      kent #define ESA_CDATA_IN_BUF_CONNECT	    0x07
    557   1.9      kent #define ESA_CDATA_OUT_BUF_CONNECT	    0x08
    558   1.9      kent 
    559   1.9      kent #define ESA_CDATA_IN_BUF_BEGIN		    0x09
    560   1.9      kent #define ESA_CDATA_IN_BUF_END_PLUS_1	    0x0A
    561   1.9      kent #define ESA_CDATA_IN_BUF_HEAD		    0x0B
    562   1.9      kent #define ESA_CDATA_IN_BUF_TAIL		    0x0C
    563   1.9      kent #define ESA_CDATA_OUT_BUF_BEGIN		    0x0D
    564   1.9      kent #define ESA_CDATA_OUT_BUF_END_PLUS_1	    0x0E
    565   1.9      kent #define ESA_CDATA_OUT_BUF_HEAD		    0x0F
    566   1.9      kent #define ESA_CDATA_OUT_BUF_TAIL		    0x10
    567   1.9      kent 
    568   1.9      kent #define ESA_CDATA_DMA_CONTROL		    0x11
    569   1.9      kent #define ESA_CDATA_RESERVED		    0x12
    570   1.9      kent 
    571   1.9      kent #define ESA_CDATA_FREQUENCY		    0x13
    572   1.9      kent #define ESA_CDATA_LEFT_VOLUME		    0x14
    573   1.9      kent #define ESA_CDATA_RIGHT_VOLUME		    0x15
    574   1.9      kent #define ESA_CDATA_LEFT_SUR_VOL		    0x16
    575   1.9      kent #define ESA_CDATA_RIGHT_SUR_VOL		    0x17
    576   1.9      kent 
    577   1.9      kent #define ESA_CDATA_HEADER_LEN		    0x18
    578   1.9      kent 
    579   1.9      kent #define ESA_SRC3_DIRECTION_OFFSET	    ESA_CDATA_HEADER_LEN
    580   1.9      kent #define ESA_SRC3_MODE_OFFSET		    (ESA_CDATA_HEADER_LEN + 1)
    581   1.9      kent #define ESA_SRC3_WORD_LENGTH_OFFSET	    (ESA_CDATA_HEADER_LEN + 2)
    582   1.9      kent #define ESA_SRC3_PARAMETER_OFFSET	    (ESA_CDATA_HEADER_LEN + 3)
    583   1.9      kent #define ESA_SRC3_COEFF_ADDR_OFFSET	    (ESA_CDATA_HEADER_LEN + 8)
    584   1.9      kent #define ESA_SRC3_FILTAP_ADDR_OFFSET	    (ESA_CDATA_HEADER_LEN + 10)
    585   1.9      kent #define ESA_SRC3_TEMP_INBUF_ADDR_OFFSET	    (ESA_CDATA_HEADER_LEN + 16)
    586   1.1  augustss #define ESA_SRC3_TEMP_OUTBUF_ADDR_OFFSET    (ESA_CDATA_HEADER_LEN + 17)
    587   1.1  augustss 
    588   1.1  augustss #define ESA_MINISRC_IN_BUFFER_SIZE   (0x50 * 2)
    589   1.1  augustss #define ESA_MINISRC_OUT_BUFFER_SIZE  (0x50 * 2 * 2)
    590   1.1  augustss #define ESA_MINISRC_OUT_BUFFER_SIZE  (0x50 * 2 * 2)
    591   1.1  augustss #define ESA_MINISRC_TMP_BUFFER_SIZE  (112 + (ESA_MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2)
    592   1.1  augustss #define ESA_MINISRC_BIQUAD_STAGE	2
    593   1.1  augustss #define ESA_MINISRC_COEF_LOC		0x175
    594   1.1  augustss 
    595   1.9      kent #define ESA_DMACONTROL_BLOCK_MASK	    0x000F
    596   1.9      kent #define	 ESA_DMAC_BLOCK0_SELECTOR	    0x0000
    597   1.9      kent #define	 ESA_DMAC_BLOCK1_SELECTOR	    0x0001
    598   1.9      kent #define	 ESA_DMAC_BLOCK2_SELECTOR	    0x0002
    599   1.9      kent #define	 ESA_DMAC_BLOCK3_SELECTOR	    0x0003
    600   1.9      kent #define	 ESA_DMAC_BLOCK4_SELECTOR	    0x0004
    601   1.9      kent #define	 ESA_DMAC_BLOCK5_SELECTOR	    0x0005
    602   1.9      kent #define	 ESA_DMAC_BLOCK6_SELECTOR	    0x0006
    603   1.9      kent #define	 ESA_DMAC_BLOCK7_SELECTOR	    0x0007
    604   1.9      kent #define	 ESA_DMAC_BLOCK8_SELECTOR	    0x0008
    605   1.9      kent #define	 ESA_DMAC_BLOCK9_SELECTOR	    0x0009
    606   1.9      kent #define	 ESA_DMAC_BLOCKA_SELECTOR	    0x000A
    607   1.9      kent #define	 ESA_DMAC_BLOCKB_SELECTOR	    0x000B
    608   1.9      kent #define	 ESA_DMAC_BLOCKC_SELECTOR	    0x000C
    609   1.9      kent #define	 ESA_DMAC_BLOCKD_SELECTOR	    0x000D
    610   1.9      kent #define	 ESA_DMAC_BLOCKE_SELECTOR	    0x000E
    611   1.9      kent #define	 ESA_DMAC_BLOCKF_SELECTOR	    0x000F
    612   1.9      kent #define ESA_DMACONTROL_PAGE_MASK	    0x00F0
    613   1.9      kent #define	 ESA_DMAC_PAGE0_SELECTOR	    0x0030
    614   1.9      kent #define	 ESA_DMAC_PAGE1_SELECTOR	    0x0020
    615   1.9      kent #define	 ESA_DMAC_PAGE2_SELECTOR	    0x0010
    616   1.9      kent #define	 ESA_DMAC_PAGE3_SELECTOR	    0x0000
    617   1.9      kent #define ESA_DMACONTROL_AUTOREPEAT	    0x1000
    618   1.9      kent #define ESA_DMACONTROL_STOPPED		    0x2000
    619   1.9      kent #define ESA_DMACONTROL_DIRECTION	    0x0100
    620