esareg.h revision 1.3 1 1.3 augustss /* $NetBSD: esareg.h,v 1.3 2002/01/06 16:58:23 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 2002 Lennart Augustsson
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * Redistribution and use in source and binary forms, with or without
8 1.1 augustss * modification, are permitted provided that the following conditions
9 1.1 augustss * are met:
10 1.1 augustss * 1. Redistributions of source code must retain the above copyright
11 1.1 augustss * notice, this list of conditions and the following disclaimer.
12 1.2 augustss * 2. The name of the author may not be used to endorse or promote products
13 1.1 augustss * derived from this software without specific prior written permission.
14 1.1 augustss *
15 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 augustss * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 1.1 augustss * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 1.1 augustss * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 1.1 augustss * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 1.1 augustss * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 1.1 augustss * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 1.1 augustss * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 1.1 augustss * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 1.1 augustss * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 1.1 augustss * SUCH DAMAGE.
26 1.1 augustss */
27 1.1 augustss
28 1.1 augustss /*
29 1.1 augustss * ESS Allegro-1 / Maestro3 Audio Driver
30 1.1 augustss *
31 1.1 augustss * Lots of magic based on the FreeBSD maestro3 driver and
32 1.1 augustss * reverse engineering.
33 1.3 augustss * Original driver by Don Kim.
34 1.1 augustss *
35 1.1 augustss */
36 1.1 augustss
37 1.1 augustss /* Allegro PCI configuration registers */
38 1.1 augustss #define PCI_LEGACY_AUDIO_CTRL 0x40
39 1.1 augustss #define DISABLE_LEGACY 0x00008000
40 1.1 augustss
41 1.1 augustss #define ESA_PCI_ALLEGRO_CONFIG 0x50
42 1.1 augustss #define ESA_SB_ADDR_240 0x00000004
43 1.1 augustss #define ESA_MPU_ADDR_MASK 0x00000018
44 1.1 augustss #define ESA_MPU_ADDR_330 0x00000000
45 1.1 augustss #define ESA_MPU_ADDR_300 0x00000008
46 1.1 augustss #define ESA_MPU_ADDR_320 0x00000010
47 1.1 augustss #define ESA_MPU_ADDR_340 0x00000018
48 1.1 augustss #define ESA_USE_PCI_TIMING 0x00000040
49 1.1 augustss #define ESA_POSTED_WRITE_ENABLE 0x00000080
50 1.1 augustss #define ESA_DMA_POLICY_MASK 0x00000700
51 1.1 augustss #define ESA_DMA_DDMA 0x00000000
52 1.1 augustss #define ESA_DMA_TDMA 0x00000100
53 1.1 augustss #define ESA_DMA_PCPCI 0x00000200
54 1.1 augustss #define ESA_DMA_WBDMA16 0x00000400
55 1.1 augustss #define ESA_DMA_WBDMA4 0x00000500
56 1.1 augustss #define ESA_DMA_WBDMA2 0x00000600
57 1.1 augustss #define ESA_DMA_WBDMA1 0x00000700
58 1.1 augustss #define ESA_DMA_SAFE_GUARD 0x00000800
59 1.1 augustss #define ESA_HI_PERF_GP_ENABLE 0x00001000
60 1.1 augustss #define ESA_PIC_SNOOP_MODE_0 0x00002000
61 1.1 augustss #define ESA_PIC_SNOOP_MODE_1 0x00004000
62 1.1 augustss #define ESA_SOUNDBLASTER_IRQ_MASK 0x00008000
63 1.1 augustss #define ESA_RING_IN_ENABLE 0x00010000
64 1.1 augustss #define ESA_SPDIF_TEST_MODE 0x00020000
65 1.1 augustss #define ESA_CLK_MULT_MODE_SELECT_2 0x00040000
66 1.1 augustss #define ESA_EEPROM_WRITE_ENABLE 0x00080000
67 1.1 augustss #define ESA_CODEC_DIR_IN 0x00100000
68 1.1 augustss #define ESA_HV_BUTTON_FROM_GD 0x00200000
69 1.1 augustss #define ESA_REDUCED_DEBOUNCE 0x00400000
70 1.1 augustss #define ESA_HV_CTRL_ENABLE 0x00800000
71 1.1 augustss #define ESA_SPDIF_ENABLE 0x01000000
72 1.1 augustss #define ESA_CLK_DIV_SELECT 0x06000000
73 1.1 augustss #define ESA_CLK_DIV_BY_48 0x00000000
74 1.1 augustss #define ESA_CLK_DIV_BY_49 0x02000000
75 1.1 augustss #define ESA_CLK_DIV_BY_50 0x04000000
76 1.1 augustss #define ESA_CLK_DIV_RESERVED 0x06000000
77 1.1 augustss #define ESA_PM_CTRL_ENABLE 0x08000000
78 1.1 augustss #define ESA_CLK_MULT_MODE_SELECT 0x30000000
79 1.1 augustss #define ESA_CLK_MULT_MODE_SHIFT 28
80 1.1 augustss #define ESA_CLK_MULT_MODE_0 0x00000000
81 1.1 augustss #define ESA_CLK_MULT_MODE_1 0x10000000
82 1.1 augustss #define ESA_CLK_MULT_MODE_2 0x20000000
83 1.1 augustss #define ESA_CLK_MULT_MODE_3 0x30000000
84 1.1 augustss #define ESA_INT_CLK_SELECT 0x40000000
85 1.1 augustss #define ESA_INT_CLK_MULT_RESET 0x80000000
86 1.1 augustss
87 1.1 augustss /* M3 */
88 1.1 augustss #define ESA_INT_CLK_SRC_NOT_PCI 0x00100000
89 1.1 augustss #define ESA_INT_CLK_MULT_ENABLE 0x80000000
90 1.1 augustss
91 1.1 augustss #define ESA_PCI_ACPI_CONTROL 0x54
92 1.1 augustss #define ESA_PCI_ACPI_D0 0x00000000
93 1.1 augustss #define ESA_PCI_ACPI_D1 0xB4F70000
94 1.1 augustss #define ESA_PCI_ACPI_D2 0xB4F7B4F7
95 1.1 augustss
96 1.1 augustss #define ESA_PCI_USER_CONFIG 0x58
97 1.1 augustss #define ESA_EXT_PCI_MASTER_ENABLE 0x00000001
98 1.1 augustss #define ESA_SPDIF_OUT_SELECT 0x00000002
99 1.1 augustss #define ESA_TEST_PIN_DIR_CTRL 0x00000004
100 1.1 augustss #define ESA_AC97_CODEC_TEST 0x00000020
101 1.1 augustss #define ESA_TRI_STATE_BUFFER 0x00000080
102 1.1 augustss #define ESA_IN_CLK_12MHZ_SELECT 0x00000100
103 1.1 augustss #define ESA_MULTI_FUNC_DISABLE 0x00000200
104 1.1 augustss #define ESA_EXT_MASTER_PAIR_SEL 0x00000400
105 1.1 augustss #define ESA_PCI_MASTER_SUPPORT 0x00000800
106 1.1 augustss #define ESA_STOP_CLOCK_ENABLE 0x00001000
107 1.1 augustss #define ESA_EAPD_DRIVE_ENABLE 0x00002000
108 1.1 augustss #define ESA_REQ_TRI_STATE_ENABLE 0x00004000
109 1.1 augustss #define ESA_REQ_LOW_ENABLE 0x00008000
110 1.1 augustss #define ESA_MIDI_1_ENABLE 0x00010000
111 1.1 augustss #define ESA_MIDI_2_ENABLE 0x00020000
112 1.1 augustss #define ESA_SB_AUDIO_SYNC 0x00040000
113 1.1 augustss #define ESA_HV_CTRL_TEST 0x00100000
114 1.1 augustss #define ESA_SOUNDBLASTER_TEST 0x00400000
115 1.1 augustss
116 1.1 augustss #define ESA_PCI_USER_CONFIG_C 0x5C
117 1.1 augustss
118 1.1 augustss #define ESA_PCI_DDMA_CTRL 0x60
119 1.1 augustss #define ESA_DDMA_ENABLE 0x00000001
120 1.1 augustss
121 1.1 augustss
122 1.1 augustss /* Allegro registers */
123 1.1 augustss #define ESA_HOST_INT_CTRL 0x18
124 1.1 augustss #define ESA_SB_INT_ENABLE 0x0001
125 1.1 augustss #define ESA_MPU401_INT_ENABLE 0x0002
126 1.1 augustss #define ESA_ASSP_INT_ENABLE 0x0010
127 1.1 augustss #define ESA_RING_INT_ENABLE 0x0020
128 1.1 augustss #define ESA_HV_INT_ENABLE 0x0040
129 1.1 augustss #define ESA_CLKRUN_GEN_ENABLE 0x0100
130 1.1 augustss #define ESA_HV_CTRL_TO_PME 0x0400
131 1.1 augustss #define ESA_SOFTWARE_RESET_ENABLE 0x8000
132 1.1 augustss
133 1.1 augustss /*
134 1.1 augustss * should be using the above defines, probably.
135 1.1 augustss */
136 1.1 augustss #define ESA_REGB_ENABLE_RESET 0x01
137 1.1 augustss #define ESA_REGB_STOP_CLOCK 0x10
138 1.1 augustss
139 1.1 augustss #define ESA_HOST_INT_STATUS 0x1A
140 1.1 augustss #define ESA_SB_INT_PENDING 0x01
141 1.1 augustss #define ESA_MPU401_INT_PENDING 0x02
142 1.1 augustss #define ESA_ASSP_INT_PENDING 0x10
143 1.1 augustss #define ESA_RING_INT_PENDING 0x20
144 1.1 augustss #define ESA_HV_INT_PENDING 0x40
145 1.1 augustss
146 1.1 augustss #define ESA_HARDWARE_VOL_CTRL 0x1B
147 1.1 augustss #define ESA_SHADOW_MIX_REG_VOICE 0x1C
148 1.1 augustss #define ESA_HW_VOL_COUNTER_VOICE 0x1D
149 1.1 augustss #define ESA_SHADOW_MIX_REG_MASTER 0x1E
150 1.1 augustss #define ESA_HW_VOL_COUNTER_MASTER 0x1F
151 1.1 augustss
152 1.1 augustss #define ESA_CODEC_COMMAND 0x30
153 1.1 augustss #define ESA_CODEC_READ_B 0x80
154 1.1 augustss
155 1.1 augustss #define ESA_CODEC_STATUS 0x30
156 1.1 augustss #define ESA_CODEC_BUSY_B 0x01
157 1.1 augustss
158 1.1 augustss #define ESA_CODEC_DATA 0x32
159 1.1 augustss
160 1.1 augustss #define ESA_RING_BUS_CTRL_A 0x36
161 1.1 augustss #define ESA_RAC_PME_ENABLE 0x0100
162 1.1 augustss #define ESA_RAC_SDFS_ENABLE 0x0200
163 1.1 augustss #define ESA_LAC_PME_ENABLE 0x0400
164 1.1 augustss #define ESA_LAC_SDFS_ENABLE 0x0800
165 1.1 augustss #define ESA_SERIAL_AC_LINK_ENABLE 0x1000
166 1.1 augustss #define ESA_IO_SRAM_ENABLE 0x2000
167 1.1 augustss #define ESA_IIS_INPUT_ENABLE 0x8000
168 1.1 augustss
169 1.1 augustss #define ESA_RING_BUS_CTRL_B 0x38
170 1.1 augustss #define ESA_SECOND_CODEC_ID_MASK 0x0003
171 1.1 augustss #define ESA_SPDIF_FUNC_ENABLE 0x0010
172 1.1 augustss #define ESA_SECOND_AC_ENABLE 0x0020
173 1.1 augustss #define ESA_SB_MODULE_INTF_ENABLE 0x0040
174 1.1 augustss #define ESA_SSPE_ENABLE 0x0040
175 1.1 augustss #define ESA_M3I_DOCK_ENABLE 0x0080
176 1.1 augustss
177 1.1 augustss #define ESA_SDO_OUT_DEST_CTRL 0x3A
178 1.1 augustss #define ESA_COMMAND_ADDR_OUT 0x0003
179 1.1 augustss #define ESA_PCM_LR_OUT_LOCAL 0x0000
180 1.1 augustss #define ESA_PCM_LR_OUT_REMOTE 0x0004
181 1.1 augustss #define ESA_PCM_LR_OUT_MUTE 0x0008
182 1.1 augustss #define ESA_PCM_LR_OUT_BOTH 0x000C
183 1.1 augustss #define ESA_LINE1_DAC_OUT_LOCAL 0x0000
184 1.1 augustss #define ESA_LINE1_DAC_OUT_REMOTE 0x0010
185 1.1 augustss #define ESA_LINE1_DAC_OUT_MUTE 0x0020
186 1.1 augustss #define ESA_LINE1_DAC_OUT_BOTH 0x0030
187 1.1 augustss #define ESA_PCM_CLS_OUT_LOCAL 0x0000
188 1.1 augustss #define ESA_PCM_CLS_OUT_REMOTE 0x0040
189 1.1 augustss #define ESA_PCM_CLS_OUT_MUTE 0x0080
190 1.1 augustss #define ESA_PCM_CLS_OUT_BOTH 0x00C0
191 1.1 augustss #define ESA_PCM_RLF_OUT_LOCAL 0x0000
192 1.1 augustss #define ESA_PCM_RLF_OUT_REMOTE 0x0100
193 1.1 augustss #define ESA_PCM_RLF_OUT_MUTE 0x0200
194 1.1 augustss #define ESA_PCM_RLF_OUT_BOTH 0x0300
195 1.1 augustss #define ESA_LINE2_DAC_OUT_LOCAL 0x0000
196 1.1 augustss #define ESA_LINE2_DAC_OUT_REMOTE 0x0400
197 1.1 augustss #define ESA_LINE2_DAC_OUT_MUTE 0x0800
198 1.1 augustss #define ESA_LINE2_DAC_OUT_BOTH 0x0C00
199 1.1 augustss #define ESA_HANDSET_OUT_LOCAL 0x0000
200 1.1 augustss #define ESA_HANDSET_OUT_REMOTE 0x1000
201 1.1 augustss #define ESA_HANDSET_OUT_MUTE 0x2000
202 1.1 augustss #define ESA_HANDSET_OUT_BOTH 0x3000
203 1.1 augustss #define ESA_IO_CTRL_OUT_LOCAL 0x0000
204 1.1 augustss #define ESA_IO_CTRL_OUT_REMOTE 0x4000
205 1.1 augustss #define ESA_IO_CTRL_OUT_MUTE 0x8000
206 1.1 augustss #define ESA_IO_CTRL_OUT_BOTH 0xC000
207 1.1 augustss
208 1.1 augustss #define ESA_SDO_IN_DEST_CTRL 0x3C
209 1.1 augustss #define ESA_STATUS_ADDR_IN 0x0003
210 1.1 augustss #define ESA_PCM_LR_IN_LOCAL 0x0000
211 1.1 augustss #define ESA_PCM_LR_IN_REMOTE 0x0004
212 1.1 augustss #define ESA_PCM_LR_RESERVED 0x0008
213 1.1 augustss #define ESA_PCM_LR_IN_BOTH 0x000C
214 1.1 augustss #define ESA_LINE1_ADC_IN_LOCAL 0x0000
215 1.1 augustss #define ESA_LINE1_ADC_IN_REMOTE 0x0010
216 1.1 augustss #define ESA_LINE1_ADC_IN_MUTE 0x0020
217 1.1 augustss #define ESA_MIC_ADC_IN_LOCAL 0x0000
218 1.1 augustss #define ESA_MIC_ADC_IN_REMOTE 0x0040
219 1.1 augustss #define ESA_MIC_ADC_IN_MUTE 0x0080
220 1.1 augustss #define ESA_LINE2_DAC_IN_LOCAL 0x0000
221 1.1 augustss #define ESA_LINE2_DAC_IN_REMOTE 0x0400
222 1.1 augustss #define ESA_LINE2_DAC_IN_MUTE 0x0800
223 1.1 augustss #define ESA_HANDSET_IN_LOCAL 0x0000
224 1.1 augustss #define ESA_HANDSET_IN_REMOTE 0x1000
225 1.1 augustss #define ESA_HANDSET_IN_MUTE 0x2000
226 1.1 augustss #define ESA_IO_STATUS_IN_LOCAL 0x0000
227 1.1 augustss #define ESA_IO_STATUS_IN_REMOTE 0x4000
228 1.1 augustss
229 1.1 augustss #define ESA_SPDIF_IN_CTRL 0x3E
230 1.1 augustss #define ESA_SPDIF_IN_ENABLE 0x0001
231 1.1 augustss
232 1.1 augustss #define ESA_GPIO_DATA 0x60
233 1.1 augustss #define ESA_GPIO_DATA_MASK 0x0FFF
234 1.1 augustss #define ESA_GPIO_HV_STATUS 0x3000
235 1.1 augustss #define ESA_GPIO_PME_STATUS 0x4000
236 1.1 augustss
237 1.1 augustss #define ESA_GPIO_MASK 0x64
238 1.1 augustss #define ESA_GPIO_DIRECTION 0x68
239 1.1 augustss #define ESA_GPO_PRIMARY_AC97 0x0001
240 1.1 augustss #define ESA_GPI_LINEOUT_SENSE 0x0004
241 1.1 augustss #define ESA_GPO_SECONDARY_AC97 0x0008
242 1.1 augustss #define ESA_GPI_VOL_DOWN 0x0010
243 1.1 augustss #define ESA_GPI_VOL_UP 0x0020
244 1.1 augustss #define ESA_GPI_IIS_CLK 0x0040
245 1.1 augustss #define ESA_GPI_IIS_LRCLK 0x0080
246 1.1 augustss #define ESA_GPI_IIS_DATA 0x0100
247 1.1 augustss #define ESA_GPI_DOCKING_STATUS 0x0100
248 1.1 augustss #define ESA_GPI_HEADPHONE_SENSE 0x0200
249 1.1 augustss #define ESA_GPO_EXT_AMP_SHUTDOWN 0x1000
250 1.1 augustss
251 1.1 augustss /* M3 */
252 1.1 augustss #define ESA_GPO_M3_EXT_AMP_SHUTDN 0x0002
253 1.1 augustss
254 1.1 augustss #define ESA_ASSP_INDEX_PORT 0x80
255 1.1 augustss #define ESA_ASSP_MEMORY_PORT 0x82
256 1.1 augustss #define ESA_ASSP_DATA_PORT 0x84
257 1.1 augustss
258 1.1 augustss #define ESA_MPU401_DATA_PORT 0x98
259 1.1 augustss #define ESA_MPU401_STATUS_PORT 0x99
260 1.1 augustss
261 1.1 augustss #define ESA_CLK_MULT_DATA_PORT 0x9C
262 1.1 augustss
263 1.1 augustss #define ESA_ASSP_CONTROL_A 0xA2
264 1.1 augustss #define ESA_ASSP_0_WS_ENABLE 0x01
265 1.1 augustss #define ESA_ASSP_CTRL_A_RESERVED1 0x02
266 1.1 augustss #define ESA_ASSP_CTRL_A_RESERVED2 0x04
267 1.1 augustss #define ESA_ASSP_CLK_49MHZ_SELECT 0x08
268 1.1 augustss #define ESA_FAST_PLU_ENABLE 0x10
269 1.1 augustss #define ESA_ASSP_CTRL_A_RESERVED3 0x20
270 1.1 augustss #define ESA_DSP_CLK_36MHZ_SELECT 0x40
271 1.1 augustss
272 1.1 augustss #define ESA_ASSP_CONTROL_B 0xA4
273 1.1 augustss #define ESA_RESET_ASSP 0x00
274 1.1 augustss #define ESA_RUN_ASSP 0x01
275 1.1 augustss #define ESA_ENABLE_ASSP_CLOCK 0x00
276 1.1 augustss #define ESA_STOP_ASSP_CLOCK 0x10
277 1.1 augustss #define ESA_RESET_TOGGLE 0x40
278 1.1 augustss
279 1.1 augustss #define ESA_ASSP_CONTROL_C 0xA6
280 1.1 augustss #define ESA_ASSP_HOST_INT_ENABLE 0x01
281 1.1 augustss #define ESA_FM_ADDR_REMAP_DISABLE 0x02
282 1.1 augustss #define ESA_HOST_WRITE_PORT_ENABLE 0x08
283 1.1 augustss
284 1.1 augustss #define ESA_ASSP_HOST_INT_STATUS 0xAC
285 1.1 augustss #define ESA_DSP2HOST_REQ_PIORECORD 0x01
286 1.1 augustss #define ESA_DSP2HOST_REQ_I2SRATE 0x02
287 1.1 augustss #define ESA_DSP2HOST_REQ_TIMER 0x04
288 1.1 augustss
289 1.1 augustss /* AC97 registers */
290 1.1 augustss /* XXX fix this crap up */
291 1.1 augustss /*#define ESA_AC97_RESET 0x00*/
292 1.1 augustss
293 1.1 augustss #define ESA_AC97_VOL_MUTE_B 0x8000
294 1.1 augustss #define ESA_AC97_VOL_M 0x1F
295 1.1 augustss #define ESA_AC97_LEFT_VOL_S 8
296 1.1 augustss
297 1.1 augustss #define ESA_AC97_MASTER_VOL 0x02
298 1.1 augustss #define ESA_AC97_LINE_LEVEL_VOL 0x04
299 1.1 augustss #define ESA_AC97_MASTER_MONO_VOL 0x06
300 1.1 augustss #define ESA_AC97_PC_BEEP_VOL 0x0A
301 1.1 augustss #define ESA_AC97_PC_BEEP_VOL_M 0x0F
302 1.1 augustss #define ESA_AC97_SROUND_MASTER_VOL 0x38
303 1.1 augustss #define ESA_AC97_PC_BEEP_VOL_S 1
304 1.1 augustss
305 1.1 augustss /*#define ESA_AC97_PHONE_VOL 0x0C
306 1.1 augustss #define ESA_AC97_MIC_VOL 0x0E*/
307 1.1 augustss #define ESA_AC97_MIC_20DB_ENABLE 0x40
308 1.1 augustss
309 1.1 augustss /*#define ESA_AC97_LINEIN_VOL 0x10
310 1.1 augustss #define ESA_AC97_CD_VOL 0x12
311 1.1 augustss #define ESA_AC97_VIDEO_VOL 0x14
312 1.1 augustss #define ESA_AC97_AUX_VOL 0x16*/
313 1.1 augustss #define ESA_AC97_PCM_OUT_VOL 0x18
314 1.1 augustss /*#define ESA_AC97_RECORD_SELECT 0x1A*/
315 1.1 augustss #define ESA_AC97_RECORD_MIC 0x00
316 1.1 augustss #define ESA_AC97_RECORD_CD 0x01
317 1.1 augustss #define ESA_AC97_RECORD_VIDEO 0x02
318 1.1 augustss #define ESA_AC97_RECORD_AUX 0x03
319 1.1 augustss #define ESA_AC97_RECORD_MONO_MUX 0x02
320 1.1 augustss #define ESA_AC97_RECORD_DIGITAL 0x03
321 1.1 augustss #define ESA_AC97_RECORD_LINE 0x04
322 1.1 augustss #define ESA_AC97_RECORD_STEREO 0x05
323 1.1 augustss #define ESA_AC97_RECORD_MONO 0x06
324 1.1 augustss #define ESA_AC97_RECORD_PHONE 0x07
325 1.1 augustss
326 1.1 augustss /*#define ESA_AC97_RECORD_GAIN 0x1C*/
327 1.1 augustss #define ESA_AC97_RECORD_VOL_M 0x0F
328 1.1 augustss
329 1.1 augustss /*#define ESA_AC97_GENERAL_PURPOSE 0x20*/
330 1.1 augustss #define ESA_AC97_POWER_DOWN_CTRL 0x26
331 1.1 augustss #define ESA_AC97_ADC_READY 0x0001
332 1.1 augustss #define ESA_AC97_DAC_READY 0x0002
333 1.1 augustss #define ESA_AC97_ANALOG_READY 0x0004
334 1.1 augustss #define ESA_AC97_VREF_ON 0x0008
335 1.1 augustss #define ESA_AC97_PR0 0x0100
336 1.1 augustss #define ESA_AC97_PR1 0x0200
337 1.1 augustss #define ESA_AC97_PR2 0x0400
338 1.1 augustss #define ESA_AC97_PR3 0x0800
339 1.1 augustss #define ESA_AC97_PR4 0x1000
340 1.1 augustss
341 1.1 augustss #define ESA_AC97_RESERVED1 0x28
342 1.1 augustss
343 1.1 augustss #define ESA_AC97_VENDOR_TEST 0x5A
344 1.1 augustss
345 1.1 augustss #define ESA_AC97_CLOCK_DELAY 0x5C
346 1.1 augustss #define ESA_AC97_LINEOUT_MUX_SEL 0x0001
347 1.1 augustss #define ESA_AC97_MONO_MUX_SEL 0x0002
348 1.1 augustss #define ESA_AC97_CLOCK_DELAY_SEL 0x1F
349 1.1 augustss #define ESA_AC97_DAC_CDS_SHIFT 6
350 1.1 augustss #define ESA_AC97_ADC_CDS_SHIFT 11
351 1.1 augustss
352 1.1 augustss #define ESA_AC97_MULTI_CHANNEL_SEL 0x74
353 1.1 augustss
354 1.1 augustss /*#define ESA_AC97_VENDOR_ID1 0x7C
355 1.1 augustss #define ESA_AC97_VENDOR_ID2 0x7E*/
356 1.1 augustss
357 1.1 augustss /*
358 1.1 augustss * ASSP control regs
359 1.1 augustss */
360 1.1 augustss #define ESA_DSP_PORT_TIMER_COUNT 0x06
361 1.1 augustss
362 1.1 augustss #define ESA_DSP_PORT_MEMORY_INDEX 0x80
363 1.1 augustss
364 1.1 augustss #define ESA_DSP_PORT_MEMORY_TYPE 0x82
365 1.1 augustss #define ESA_MEMTYPE_INTERNAL_CODE 0x0002
366 1.1 augustss #define ESA_MEMTYPE_INTERNAL_DATA 0x0003
367 1.1 augustss #define ESA_MEMTYPE_MASK 0x0003
368 1.1 augustss
369 1.1 augustss #define ESA_DSP_PORT_MEMORY_DATA 0x84
370 1.1 augustss
371 1.1 augustss #define ESA_DSP_PORT_CONTROL_REG_A 0xA2
372 1.1 augustss #define ESA_DSP_PORT_CONTROL_REG_B 0xA4
373 1.1 augustss #define ESA_DSP_PORT_CONTROL_REG_C 0xA6
374 1.1 augustss
375 1.1 augustss #define ESA_REV_A_CODE_MEMORY_BEGIN 0x0000
376 1.1 augustss #define ESA_REV_A_CODE_MEMORY_END 0x0FFF
377 1.1 augustss #define ESA_REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040
378 1.1 augustss #define ESA_REV_A_CODE_MEMORY_LENGTH (REV_A_CODE_MEMORY_END - REV_A_CODE_MEMORY_BEGIN + 1)
379 1.1 augustss
380 1.1 augustss #define ESA_REV_B_CODE_MEMORY_BEGIN 0x0000
381 1.1 augustss #define ESA_REV_B_CODE_MEMORY_END 0x0BFF
382 1.1 augustss #define ESA_REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040
383 1.1 augustss #define ESA_REV_B_CODE_MEMORY_LENGTH (REV_B_CODE_MEMORY_END - REV_B_CODE_MEMORY_BEGIN + 1)
384 1.1 augustss
385 1.1 augustss #define ESA_REV_A_DATA_MEMORY_BEGIN 0x1000
386 1.1 augustss #define ESA_REV_A_DATA_MEMORY_END 0x2FFF
387 1.1 augustss #define ESA_REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080
388 1.1 augustss #define ESA_REV_A_DATA_MEMORY_LENGTH (REV_A_DATA_MEMORY_END - REV_A_DATA_MEMORY_BEGIN + 1)
389 1.1 augustss
390 1.1 augustss #define ESA_REV_B_DATA_MEMORY_BEGIN 0x1000
391 1.1 augustss #define ESA_REV_B_DATA_MEMORY_END 0x2BFF
392 1.1 augustss #define ESA_REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080
393 1.1 augustss #define ESA_REV_B_DATA_MEMORY_LENGTH (REV_B_DATA_MEMORY_END - REV_B_DATA_MEMORY_BEGIN + 1)
394 1.1 augustss
395 1.1 augustss
396 1.1 augustss #define ESA_NUM_UNITS_KERNEL_CODE 16
397 1.1 augustss #define ESA_NUM_UNITS_KERNEL_DATA 2
398 1.1 augustss
399 1.1 augustss #define ESA_NUM_UNITS_KERNEL_CODE_WITH_HSP 16
400 1.1 augustss #define ESA_NUM_UNITS_KERNEL_DATA_WITH_HSP 5
401 1.1 augustss
402 1.1 augustss /*
403 1.1 augustss * Kernel data layout
404 1.1 augustss */
405 1.1 augustss
406 1.1 augustss #define ESA_DP_SHIFT_COUNT 7
407 1.1 augustss
408 1.1 augustss #define ESA_KDATA_BASE_ADDR 0x1000
409 1.1 augustss #define ESA_KDATA_BASE_ADDR2 0x1080
410 1.1 augustss
411 1.1 augustss #define ESA_KDATA_TASK0 (ESA_KDATA_BASE_ADDR + 0x0000)
412 1.1 augustss #define ESA_KDATA_TASK1 (ESA_KDATA_BASE_ADDR + 0x0001)
413 1.1 augustss #define ESA_KDATA_TASK2 (ESA_KDATA_BASE_ADDR + 0x0002)
414 1.1 augustss #define ESA_KDATA_TASK3 (ESA_KDATA_BASE_ADDR + 0x0003)
415 1.1 augustss #define ESA_KDATA_TASK4 (ESA_KDATA_BASE_ADDR + 0x0004)
416 1.1 augustss #define ESA_KDATA_TASK5 (ESA_KDATA_BASE_ADDR + 0x0005)
417 1.1 augustss #define ESA_KDATA_TASK6 (ESA_KDATA_BASE_ADDR + 0x0006)
418 1.1 augustss #define ESA_KDATA_TASK7 (ESA_KDATA_BASE_ADDR + 0x0007)
419 1.1 augustss #define ESA_KDATA_TASK_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0008)
420 1.1 augustss
421 1.1 augustss #define ESA_KDATA_CURRENT_TASK (ESA_KDATA_BASE_ADDR + 0x0009)
422 1.1 augustss #define ESA_KDATA_TASK_SWITCH (ESA_KDATA_BASE_ADDR + 0x000A)
423 1.1 augustss
424 1.1 augustss #define ESA_KDATA_INSTANCE0_POS3D (ESA_KDATA_BASE_ADDR + 0x000B)
425 1.1 augustss #define ESA_KDATA_INSTANCE1_POS3D (ESA_KDATA_BASE_ADDR + 0x000C)
426 1.1 augustss #define ESA_KDATA_INSTANCE2_POS3D (ESA_KDATA_BASE_ADDR + 0x000D)
427 1.1 augustss #define ESA_KDATA_INSTANCE3_POS3D (ESA_KDATA_BASE_ADDR + 0x000E)
428 1.1 augustss #define ESA_KDATA_INSTANCE4_POS3D (ESA_KDATA_BASE_ADDR + 0x000F)
429 1.1 augustss #define ESA_KDATA_INSTANCE5_POS3D (ESA_KDATA_BASE_ADDR + 0x0010)
430 1.1 augustss #define ESA_KDATA_INSTANCE6_POS3D (ESA_KDATA_BASE_ADDR + 0x0011)
431 1.1 augustss #define ESA_KDATA_INSTANCE7_POS3D (ESA_KDATA_BASE_ADDR + 0x0012)
432 1.1 augustss #define ESA_KDATA_INSTANCE8_POS3D (ESA_KDATA_BASE_ADDR + 0x0013)
433 1.1 augustss #define ESA_KDATA_INSTANCE_POS3D_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0014)
434 1.1 augustss
435 1.1 augustss #define ESA_KDATA_INSTANCE0_SPKVIRT (ESA_KDATA_BASE_ADDR + 0x0015)
436 1.1 augustss #define ESA_KDATA_INSTANCE_SPKVIRT_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0016)
437 1.1 augustss
438 1.1 augustss #define ESA_KDATA_INSTANCE0_SPDIF (ESA_KDATA_BASE_ADDR + 0x0017)
439 1.1 augustss #define ESA_KDATA_INSTANCE_SPDIF_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0018)
440 1.1 augustss
441 1.1 augustss #define ESA_KDATA_INSTANCE0_MODEM (ESA_KDATA_BASE_ADDR + 0x0019)
442 1.1 augustss #define ESA_KDATA_INSTANCE_MODEM_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001A)
443 1.1 augustss
444 1.1 augustss #define ESA_KDATA_INSTANCE0_SRC (ESA_KDATA_BASE_ADDR + 0x001B)
445 1.1 augustss #define ESA_KDATA_INSTANCE1_SRC (ESA_KDATA_BASE_ADDR + 0x001C)
446 1.1 augustss #define ESA_KDATA_INSTANCE_SRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001D)
447 1.1 augustss
448 1.1 augustss #define ESA_KDATA_INSTANCE0_MINISRC (ESA_KDATA_BASE_ADDR + 0x001E)
449 1.1 augustss #define ESA_KDATA_INSTANCE1_MINISRC (ESA_KDATA_BASE_ADDR + 0x001F)
450 1.1 augustss #define ESA_KDATA_INSTANCE2_MINISRC (ESA_KDATA_BASE_ADDR + 0x0020)
451 1.1 augustss #define ESA_KDATA_INSTANCE3_MINISRC (ESA_KDATA_BASE_ADDR + 0x0021)
452 1.1 augustss #define ESA_KDATA_INSTANCE_MINISRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0022)
453 1.1 augustss
454 1.1 augustss #define ESA_KDATA_INSTANCE0_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0023)
455 1.1 augustss #define ESA_KDATA_INSTANCE1_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0024)
456 1.1 augustss #define ESA_KDATA_INSTANCE_CPYTHRU_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0025)
457 1.1 augustss
458 1.1 augustss #define ESA_KDATA_CURRENT_DMA (ESA_KDATA_BASE_ADDR + 0x0026)
459 1.1 augustss #define ESA_KDATA_DMA_SWITCH (ESA_KDATA_BASE_ADDR + 0x0027)
460 1.1 augustss #define ESA_KDATA_DMA_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0028)
461 1.1 augustss
462 1.1 augustss #define ESA_KDATA_DMA_XFER0 (ESA_KDATA_BASE_ADDR + 0x0029)
463 1.1 augustss #define ESA_KDATA_DMA_XFER1 (ESA_KDATA_BASE_ADDR + 0x002A)
464 1.1 augustss #define ESA_KDATA_DMA_XFER2 (ESA_KDATA_BASE_ADDR + 0x002B)
465 1.1 augustss #define ESA_KDATA_DMA_XFER3 (ESA_KDATA_BASE_ADDR + 0x002C)
466 1.1 augustss #define ESA_KDATA_DMA_XFER4 (ESA_KDATA_BASE_ADDR + 0x002D)
467 1.1 augustss #define ESA_KDATA_DMA_XFER5 (ESA_KDATA_BASE_ADDR + 0x002E)
468 1.1 augustss #define ESA_KDATA_DMA_XFER6 (ESA_KDATA_BASE_ADDR + 0x002F)
469 1.1 augustss #define ESA_KDATA_DMA_XFER7 (ESA_KDATA_BASE_ADDR + 0x0030)
470 1.1 augustss #define ESA_KDATA_DMA_XFER8 (ESA_KDATA_BASE_ADDR + 0x0031)
471 1.1 augustss #define ESA_KDATA_DMA_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0032)
472 1.1 augustss
473 1.1 augustss #define ESA_KDATA_I2S_SAMPLE_COUNT (ESA_KDATA_BASE_ADDR + 0x0033)
474 1.1 augustss #define ESA_KDATA_I2S_INT_METER (ESA_KDATA_BASE_ADDR + 0x0034)
475 1.1 augustss #define ESA_KDATA_I2S_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0035)
476 1.1 augustss
477 1.1 augustss #define ESA_KDATA_TIMER_COUNT_RELOAD (ESA_KDATA_BASE_ADDR + 0x0036)
478 1.1 augustss #define ESA_KDATA_TIMER_COUNT_CURRENT (ESA_KDATA_BASE_ADDR + 0x0037)
479 1.1 augustss
480 1.1 augustss #define ESA_KDATA_HALT_SYNCH_CLIENT (ESA_KDATA_BASE_ADDR + 0x0038)
481 1.1 augustss #define ESA_KDATA_HALT_SYNCH_DMA (ESA_KDATA_BASE_ADDR + 0x0039)
482 1.1 augustss #define ESA_KDATA_HALT_ACKNOWLEDGE (ESA_KDATA_BASE_ADDR + 0x003A)
483 1.1 augustss
484 1.1 augustss #define ESA_KDATA_ADC1_XFER0 (ESA_KDATA_BASE_ADDR + 0x003B)
485 1.1 augustss #define ESA_KDATA_ADC1_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x003C)
486 1.1 augustss #define ESA_KDATA_ADC1_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003D)
487 1.1 augustss #define ESA_KDATA_ADC1_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003E)
488 1.1 augustss #define ESA_KDATA_ADC1_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x003F)
489 1.1 augustss #define ESA_KDATA_ADC1_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0040)
490 1.1 augustss
491 1.1 augustss #define ESA_KDATA_ADC2_XFER0 (ESA_KDATA_BASE_ADDR + 0x0041)
492 1.1 augustss #define ESA_KDATA_ADC2_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0042)
493 1.1 augustss #define ESA_KDATA_ADC2_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0043)
494 1.1 augustss #define ESA_KDATA_ADC2_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0044)
495 1.1 augustss #define ESA_KDATA_ADC2_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0045)
496 1.1 augustss #define ESA_KDATA_ADC2_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0046)
497 1.1 augustss
498 1.1 augustss #define ESA_KDATA_CD_XFER0 (ESA_KDATA_BASE_ADDR + 0x0047)
499 1.1 augustss #define ESA_KDATA_CD_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0048)
500 1.1 augustss #define ESA_KDATA_CD_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0049)
501 1.1 augustss #define ESA_KDATA_CD_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x004A)
502 1.1 augustss #define ESA_KDATA_CD_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004B)
503 1.1 augustss #define ESA_KDATA_CD_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004C)
504 1.1 augustss
505 1.1 augustss #define ESA_KDATA_MIC_XFER0 (ESA_KDATA_BASE_ADDR + 0x004D)
506 1.1 augustss #define ESA_KDATA_MIC_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x004E)
507 1.1 augustss #define ESA_KDATA_MIC_VOLUME (ESA_KDATA_BASE_ADDR + 0x004F)
508 1.1 augustss #define ESA_KDATA_MIC_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0050)
509 1.1 augustss
510 1.1 augustss #define ESA_KDATA_I2S_XFER0 (ESA_KDATA_BASE_ADDR + 0x0051)
511 1.1 augustss #define ESA_KDATA_I2S_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0052)
512 1.1 augustss
513 1.1 augustss #define ESA_KDATA_CHI_XFER0 (ESA_KDATA_BASE_ADDR + 0x0053)
514 1.1 augustss #define ESA_KDATA_CHI_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0054)
515 1.1 augustss
516 1.1 augustss #define ESA_KDATA_SPDIF_XFER (ESA_KDATA_BASE_ADDR + 0x0055)
517 1.1 augustss #define ESA_KDATA_SPDIF_CURRENT_FRAME (ESA_KDATA_BASE_ADDR + 0x0056)
518 1.1 augustss #define ESA_KDATA_SPDIF_FRAME0 (ESA_KDATA_BASE_ADDR + 0x0057)
519 1.1 augustss #define ESA_KDATA_SPDIF_FRAME1 (ESA_KDATA_BASE_ADDR + 0x0058)
520 1.1 augustss #define ESA_KDATA_SPDIF_FRAME2 (ESA_KDATA_BASE_ADDR + 0x0059)
521 1.1 augustss
522 1.1 augustss #define ESA_KDATA_SPDIF_REQUEST (ESA_KDATA_BASE_ADDR + 0x005A)
523 1.1 augustss #define ESA_KDATA_SPDIF_TEMP (ESA_KDATA_BASE_ADDR + 0x005B)
524 1.1 augustss
525 1.1 augustss #define ESA_KDATA_SPDIFIN_XFER0 (ESA_KDATA_BASE_ADDR + 0x005C)
526 1.1 augustss #define ESA_KDATA_SPDIFIN_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x005D)
527 1.1 augustss #define ESA_KDATA_SPDIFIN_INT_METER (ESA_KDATA_BASE_ADDR + 0x005E)
528 1.1 augustss
529 1.1 augustss #define ESA_KDATA_DSP_RESET_COUNT (ESA_KDATA_BASE_ADDR + 0x005F)
530 1.1 augustss #define ESA_KDATA_DEBUG_OUTPUT (ESA_KDATA_BASE_ADDR + 0x0060)
531 1.1 augustss
532 1.1 augustss #define ESA_KDATA_KERNEL_ISR_LIST (ESA_KDATA_BASE_ADDR + 0x0061)
533 1.1 augustss
534 1.1 augustss #define ESA_KDATA_KERNEL_ISR_CBSR1 (ESA_KDATA_BASE_ADDR + 0x0062)
535 1.1 augustss #define ESA_KDATA_KERNEL_ISR_CBER1 (ESA_KDATA_BASE_ADDR + 0x0063)
536 1.1 augustss #define ESA_KDATA_KERNEL_ISR_CBCR (ESA_KDATA_BASE_ADDR + 0x0064)
537 1.1 augustss #define ESA_KDATA_KERNEL_ISR_AR0 (ESA_KDATA_BASE_ADDR + 0x0065)
538 1.1 augustss #define ESA_KDATA_KERNEL_ISR_AR1 (ESA_KDATA_BASE_ADDR + 0x0066)
539 1.1 augustss #define ESA_KDATA_KERNEL_ISR_AR2 (ESA_KDATA_BASE_ADDR + 0x0067)
540 1.1 augustss #define ESA_KDATA_KERNEL_ISR_AR3 (ESA_KDATA_BASE_ADDR + 0x0068)
541 1.1 augustss #define ESA_KDATA_KERNEL_ISR_AR4 (ESA_KDATA_BASE_ADDR + 0x0069)
542 1.1 augustss #define ESA_KDATA_KERNEL_ISR_AR5 (ESA_KDATA_BASE_ADDR + 0x006A)
543 1.1 augustss #define ESA_KDATA_KERNEL_ISR_BRCR (ESA_KDATA_BASE_ADDR + 0x006B)
544 1.1 augustss #define ESA_KDATA_KERNEL_ISR_PASR (ESA_KDATA_BASE_ADDR + 0x006C)
545 1.1 augustss #define ESA_KDATA_KERNEL_ISR_PAER (ESA_KDATA_BASE_ADDR + 0x006D)
546 1.1 augustss
547 1.1 augustss #define ESA_KDATA_CLIENT_SCRATCH0 (ESA_KDATA_BASE_ADDR + 0x006E)
548 1.1 augustss #define ESA_KDATA_CLIENT_SCRATCH1 (ESA_KDATA_BASE_ADDR + 0x006F)
549 1.1 augustss #define ESA_KDATA_KERNEL_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0070)
550 1.1 augustss #define ESA_KDATA_KERNEL_ISR_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0071)
551 1.1 augustss
552 1.1 augustss #define ESA_KDATA_OUEUE_LEFT (ESA_KDATA_BASE_ADDR + 0x0072)
553 1.1 augustss #define ESA_KDATA_QUEUE_RIGHT (ESA_KDATA_BASE_ADDR + 0x0073)
554 1.1 augustss
555 1.1 augustss #define ESA_KDATA_ADC1_REQUEST (ESA_KDATA_BASE_ADDR + 0x0074)
556 1.1 augustss #define ESA_KDATA_ADC2_REQUEST (ESA_KDATA_BASE_ADDR + 0x0075)
557 1.1 augustss #define ESA_KDATA_CD_REQUEST (ESA_KDATA_BASE_ADDR + 0x0076)
558 1.1 augustss #define ESA_KDATA_MIC_REQUEST (ESA_KDATA_BASE_ADDR + 0x0077)
559 1.1 augustss
560 1.1 augustss #define ESA_KDATA_ADC1_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0078)
561 1.1 augustss #define ESA_KDATA_ADC2_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0079)
562 1.1 augustss #define ESA_KDATA_CD_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007A)
563 1.1 augustss #define ESA_KDATA_MIC_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007B)
564 1.1 augustss #define ESA_KDATA_MIC_SYNC_COUNTER (ESA_KDATA_BASE_ADDR + 0x007C)
565 1.1 augustss
566 1.1 augustss /*
567 1.1 augustss * second 'segment' (?) reserved for mixer
568 1.1 augustss * buffers..
569 1.1 augustss */
570 1.1 augustss
571 1.1 augustss #define ESA_KDATA_MIXER_WORD0 (ESA_KDATA_BASE_ADDR2 + 0x0000)
572 1.1 augustss #define ESA_KDATA_MIXER_WORD1 (ESA_KDATA_BASE_ADDR2 + 0x0001)
573 1.1 augustss #define ESA_KDATA_MIXER_WORD2 (ESA_KDATA_BASE_ADDR2 + 0x0002)
574 1.1 augustss #define ESA_KDATA_MIXER_WORD3 (ESA_KDATA_BASE_ADDR2 + 0x0003)
575 1.1 augustss #define ESA_KDATA_MIXER_WORD4 (ESA_KDATA_BASE_ADDR2 + 0x0004)
576 1.1 augustss #define ESA_KDATA_MIXER_WORD5 (ESA_KDATA_BASE_ADDR2 + 0x0005)
577 1.1 augustss #define ESA_KDATA_MIXER_WORD6 (ESA_KDATA_BASE_ADDR2 + 0x0006)
578 1.1 augustss #define ESA_KDATA_MIXER_WORD7 (ESA_KDATA_BASE_ADDR2 + 0x0007)
579 1.1 augustss #define ESA_KDATA_MIXER_WORD8 (ESA_KDATA_BASE_ADDR2 + 0x0008)
580 1.1 augustss #define ESA_KDATA_MIXER_WORD9 (ESA_KDATA_BASE_ADDR2 + 0x0009)
581 1.1 augustss #define ESA_KDATA_MIXER_WORDA (ESA_KDATA_BASE_ADDR2 + 0x000A)
582 1.1 augustss #define ESA_KDATA_MIXER_WORDB (ESA_KDATA_BASE_ADDR2 + 0x000B)
583 1.1 augustss #define ESA_KDATA_MIXER_WORDC (ESA_KDATA_BASE_ADDR2 + 0x000C)
584 1.1 augustss #define ESA_KDATA_MIXER_WORDD (ESA_KDATA_BASE_ADDR2 + 0x000D)
585 1.1 augustss #define ESA_KDATA_MIXER_WORDE (ESA_KDATA_BASE_ADDR2 + 0x000E)
586 1.1 augustss #define ESA_KDATA_MIXER_WORDF (ESA_KDATA_BASE_ADDR2 + 0x000F)
587 1.1 augustss
588 1.1 augustss #define ESA_KDATA_MIXER_XFER0 (ESA_KDATA_BASE_ADDR2 + 0x0010)
589 1.1 augustss #define ESA_KDATA_MIXER_XFER1 (ESA_KDATA_BASE_ADDR2 + 0x0011)
590 1.1 augustss #define ESA_KDATA_MIXER_XFER2 (ESA_KDATA_BASE_ADDR2 + 0x0012)
591 1.1 augustss #define ESA_KDATA_MIXER_XFER3 (ESA_KDATA_BASE_ADDR2 + 0x0013)
592 1.1 augustss #define ESA_KDATA_MIXER_XFER4 (ESA_KDATA_BASE_ADDR2 + 0x0014)
593 1.1 augustss #define ESA_KDATA_MIXER_XFER5 (ESA_KDATA_BASE_ADDR2 + 0x0015)
594 1.1 augustss #define ESA_KDATA_MIXER_XFER6 (ESA_KDATA_BASE_ADDR2 + 0x0016)
595 1.1 augustss #define ESA_KDATA_MIXER_XFER7 (ESA_KDATA_BASE_ADDR2 + 0x0017)
596 1.1 augustss #define ESA_KDATA_MIXER_XFER8 (ESA_KDATA_BASE_ADDR2 + 0x0018)
597 1.1 augustss #define ESA_KDATA_MIXER_XFER9 (ESA_KDATA_BASE_ADDR2 + 0x0019)
598 1.1 augustss #define ESA_KDATA_MIXER_XFER_ENDMARK (ESA_KDATA_BASE_ADDR2 + 0x001A)
599 1.1 augustss
600 1.1 augustss #define ESA_KDATA_MIXER_TASK_NUMBER (ESA_KDATA_BASE_ADDR2 + 0x001B)
601 1.1 augustss #define ESA_KDATA_CURRENT_MIXER (ESA_KDATA_BASE_ADDR2 + 0x001C)
602 1.1 augustss #define ESA_KDATA_MIXER_ACTIVE (ESA_KDATA_BASE_ADDR2 + 0x001D)
603 1.1 augustss #define ESA_KDATA_MIXER_BANK_STATUS (ESA_KDATA_BASE_ADDR2 + 0x001E)
604 1.1 augustss #define ESA_KDATA_DAC_LEFT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x001F)
605 1.1 augustss #define ESA_KDATA_DAC_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x0020)
606 1.1 augustss
607 1.1 augustss #define ESA_MAX_INSTANCE_MINISRC (ESA_KDATA_INSTANCE_MINISRC_ENDMARK - KDATA_INSTANCE0_MINISRC)
608 1.1 augustss #define ESA_MAX_VIRTUAL_DMA_CHANNELS (ESA_KDATA_DMA_XFER_ENDMARK - KDATA_DMA_XFER0)
609 1.1 augustss #define ESA_MAX_VIRTUAL_MIXER_CHANNELS (ESA_KDATA_MIXER_XFER_ENDMARK - KDATA_MIXER_XFER0)
610 1.1 augustss #define ESA_MAX_VIRTUAL_ADC1_CHANNELS (ESA_KDATA_ADC1_XFER_ENDMARK - KDATA_ADC1_XFER0)
611 1.1 augustss
612 1.1 augustss /*
613 1.1 augustss * client data area offsets
614 1.1 augustss */
615 1.1 augustss #define ESA_CDATA_INSTANCE_READY 0x00
616 1.1 augustss
617 1.1 augustss #define ESA_CDATA_HOST_SRC_ADDRL 0x01
618 1.1 augustss #define ESA_CDATA_HOST_SRC_ADDRH 0x02
619 1.1 augustss #define ESA_CDATA_HOST_SRC_END_PLUS_1L 0x03
620 1.1 augustss #define ESA_CDATA_HOST_SRC_END_PLUS_1H 0x04
621 1.1 augustss #define ESA_CDATA_HOST_SRC_CURRENTL 0x05
622 1.1 augustss #define ESA_CDATA_HOST_SRC_CURRENTH 0x06
623 1.1 augustss
624 1.1 augustss #define ESA_CDATA_IN_BUF_CONNECT 0x07
625 1.1 augustss #define ESA_CDATA_OUT_BUF_CONNECT 0x08
626 1.1 augustss
627 1.1 augustss #define ESA_CDATA_IN_BUF_BEGIN 0x09
628 1.1 augustss #define ESA_CDATA_IN_BUF_END_PLUS_1 0x0A
629 1.1 augustss #define ESA_CDATA_IN_BUF_HEAD 0x0B
630 1.1 augustss #define ESA_CDATA_IN_BUF_TAIL 0x0C
631 1.1 augustss #define ESA_CDATA_OUT_BUF_BEGIN 0x0D
632 1.1 augustss #define ESA_CDATA_OUT_BUF_END_PLUS_1 0x0E
633 1.1 augustss #define ESA_CDATA_OUT_BUF_HEAD 0x0F
634 1.1 augustss #define ESA_CDATA_OUT_BUF_TAIL 0x10
635 1.1 augustss
636 1.1 augustss #define ESA_CDATA_DMA_CONTROL 0x11
637 1.1 augustss #define ESA_CDATA_RESERVED 0x12
638 1.1 augustss
639 1.1 augustss #define ESA_CDATA_FREQUENCY 0x13
640 1.1 augustss #define ESA_CDATA_LEFT_VOLUME 0x14
641 1.1 augustss #define ESA_CDATA_RIGHT_VOLUME 0x15
642 1.1 augustss #define ESA_CDATA_LEFT_SUR_VOL 0x16
643 1.1 augustss #define ESA_CDATA_RIGHT_SUR_VOL 0x17
644 1.1 augustss
645 1.1 augustss #define ESA_CDATA_HEADER_LEN 0x18
646 1.1 augustss
647 1.1 augustss #define ESA_SRC3_DIRECTION_OFFSET ESA_CDATA_HEADER_LEN
648 1.1 augustss #define ESA_SRC3_MODE_OFFSET (ESA_CDATA_HEADER_LEN + 1)
649 1.1 augustss #define ESA_SRC3_WORD_LENGTH_OFFSET (ESA_CDATA_HEADER_LEN + 2)
650 1.1 augustss #define ESA_SRC3_PARAMETER_OFFSET (ESA_CDATA_HEADER_LEN + 3)
651 1.1 augustss #define ESA_SRC3_COEFF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 8)
652 1.1 augustss #define ESA_SRC3_FILTAP_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 10)
653 1.1 augustss #define ESA_SRC3_TEMP_INBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 16)
654 1.1 augustss #define ESA_SRC3_TEMP_OUTBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 17)
655 1.1 augustss
656 1.1 augustss #define ESA_MINISRC_IN_BUFFER_SIZE (0x50 * 2)
657 1.1 augustss #define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2)
658 1.1 augustss #define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2)
659 1.1 augustss #define ESA_MINISRC_TMP_BUFFER_SIZE (112 + (ESA_MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2)
660 1.1 augustss #define ESA_MINISRC_BIQUAD_STAGE 2
661 1.1 augustss #define ESA_MINISRC_COEF_LOC 0x175
662 1.1 augustss
663 1.1 augustss #define ESA_DMACONTROL_BLOCK_MASK 0x000F
664 1.1 augustss #define ESA_DMAC_BLOCK0_SELECTOR 0x0000
665 1.1 augustss #define ESA_DMAC_BLOCK1_SELECTOR 0x0001
666 1.1 augustss #define ESA_DMAC_BLOCK2_SELECTOR 0x0002
667 1.1 augustss #define ESA_DMAC_BLOCK3_SELECTOR 0x0003
668 1.1 augustss #define ESA_DMAC_BLOCK4_SELECTOR 0x0004
669 1.1 augustss #define ESA_DMAC_BLOCK5_SELECTOR 0x0005
670 1.1 augustss #define ESA_DMAC_BLOCK6_SELECTOR 0x0006
671 1.1 augustss #define ESA_DMAC_BLOCK7_SELECTOR 0x0007
672 1.1 augustss #define ESA_DMAC_BLOCK8_SELECTOR 0x0008
673 1.1 augustss #define ESA_DMAC_BLOCK9_SELECTOR 0x0009
674 1.1 augustss #define ESA_DMAC_BLOCKA_SELECTOR 0x000A
675 1.1 augustss #define ESA_DMAC_BLOCKB_SELECTOR 0x000B
676 1.1 augustss #define ESA_DMAC_BLOCKC_SELECTOR 0x000C
677 1.1 augustss #define ESA_DMAC_BLOCKD_SELECTOR 0x000D
678 1.1 augustss #define ESA_DMAC_BLOCKE_SELECTOR 0x000E
679 1.1 augustss #define ESA_DMAC_BLOCKF_SELECTOR 0x000F
680 1.1 augustss #define ESA_DMACONTROL_PAGE_MASK 0x00F0
681 1.1 augustss #define ESA_DMAC_PAGE0_SELECTOR 0x0030
682 1.1 augustss #define ESA_DMAC_PAGE1_SELECTOR 0x0020
683 1.1 augustss #define ESA_DMAC_PAGE2_SELECTOR 0x0010
684 1.1 augustss #define ESA_DMAC_PAGE3_SELECTOR 0x0000
685 1.1 augustss #define ESA_DMACONTROL_AUTOREPEAT 0x1000
686 1.1 augustss #define ESA_DMACONTROL_STOPPED 0x2000
687 1.1 augustss #define ESA_DMACONTROL_DIRECTION 0x0100
688