esareg.h revision 1.1 1 /* $NetBSD: esareg.h,v 1.1 2002/01/06 15:17:29 augustss Exp $ */
2
3 /*
4 * Copyright (c) 2002 Lennart Augustsson
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 /*
32 * ESS Allegro-1 / Maestro3 Audio Driver
33 *
34 * Lots of magic based on the FreeBSD maestro3 driver and
35 * reverse engineering.
36 *
37 */
38
39 /* Allegro PCI configuration registers */
40 #define PCI_LEGACY_AUDIO_CTRL 0x40
41 #define DISABLE_LEGACY 0x00008000
42
43 #define ESA_PCI_ALLEGRO_CONFIG 0x50
44 #define ESA_SB_ADDR_240 0x00000004
45 #define ESA_MPU_ADDR_MASK 0x00000018
46 #define ESA_MPU_ADDR_330 0x00000000
47 #define ESA_MPU_ADDR_300 0x00000008
48 #define ESA_MPU_ADDR_320 0x00000010
49 #define ESA_MPU_ADDR_340 0x00000018
50 #define ESA_USE_PCI_TIMING 0x00000040
51 #define ESA_POSTED_WRITE_ENABLE 0x00000080
52 #define ESA_DMA_POLICY_MASK 0x00000700
53 #define ESA_DMA_DDMA 0x00000000
54 #define ESA_DMA_TDMA 0x00000100
55 #define ESA_DMA_PCPCI 0x00000200
56 #define ESA_DMA_WBDMA16 0x00000400
57 #define ESA_DMA_WBDMA4 0x00000500
58 #define ESA_DMA_WBDMA2 0x00000600
59 #define ESA_DMA_WBDMA1 0x00000700
60 #define ESA_DMA_SAFE_GUARD 0x00000800
61 #define ESA_HI_PERF_GP_ENABLE 0x00001000
62 #define ESA_PIC_SNOOP_MODE_0 0x00002000
63 #define ESA_PIC_SNOOP_MODE_1 0x00004000
64 #define ESA_SOUNDBLASTER_IRQ_MASK 0x00008000
65 #define ESA_RING_IN_ENABLE 0x00010000
66 #define ESA_SPDIF_TEST_MODE 0x00020000
67 #define ESA_CLK_MULT_MODE_SELECT_2 0x00040000
68 #define ESA_EEPROM_WRITE_ENABLE 0x00080000
69 #define ESA_CODEC_DIR_IN 0x00100000
70 #define ESA_HV_BUTTON_FROM_GD 0x00200000
71 #define ESA_REDUCED_DEBOUNCE 0x00400000
72 #define ESA_HV_CTRL_ENABLE 0x00800000
73 #define ESA_SPDIF_ENABLE 0x01000000
74 #define ESA_CLK_DIV_SELECT 0x06000000
75 #define ESA_CLK_DIV_BY_48 0x00000000
76 #define ESA_CLK_DIV_BY_49 0x02000000
77 #define ESA_CLK_DIV_BY_50 0x04000000
78 #define ESA_CLK_DIV_RESERVED 0x06000000
79 #define ESA_PM_CTRL_ENABLE 0x08000000
80 #define ESA_CLK_MULT_MODE_SELECT 0x30000000
81 #define ESA_CLK_MULT_MODE_SHIFT 28
82 #define ESA_CLK_MULT_MODE_0 0x00000000
83 #define ESA_CLK_MULT_MODE_1 0x10000000
84 #define ESA_CLK_MULT_MODE_2 0x20000000
85 #define ESA_CLK_MULT_MODE_3 0x30000000
86 #define ESA_INT_CLK_SELECT 0x40000000
87 #define ESA_INT_CLK_MULT_RESET 0x80000000
88
89 /* M3 */
90 #define ESA_INT_CLK_SRC_NOT_PCI 0x00100000
91 #define ESA_INT_CLK_MULT_ENABLE 0x80000000
92
93 #define ESA_PCI_ACPI_CONTROL 0x54
94 #define ESA_PCI_ACPI_D0 0x00000000
95 #define ESA_PCI_ACPI_D1 0xB4F70000
96 #define ESA_PCI_ACPI_D2 0xB4F7B4F7
97
98 #define ESA_PCI_USER_CONFIG 0x58
99 #define ESA_EXT_PCI_MASTER_ENABLE 0x00000001
100 #define ESA_SPDIF_OUT_SELECT 0x00000002
101 #define ESA_TEST_PIN_DIR_CTRL 0x00000004
102 #define ESA_AC97_CODEC_TEST 0x00000020
103 #define ESA_TRI_STATE_BUFFER 0x00000080
104 #define ESA_IN_CLK_12MHZ_SELECT 0x00000100
105 #define ESA_MULTI_FUNC_DISABLE 0x00000200
106 #define ESA_EXT_MASTER_PAIR_SEL 0x00000400
107 #define ESA_PCI_MASTER_SUPPORT 0x00000800
108 #define ESA_STOP_CLOCK_ENABLE 0x00001000
109 #define ESA_EAPD_DRIVE_ENABLE 0x00002000
110 #define ESA_REQ_TRI_STATE_ENABLE 0x00004000
111 #define ESA_REQ_LOW_ENABLE 0x00008000
112 #define ESA_MIDI_1_ENABLE 0x00010000
113 #define ESA_MIDI_2_ENABLE 0x00020000
114 #define ESA_SB_AUDIO_SYNC 0x00040000
115 #define ESA_HV_CTRL_TEST 0x00100000
116 #define ESA_SOUNDBLASTER_TEST 0x00400000
117
118 #define ESA_PCI_USER_CONFIG_C 0x5C
119
120 #define ESA_PCI_DDMA_CTRL 0x60
121 #define ESA_DDMA_ENABLE 0x00000001
122
123
124 /* Allegro registers */
125 #define ESA_HOST_INT_CTRL 0x18
126 #define ESA_SB_INT_ENABLE 0x0001
127 #define ESA_MPU401_INT_ENABLE 0x0002
128 #define ESA_ASSP_INT_ENABLE 0x0010
129 #define ESA_RING_INT_ENABLE 0x0020
130 #define ESA_HV_INT_ENABLE 0x0040
131 #define ESA_CLKRUN_GEN_ENABLE 0x0100
132 #define ESA_HV_CTRL_TO_PME 0x0400
133 #define ESA_SOFTWARE_RESET_ENABLE 0x8000
134
135 /*
136 * should be using the above defines, probably.
137 */
138 #define ESA_REGB_ENABLE_RESET 0x01
139 #define ESA_REGB_STOP_CLOCK 0x10
140
141 #define ESA_HOST_INT_STATUS 0x1A
142 #define ESA_SB_INT_PENDING 0x01
143 #define ESA_MPU401_INT_PENDING 0x02
144 #define ESA_ASSP_INT_PENDING 0x10
145 #define ESA_RING_INT_PENDING 0x20
146 #define ESA_HV_INT_PENDING 0x40
147
148 #define ESA_HARDWARE_VOL_CTRL 0x1B
149 #define ESA_SHADOW_MIX_REG_VOICE 0x1C
150 #define ESA_HW_VOL_COUNTER_VOICE 0x1D
151 #define ESA_SHADOW_MIX_REG_MASTER 0x1E
152 #define ESA_HW_VOL_COUNTER_MASTER 0x1F
153
154 #define ESA_CODEC_COMMAND 0x30
155 #define ESA_CODEC_READ_B 0x80
156
157 #define ESA_CODEC_STATUS 0x30
158 #define ESA_CODEC_BUSY_B 0x01
159
160 #define ESA_CODEC_DATA 0x32
161
162 #define ESA_RING_BUS_CTRL_A 0x36
163 #define ESA_RAC_PME_ENABLE 0x0100
164 #define ESA_RAC_SDFS_ENABLE 0x0200
165 #define ESA_LAC_PME_ENABLE 0x0400
166 #define ESA_LAC_SDFS_ENABLE 0x0800
167 #define ESA_SERIAL_AC_LINK_ENABLE 0x1000
168 #define ESA_IO_SRAM_ENABLE 0x2000
169 #define ESA_IIS_INPUT_ENABLE 0x8000
170
171 #define ESA_RING_BUS_CTRL_B 0x38
172 #define ESA_SECOND_CODEC_ID_MASK 0x0003
173 #define ESA_SPDIF_FUNC_ENABLE 0x0010
174 #define ESA_SECOND_AC_ENABLE 0x0020
175 #define ESA_SB_MODULE_INTF_ENABLE 0x0040
176 #define ESA_SSPE_ENABLE 0x0040
177 #define ESA_M3I_DOCK_ENABLE 0x0080
178
179 #define ESA_SDO_OUT_DEST_CTRL 0x3A
180 #define ESA_COMMAND_ADDR_OUT 0x0003
181 #define ESA_PCM_LR_OUT_LOCAL 0x0000
182 #define ESA_PCM_LR_OUT_REMOTE 0x0004
183 #define ESA_PCM_LR_OUT_MUTE 0x0008
184 #define ESA_PCM_LR_OUT_BOTH 0x000C
185 #define ESA_LINE1_DAC_OUT_LOCAL 0x0000
186 #define ESA_LINE1_DAC_OUT_REMOTE 0x0010
187 #define ESA_LINE1_DAC_OUT_MUTE 0x0020
188 #define ESA_LINE1_DAC_OUT_BOTH 0x0030
189 #define ESA_PCM_CLS_OUT_LOCAL 0x0000
190 #define ESA_PCM_CLS_OUT_REMOTE 0x0040
191 #define ESA_PCM_CLS_OUT_MUTE 0x0080
192 #define ESA_PCM_CLS_OUT_BOTH 0x00C0
193 #define ESA_PCM_RLF_OUT_LOCAL 0x0000
194 #define ESA_PCM_RLF_OUT_REMOTE 0x0100
195 #define ESA_PCM_RLF_OUT_MUTE 0x0200
196 #define ESA_PCM_RLF_OUT_BOTH 0x0300
197 #define ESA_LINE2_DAC_OUT_LOCAL 0x0000
198 #define ESA_LINE2_DAC_OUT_REMOTE 0x0400
199 #define ESA_LINE2_DAC_OUT_MUTE 0x0800
200 #define ESA_LINE2_DAC_OUT_BOTH 0x0C00
201 #define ESA_HANDSET_OUT_LOCAL 0x0000
202 #define ESA_HANDSET_OUT_REMOTE 0x1000
203 #define ESA_HANDSET_OUT_MUTE 0x2000
204 #define ESA_HANDSET_OUT_BOTH 0x3000
205 #define ESA_IO_CTRL_OUT_LOCAL 0x0000
206 #define ESA_IO_CTRL_OUT_REMOTE 0x4000
207 #define ESA_IO_CTRL_OUT_MUTE 0x8000
208 #define ESA_IO_CTRL_OUT_BOTH 0xC000
209
210 #define ESA_SDO_IN_DEST_CTRL 0x3C
211 #define ESA_STATUS_ADDR_IN 0x0003
212 #define ESA_PCM_LR_IN_LOCAL 0x0000
213 #define ESA_PCM_LR_IN_REMOTE 0x0004
214 #define ESA_PCM_LR_RESERVED 0x0008
215 #define ESA_PCM_LR_IN_BOTH 0x000C
216 #define ESA_LINE1_ADC_IN_LOCAL 0x0000
217 #define ESA_LINE1_ADC_IN_REMOTE 0x0010
218 #define ESA_LINE1_ADC_IN_MUTE 0x0020
219 #define ESA_MIC_ADC_IN_LOCAL 0x0000
220 #define ESA_MIC_ADC_IN_REMOTE 0x0040
221 #define ESA_MIC_ADC_IN_MUTE 0x0080
222 #define ESA_LINE2_DAC_IN_LOCAL 0x0000
223 #define ESA_LINE2_DAC_IN_REMOTE 0x0400
224 #define ESA_LINE2_DAC_IN_MUTE 0x0800
225 #define ESA_HANDSET_IN_LOCAL 0x0000
226 #define ESA_HANDSET_IN_REMOTE 0x1000
227 #define ESA_HANDSET_IN_MUTE 0x2000
228 #define ESA_IO_STATUS_IN_LOCAL 0x0000
229 #define ESA_IO_STATUS_IN_REMOTE 0x4000
230
231 #define ESA_SPDIF_IN_CTRL 0x3E
232 #define ESA_SPDIF_IN_ENABLE 0x0001
233
234 #define ESA_GPIO_DATA 0x60
235 #define ESA_GPIO_DATA_MASK 0x0FFF
236 #define ESA_GPIO_HV_STATUS 0x3000
237 #define ESA_GPIO_PME_STATUS 0x4000
238
239 #define ESA_GPIO_MASK 0x64
240 #define ESA_GPIO_DIRECTION 0x68
241 #define ESA_GPO_PRIMARY_AC97 0x0001
242 #define ESA_GPI_LINEOUT_SENSE 0x0004
243 #define ESA_GPO_SECONDARY_AC97 0x0008
244 #define ESA_GPI_VOL_DOWN 0x0010
245 #define ESA_GPI_VOL_UP 0x0020
246 #define ESA_GPI_IIS_CLK 0x0040
247 #define ESA_GPI_IIS_LRCLK 0x0080
248 #define ESA_GPI_IIS_DATA 0x0100
249 #define ESA_GPI_DOCKING_STATUS 0x0100
250 #define ESA_GPI_HEADPHONE_SENSE 0x0200
251 #define ESA_GPO_EXT_AMP_SHUTDOWN 0x1000
252
253 /* M3 */
254 #define ESA_GPO_M3_EXT_AMP_SHUTDN 0x0002
255
256 #define ESA_ASSP_INDEX_PORT 0x80
257 #define ESA_ASSP_MEMORY_PORT 0x82
258 #define ESA_ASSP_DATA_PORT 0x84
259
260 #define ESA_MPU401_DATA_PORT 0x98
261 #define ESA_MPU401_STATUS_PORT 0x99
262
263 #define ESA_CLK_MULT_DATA_PORT 0x9C
264
265 #define ESA_ASSP_CONTROL_A 0xA2
266 #define ESA_ASSP_0_WS_ENABLE 0x01
267 #define ESA_ASSP_CTRL_A_RESERVED1 0x02
268 #define ESA_ASSP_CTRL_A_RESERVED2 0x04
269 #define ESA_ASSP_CLK_49MHZ_SELECT 0x08
270 #define ESA_FAST_PLU_ENABLE 0x10
271 #define ESA_ASSP_CTRL_A_RESERVED3 0x20
272 #define ESA_DSP_CLK_36MHZ_SELECT 0x40
273
274 #define ESA_ASSP_CONTROL_B 0xA4
275 #define ESA_RESET_ASSP 0x00
276 #define ESA_RUN_ASSP 0x01
277 #define ESA_ENABLE_ASSP_CLOCK 0x00
278 #define ESA_STOP_ASSP_CLOCK 0x10
279 #define ESA_RESET_TOGGLE 0x40
280
281 #define ESA_ASSP_CONTROL_C 0xA6
282 #define ESA_ASSP_HOST_INT_ENABLE 0x01
283 #define ESA_FM_ADDR_REMAP_DISABLE 0x02
284 #define ESA_HOST_WRITE_PORT_ENABLE 0x08
285
286 #define ESA_ASSP_HOST_INT_STATUS 0xAC
287 #define ESA_DSP2HOST_REQ_PIORECORD 0x01
288 #define ESA_DSP2HOST_REQ_I2SRATE 0x02
289 #define ESA_DSP2HOST_REQ_TIMER 0x04
290
291 /* AC97 registers */
292 /* XXX fix this crap up */
293 /*#define ESA_AC97_RESET 0x00*/
294
295 #define ESA_AC97_VOL_MUTE_B 0x8000
296 #define ESA_AC97_VOL_M 0x1F
297 #define ESA_AC97_LEFT_VOL_S 8
298
299 #define ESA_AC97_MASTER_VOL 0x02
300 #define ESA_AC97_LINE_LEVEL_VOL 0x04
301 #define ESA_AC97_MASTER_MONO_VOL 0x06
302 #define ESA_AC97_PC_BEEP_VOL 0x0A
303 #define ESA_AC97_PC_BEEP_VOL_M 0x0F
304 #define ESA_AC97_SROUND_MASTER_VOL 0x38
305 #define ESA_AC97_PC_BEEP_VOL_S 1
306
307 /*#define ESA_AC97_PHONE_VOL 0x0C
308 #define ESA_AC97_MIC_VOL 0x0E*/
309 #define ESA_AC97_MIC_20DB_ENABLE 0x40
310
311 /*#define ESA_AC97_LINEIN_VOL 0x10
312 #define ESA_AC97_CD_VOL 0x12
313 #define ESA_AC97_VIDEO_VOL 0x14
314 #define ESA_AC97_AUX_VOL 0x16*/
315 #define ESA_AC97_PCM_OUT_VOL 0x18
316 /*#define ESA_AC97_RECORD_SELECT 0x1A*/
317 #define ESA_AC97_RECORD_MIC 0x00
318 #define ESA_AC97_RECORD_CD 0x01
319 #define ESA_AC97_RECORD_VIDEO 0x02
320 #define ESA_AC97_RECORD_AUX 0x03
321 #define ESA_AC97_RECORD_MONO_MUX 0x02
322 #define ESA_AC97_RECORD_DIGITAL 0x03
323 #define ESA_AC97_RECORD_LINE 0x04
324 #define ESA_AC97_RECORD_STEREO 0x05
325 #define ESA_AC97_RECORD_MONO 0x06
326 #define ESA_AC97_RECORD_PHONE 0x07
327
328 /*#define ESA_AC97_RECORD_GAIN 0x1C*/
329 #define ESA_AC97_RECORD_VOL_M 0x0F
330
331 /*#define ESA_AC97_GENERAL_PURPOSE 0x20*/
332 #define ESA_AC97_POWER_DOWN_CTRL 0x26
333 #define ESA_AC97_ADC_READY 0x0001
334 #define ESA_AC97_DAC_READY 0x0002
335 #define ESA_AC97_ANALOG_READY 0x0004
336 #define ESA_AC97_VREF_ON 0x0008
337 #define ESA_AC97_PR0 0x0100
338 #define ESA_AC97_PR1 0x0200
339 #define ESA_AC97_PR2 0x0400
340 #define ESA_AC97_PR3 0x0800
341 #define ESA_AC97_PR4 0x1000
342
343 #define ESA_AC97_RESERVED1 0x28
344
345 #define ESA_AC97_VENDOR_TEST 0x5A
346
347 #define ESA_AC97_CLOCK_DELAY 0x5C
348 #define ESA_AC97_LINEOUT_MUX_SEL 0x0001
349 #define ESA_AC97_MONO_MUX_SEL 0x0002
350 #define ESA_AC97_CLOCK_DELAY_SEL 0x1F
351 #define ESA_AC97_DAC_CDS_SHIFT 6
352 #define ESA_AC97_ADC_CDS_SHIFT 11
353
354 #define ESA_AC97_MULTI_CHANNEL_SEL 0x74
355
356 /*#define ESA_AC97_VENDOR_ID1 0x7C
357 #define ESA_AC97_VENDOR_ID2 0x7E*/
358
359 /*
360 * ASSP control regs
361 */
362 #define ESA_DSP_PORT_TIMER_COUNT 0x06
363
364 #define ESA_DSP_PORT_MEMORY_INDEX 0x80
365
366 #define ESA_DSP_PORT_MEMORY_TYPE 0x82
367 #define ESA_MEMTYPE_INTERNAL_CODE 0x0002
368 #define ESA_MEMTYPE_INTERNAL_DATA 0x0003
369 #define ESA_MEMTYPE_MASK 0x0003
370
371 #define ESA_DSP_PORT_MEMORY_DATA 0x84
372
373 #define ESA_DSP_PORT_CONTROL_REG_A 0xA2
374 #define ESA_DSP_PORT_CONTROL_REG_B 0xA4
375 #define ESA_DSP_PORT_CONTROL_REG_C 0xA6
376
377 #define ESA_REV_A_CODE_MEMORY_BEGIN 0x0000
378 #define ESA_REV_A_CODE_MEMORY_END 0x0FFF
379 #define ESA_REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040
380 #define ESA_REV_A_CODE_MEMORY_LENGTH (REV_A_CODE_MEMORY_END - REV_A_CODE_MEMORY_BEGIN + 1)
381
382 #define ESA_REV_B_CODE_MEMORY_BEGIN 0x0000
383 #define ESA_REV_B_CODE_MEMORY_END 0x0BFF
384 #define ESA_REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040
385 #define ESA_REV_B_CODE_MEMORY_LENGTH (REV_B_CODE_MEMORY_END - REV_B_CODE_MEMORY_BEGIN + 1)
386
387 #define ESA_REV_A_DATA_MEMORY_BEGIN 0x1000
388 #define ESA_REV_A_DATA_MEMORY_END 0x2FFF
389 #define ESA_REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080
390 #define ESA_REV_A_DATA_MEMORY_LENGTH (REV_A_DATA_MEMORY_END - REV_A_DATA_MEMORY_BEGIN + 1)
391
392 #define ESA_REV_B_DATA_MEMORY_BEGIN 0x1000
393 #define ESA_REV_B_DATA_MEMORY_END 0x2BFF
394 #define ESA_REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080
395 #define ESA_REV_B_DATA_MEMORY_LENGTH (REV_B_DATA_MEMORY_END - REV_B_DATA_MEMORY_BEGIN + 1)
396
397
398 #define ESA_NUM_UNITS_KERNEL_CODE 16
399 #define ESA_NUM_UNITS_KERNEL_DATA 2
400
401 #define ESA_NUM_UNITS_KERNEL_CODE_WITH_HSP 16
402 #define ESA_NUM_UNITS_KERNEL_DATA_WITH_HSP 5
403
404 /*
405 * Kernel data layout
406 */
407
408 #define ESA_DP_SHIFT_COUNT 7
409
410 #define ESA_KDATA_BASE_ADDR 0x1000
411 #define ESA_KDATA_BASE_ADDR2 0x1080
412
413 #define ESA_KDATA_TASK0 (ESA_KDATA_BASE_ADDR + 0x0000)
414 #define ESA_KDATA_TASK1 (ESA_KDATA_BASE_ADDR + 0x0001)
415 #define ESA_KDATA_TASK2 (ESA_KDATA_BASE_ADDR + 0x0002)
416 #define ESA_KDATA_TASK3 (ESA_KDATA_BASE_ADDR + 0x0003)
417 #define ESA_KDATA_TASK4 (ESA_KDATA_BASE_ADDR + 0x0004)
418 #define ESA_KDATA_TASK5 (ESA_KDATA_BASE_ADDR + 0x0005)
419 #define ESA_KDATA_TASK6 (ESA_KDATA_BASE_ADDR + 0x0006)
420 #define ESA_KDATA_TASK7 (ESA_KDATA_BASE_ADDR + 0x0007)
421 #define ESA_KDATA_TASK_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0008)
422
423 #define ESA_KDATA_CURRENT_TASK (ESA_KDATA_BASE_ADDR + 0x0009)
424 #define ESA_KDATA_TASK_SWITCH (ESA_KDATA_BASE_ADDR + 0x000A)
425
426 #define ESA_KDATA_INSTANCE0_POS3D (ESA_KDATA_BASE_ADDR + 0x000B)
427 #define ESA_KDATA_INSTANCE1_POS3D (ESA_KDATA_BASE_ADDR + 0x000C)
428 #define ESA_KDATA_INSTANCE2_POS3D (ESA_KDATA_BASE_ADDR + 0x000D)
429 #define ESA_KDATA_INSTANCE3_POS3D (ESA_KDATA_BASE_ADDR + 0x000E)
430 #define ESA_KDATA_INSTANCE4_POS3D (ESA_KDATA_BASE_ADDR + 0x000F)
431 #define ESA_KDATA_INSTANCE5_POS3D (ESA_KDATA_BASE_ADDR + 0x0010)
432 #define ESA_KDATA_INSTANCE6_POS3D (ESA_KDATA_BASE_ADDR + 0x0011)
433 #define ESA_KDATA_INSTANCE7_POS3D (ESA_KDATA_BASE_ADDR + 0x0012)
434 #define ESA_KDATA_INSTANCE8_POS3D (ESA_KDATA_BASE_ADDR + 0x0013)
435 #define ESA_KDATA_INSTANCE_POS3D_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0014)
436
437 #define ESA_KDATA_INSTANCE0_SPKVIRT (ESA_KDATA_BASE_ADDR + 0x0015)
438 #define ESA_KDATA_INSTANCE_SPKVIRT_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0016)
439
440 #define ESA_KDATA_INSTANCE0_SPDIF (ESA_KDATA_BASE_ADDR + 0x0017)
441 #define ESA_KDATA_INSTANCE_SPDIF_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0018)
442
443 #define ESA_KDATA_INSTANCE0_MODEM (ESA_KDATA_BASE_ADDR + 0x0019)
444 #define ESA_KDATA_INSTANCE_MODEM_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001A)
445
446 #define ESA_KDATA_INSTANCE0_SRC (ESA_KDATA_BASE_ADDR + 0x001B)
447 #define ESA_KDATA_INSTANCE1_SRC (ESA_KDATA_BASE_ADDR + 0x001C)
448 #define ESA_KDATA_INSTANCE_SRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001D)
449
450 #define ESA_KDATA_INSTANCE0_MINISRC (ESA_KDATA_BASE_ADDR + 0x001E)
451 #define ESA_KDATA_INSTANCE1_MINISRC (ESA_KDATA_BASE_ADDR + 0x001F)
452 #define ESA_KDATA_INSTANCE2_MINISRC (ESA_KDATA_BASE_ADDR + 0x0020)
453 #define ESA_KDATA_INSTANCE3_MINISRC (ESA_KDATA_BASE_ADDR + 0x0021)
454 #define ESA_KDATA_INSTANCE_MINISRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0022)
455
456 #define ESA_KDATA_INSTANCE0_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0023)
457 #define ESA_KDATA_INSTANCE1_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0024)
458 #define ESA_KDATA_INSTANCE_CPYTHRU_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0025)
459
460 #define ESA_KDATA_CURRENT_DMA (ESA_KDATA_BASE_ADDR + 0x0026)
461 #define ESA_KDATA_DMA_SWITCH (ESA_KDATA_BASE_ADDR + 0x0027)
462 #define ESA_KDATA_DMA_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0028)
463
464 #define ESA_KDATA_DMA_XFER0 (ESA_KDATA_BASE_ADDR + 0x0029)
465 #define ESA_KDATA_DMA_XFER1 (ESA_KDATA_BASE_ADDR + 0x002A)
466 #define ESA_KDATA_DMA_XFER2 (ESA_KDATA_BASE_ADDR + 0x002B)
467 #define ESA_KDATA_DMA_XFER3 (ESA_KDATA_BASE_ADDR + 0x002C)
468 #define ESA_KDATA_DMA_XFER4 (ESA_KDATA_BASE_ADDR + 0x002D)
469 #define ESA_KDATA_DMA_XFER5 (ESA_KDATA_BASE_ADDR + 0x002E)
470 #define ESA_KDATA_DMA_XFER6 (ESA_KDATA_BASE_ADDR + 0x002F)
471 #define ESA_KDATA_DMA_XFER7 (ESA_KDATA_BASE_ADDR + 0x0030)
472 #define ESA_KDATA_DMA_XFER8 (ESA_KDATA_BASE_ADDR + 0x0031)
473 #define ESA_KDATA_DMA_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0032)
474
475 #define ESA_KDATA_I2S_SAMPLE_COUNT (ESA_KDATA_BASE_ADDR + 0x0033)
476 #define ESA_KDATA_I2S_INT_METER (ESA_KDATA_BASE_ADDR + 0x0034)
477 #define ESA_KDATA_I2S_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0035)
478
479 #define ESA_KDATA_TIMER_COUNT_RELOAD (ESA_KDATA_BASE_ADDR + 0x0036)
480 #define ESA_KDATA_TIMER_COUNT_CURRENT (ESA_KDATA_BASE_ADDR + 0x0037)
481
482 #define ESA_KDATA_HALT_SYNCH_CLIENT (ESA_KDATA_BASE_ADDR + 0x0038)
483 #define ESA_KDATA_HALT_SYNCH_DMA (ESA_KDATA_BASE_ADDR + 0x0039)
484 #define ESA_KDATA_HALT_ACKNOWLEDGE (ESA_KDATA_BASE_ADDR + 0x003A)
485
486 #define ESA_KDATA_ADC1_XFER0 (ESA_KDATA_BASE_ADDR + 0x003B)
487 #define ESA_KDATA_ADC1_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x003C)
488 #define ESA_KDATA_ADC1_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003D)
489 #define ESA_KDATA_ADC1_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003E)
490 #define ESA_KDATA_ADC1_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x003F)
491 #define ESA_KDATA_ADC1_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0040)
492
493 #define ESA_KDATA_ADC2_XFER0 (ESA_KDATA_BASE_ADDR + 0x0041)
494 #define ESA_KDATA_ADC2_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0042)
495 #define ESA_KDATA_ADC2_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0043)
496 #define ESA_KDATA_ADC2_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0044)
497 #define ESA_KDATA_ADC2_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0045)
498 #define ESA_KDATA_ADC2_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0046)
499
500 #define ESA_KDATA_CD_XFER0 (ESA_KDATA_BASE_ADDR + 0x0047)
501 #define ESA_KDATA_CD_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0048)
502 #define ESA_KDATA_CD_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0049)
503 #define ESA_KDATA_CD_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x004A)
504 #define ESA_KDATA_CD_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004B)
505 #define ESA_KDATA_CD_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004C)
506
507 #define ESA_KDATA_MIC_XFER0 (ESA_KDATA_BASE_ADDR + 0x004D)
508 #define ESA_KDATA_MIC_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x004E)
509 #define ESA_KDATA_MIC_VOLUME (ESA_KDATA_BASE_ADDR + 0x004F)
510 #define ESA_KDATA_MIC_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0050)
511
512 #define ESA_KDATA_I2S_XFER0 (ESA_KDATA_BASE_ADDR + 0x0051)
513 #define ESA_KDATA_I2S_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0052)
514
515 #define ESA_KDATA_CHI_XFER0 (ESA_KDATA_BASE_ADDR + 0x0053)
516 #define ESA_KDATA_CHI_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0054)
517
518 #define ESA_KDATA_SPDIF_XFER (ESA_KDATA_BASE_ADDR + 0x0055)
519 #define ESA_KDATA_SPDIF_CURRENT_FRAME (ESA_KDATA_BASE_ADDR + 0x0056)
520 #define ESA_KDATA_SPDIF_FRAME0 (ESA_KDATA_BASE_ADDR + 0x0057)
521 #define ESA_KDATA_SPDIF_FRAME1 (ESA_KDATA_BASE_ADDR + 0x0058)
522 #define ESA_KDATA_SPDIF_FRAME2 (ESA_KDATA_BASE_ADDR + 0x0059)
523
524 #define ESA_KDATA_SPDIF_REQUEST (ESA_KDATA_BASE_ADDR + 0x005A)
525 #define ESA_KDATA_SPDIF_TEMP (ESA_KDATA_BASE_ADDR + 0x005B)
526
527 #define ESA_KDATA_SPDIFIN_XFER0 (ESA_KDATA_BASE_ADDR + 0x005C)
528 #define ESA_KDATA_SPDIFIN_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x005D)
529 #define ESA_KDATA_SPDIFIN_INT_METER (ESA_KDATA_BASE_ADDR + 0x005E)
530
531 #define ESA_KDATA_DSP_RESET_COUNT (ESA_KDATA_BASE_ADDR + 0x005F)
532 #define ESA_KDATA_DEBUG_OUTPUT (ESA_KDATA_BASE_ADDR + 0x0060)
533
534 #define ESA_KDATA_KERNEL_ISR_LIST (ESA_KDATA_BASE_ADDR + 0x0061)
535
536 #define ESA_KDATA_KERNEL_ISR_CBSR1 (ESA_KDATA_BASE_ADDR + 0x0062)
537 #define ESA_KDATA_KERNEL_ISR_CBER1 (ESA_KDATA_BASE_ADDR + 0x0063)
538 #define ESA_KDATA_KERNEL_ISR_CBCR (ESA_KDATA_BASE_ADDR + 0x0064)
539 #define ESA_KDATA_KERNEL_ISR_AR0 (ESA_KDATA_BASE_ADDR + 0x0065)
540 #define ESA_KDATA_KERNEL_ISR_AR1 (ESA_KDATA_BASE_ADDR + 0x0066)
541 #define ESA_KDATA_KERNEL_ISR_AR2 (ESA_KDATA_BASE_ADDR + 0x0067)
542 #define ESA_KDATA_KERNEL_ISR_AR3 (ESA_KDATA_BASE_ADDR + 0x0068)
543 #define ESA_KDATA_KERNEL_ISR_AR4 (ESA_KDATA_BASE_ADDR + 0x0069)
544 #define ESA_KDATA_KERNEL_ISR_AR5 (ESA_KDATA_BASE_ADDR + 0x006A)
545 #define ESA_KDATA_KERNEL_ISR_BRCR (ESA_KDATA_BASE_ADDR + 0x006B)
546 #define ESA_KDATA_KERNEL_ISR_PASR (ESA_KDATA_BASE_ADDR + 0x006C)
547 #define ESA_KDATA_KERNEL_ISR_PAER (ESA_KDATA_BASE_ADDR + 0x006D)
548
549 #define ESA_KDATA_CLIENT_SCRATCH0 (ESA_KDATA_BASE_ADDR + 0x006E)
550 #define ESA_KDATA_CLIENT_SCRATCH1 (ESA_KDATA_BASE_ADDR + 0x006F)
551 #define ESA_KDATA_KERNEL_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0070)
552 #define ESA_KDATA_KERNEL_ISR_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0071)
553
554 #define ESA_KDATA_OUEUE_LEFT (ESA_KDATA_BASE_ADDR + 0x0072)
555 #define ESA_KDATA_QUEUE_RIGHT (ESA_KDATA_BASE_ADDR + 0x0073)
556
557 #define ESA_KDATA_ADC1_REQUEST (ESA_KDATA_BASE_ADDR + 0x0074)
558 #define ESA_KDATA_ADC2_REQUEST (ESA_KDATA_BASE_ADDR + 0x0075)
559 #define ESA_KDATA_CD_REQUEST (ESA_KDATA_BASE_ADDR + 0x0076)
560 #define ESA_KDATA_MIC_REQUEST (ESA_KDATA_BASE_ADDR + 0x0077)
561
562 #define ESA_KDATA_ADC1_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0078)
563 #define ESA_KDATA_ADC2_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0079)
564 #define ESA_KDATA_CD_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007A)
565 #define ESA_KDATA_MIC_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007B)
566 #define ESA_KDATA_MIC_SYNC_COUNTER (ESA_KDATA_BASE_ADDR + 0x007C)
567
568 /*
569 * second 'segment' (?) reserved for mixer
570 * buffers..
571 */
572
573 #define ESA_KDATA_MIXER_WORD0 (ESA_KDATA_BASE_ADDR2 + 0x0000)
574 #define ESA_KDATA_MIXER_WORD1 (ESA_KDATA_BASE_ADDR2 + 0x0001)
575 #define ESA_KDATA_MIXER_WORD2 (ESA_KDATA_BASE_ADDR2 + 0x0002)
576 #define ESA_KDATA_MIXER_WORD3 (ESA_KDATA_BASE_ADDR2 + 0x0003)
577 #define ESA_KDATA_MIXER_WORD4 (ESA_KDATA_BASE_ADDR2 + 0x0004)
578 #define ESA_KDATA_MIXER_WORD5 (ESA_KDATA_BASE_ADDR2 + 0x0005)
579 #define ESA_KDATA_MIXER_WORD6 (ESA_KDATA_BASE_ADDR2 + 0x0006)
580 #define ESA_KDATA_MIXER_WORD7 (ESA_KDATA_BASE_ADDR2 + 0x0007)
581 #define ESA_KDATA_MIXER_WORD8 (ESA_KDATA_BASE_ADDR2 + 0x0008)
582 #define ESA_KDATA_MIXER_WORD9 (ESA_KDATA_BASE_ADDR2 + 0x0009)
583 #define ESA_KDATA_MIXER_WORDA (ESA_KDATA_BASE_ADDR2 + 0x000A)
584 #define ESA_KDATA_MIXER_WORDB (ESA_KDATA_BASE_ADDR2 + 0x000B)
585 #define ESA_KDATA_MIXER_WORDC (ESA_KDATA_BASE_ADDR2 + 0x000C)
586 #define ESA_KDATA_MIXER_WORDD (ESA_KDATA_BASE_ADDR2 + 0x000D)
587 #define ESA_KDATA_MIXER_WORDE (ESA_KDATA_BASE_ADDR2 + 0x000E)
588 #define ESA_KDATA_MIXER_WORDF (ESA_KDATA_BASE_ADDR2 + 0x000F)
589
590 #define ESA_KDATA_MIXER_XFER0 (ESA_KDATA_BASE_ADDR2 + 0x0010)
591 #define ESA_KDATA_MIXER_XFER1 (ESA_KDATA_BASE_ADDR2 + 0x0011)
592 #define ESA_KDATA_MIXER_XFER2 (ESA_KDATA_BASE_ADDR2 + 0x0012)
593 #define ESA_KDATA_MIXER_XFER3 (ESA_KDATA_BASE_ADDR2 + 0x0013)
594 #define ESA_KDATA_MIXER_XFER4 (ESA_KDATA_BASE_ADDR2 + 0x0014)
595 #define ESA_KDATA_MIXER_XFER5 (ESA_KDATA_BASE_ADDR2 + 0x0015)
596 #define ESA_KDATA_MIXER_XFER6 (ESA_KDATA_BASE_ADDR2 + 0x0016)
597 #define ESA_KDATA_MIXER_XFER7 (ESA_KDATA_BASE_ADDR2 + 0x0017)
598 #define ESA_KDATA_MIXER_XFER8 (ESA_KDATA_BASE_ADDR2 + 0x0018)
599 #define ESA_KDATA_MIXER_XFER9 (ESA_KDATA_BASE_ADDR2 + 0x0019)
600 #define ESA_KDATA_MIXER_XFER_ENDMARK (ESA_KDATA_BASE_ADDR2 + 0x001A)
601
602 #define ESA_KDATA_MIXER_TASK_NUMBER (ESA_KDATA_BASE_ADDR2 + 0x001B)
603 #define ESA_KDATA_CURRENT_MIXER (ESA_KDATA_BASE_ADDR2 + 0x001C)
604 #define ESA_KDATA_MIXER_ACTIVE (ESA_KDATA_BASE_ADDR2 + 0x001D)
605 #define ESA_KDATA_MIXER_BANK_STATUS (ESA_KDATA_BASE_ADDR2 + 0x001E)
606 #define ESA_KDATA_DAC_LEFT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x001F)
607 #define ESA_KDATA_DAC_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x0020)
608
609 #define ESA_MAX_INSTANCE_MINISRC (ESA_KDATA_INSTANCE_MINISRC_ENDMARK - KDATA_INSTANCE0_MINISRC)
610 #define ESA_MAX_VIRTUAL_DMA_CHANNELS (ESA_KDATA_DMA_XFER_ENDMARK - KDATA_DMA_XFER0)
611 #define ESA_MAX_VIRTUAL_MIXER_CHANNELS (ESA_KDATA_MIXER_XFER_ENDMARK - KDATA_MIXER_XFER0)
612 #define ESA_MAX_VIRTUAL_ADC1_CHANNELS (ESA_KDATA_ADC1_XFER_ENDMARK - KDATA_ADC1_XFER0)
613
614 /*
615 * client data area offsets
616 */
617 #define ESA_CDATA_INSTANCE_READY 0x00
618
619 #define ESA_CDATA_HOST_SRC_ADDRL 0x01
620 #define ESA_CDATA_HOST_SRC_ADDRH 0x02
621 #define ESA_CDATA_HOST_SRC_END_PLUS_1L 0x03
622 #define ESA_CDATA_HOST_SRC_END_PLUS_1H 0x04
623 #define ESA_CDATA_HOST_SRC_CURRENTL 0x05
624 #define ESA_CDATA_HOST_SRC_CURRENTH 0x06
625
626 #define ESA_CDATA_IN_BUF_CONNECT 0x07
627 #define ESA_CDATA_OUT_BUF_CONNECT 0x08
628
629 #define ESA_CDATA_IN_BUF_BEGIN 0x09
630 #define ESA_CDATA_IN_BUF_END_PLUS_1 0x0A
631 #define ESA_CDATA_IN_BUF_HEAD 0x0B
632 #define ESA_CDATA_IN_BUF_TAIL 0x0C
633 #define ESA_CDATA_OUT_BUF_BEGIN 0x0D
634 #define ESA_CDATA_OUT_BUF_END_PLUS_1 0x0E
635 #define ESA_CDATA_OUT_BUF_HEAD 0x0F
636 #define ESA_CDATA_OUT_BUF_TAIL 0x10
637
638 #define ESA_CDATA_DMA_CONTROL 0x11
639 #define ESA_CDATA_RESERVED 0x12
640
641 #define ESA_CDATA_FREQUENCY 0x13
642 #define ESA_CDATA_LEFT_VOLUME 0x14
643 #define ESA_CDATA_RIGHT_VOLUME 0x15
644 #define ESA_CDATA_LEFT_SUR_VOL 0x16
645 #define ESA_CDATA_RIGHT_SUR_VOL 0x17
646
647 #define ESA_CDATA_HEADER_LEN 0x18
648
649 #define ESA_SRC3_DIRECTION_OFFSET ESA_CDATA_HEADER_LEN
650 #define ESA_SRC3_MODE_OFFSET (ESA_CDATA_HEADER_LEN + 1)
651 #define ESA_SRC3_WORD_LENGTH_OFFSET (ESA_CDATA_HEADER_LEN + 2)
652 #define ESA_SRC3_PARAMETER_OFFSET (ESA_CDATA_HEADER_LEN + 3)
653 #define ESA_SRC3_COEFF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 8)
654 #define ESA_SRC3_FILTAP_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 10)
655 #define ESA_SRC3_TEMP_INBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 16)
656 #define ESA_SRC3_TEMP_OUTBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 17)
657
658 #define ESA_MINISRC_IN_BUFFER_SIZE (0x50 * 2)
659 #define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2)
660 #define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2)
661 #define ESA_MINISRC_TMP_BUFFER_SIZE (112 + (ESA_MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2)
662 #define ESA_MINISRC_BIQUAD_STAGE 2
663 #define ESA_MINISRC_COEF_LOC 0x175
664
665 #define ESA_DMACONTROL_BLOCK_MASK 0x000F
666 #define ESA_DMAC_BLOCK0_SELECTOR 0x0000
667 #define ESA_DMAC_BLOCK1_SELECTOR 0x0001
668 #define ESA_DMAC_BLOCK2_SELECTOR 0x0002
669 #define ESA_DMAC_BLOCK3_SELECTOR 0x0003
670 #define ESA_DMAC_BLOCK4_SELECTOR 0x0004
671 #define ESA_DMAC_BLOCK5_SELECTOR 0x0005
672 #define ESA_DMAC_BLOCK6_SELECTOR 0x0006
673 #define ESA_DMAC_BLOCK7_SELECTOR 0x0007
674 #define ESA_DMAC_BLOCK8_SELECTOR 0x0008
675 #define ESA_DMAC_BLOCK9_SELECTOR 0x0009
676 #define ESA_DMAC_BLOCKA_SELECTOR 0x000A
677 #define ESA_DMAC_BLOCKB_SELECTOR 0x000B
678 #define ESA_DMAC_BLOCKC_SELECTOR 0x000C
679 #define ESA_DMAC_BLOCKD_SELECTOR 0x000D
680 #define ESA_DMAC_BLOCKE_SELECTOR 0x000E
681 #define ESA_DMAC_BLOCKF_SELECTOR 0x000F
682 #define ESA_DMACONTROL_PAGE_MASK 0x00F0
683 #define ESA_DMAC_PAGE0_SELECTOR 0x0030
684 #define ESA_DMAC_PAGE1_SELECTOR 0x0020
685 #define ESA_DMAC_PAGE2_SELECTOR 0x0010
686 #define ESA_DMAC_PAGE3_SELECTOR 0x0000
687 #define ESA_DMACONTROL_AUTOREPEAT 0x1000
688 #define ESA_DMACONTROL_STOPPED 0x2000
689 #define ESA_DMACONTROL_DIRECTION 0x0100
690