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esareg.h revision 1.4
      1 /* $NetBSD: esareg.h,v 1.4 2002/01/13 10:02:58 pooka Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2002 Lennart Augustsson
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. The name of the author may not be used to endorse or promote products
     13  *    derived from this software without specific prior written permission.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  */
     27 
     28 /*
     29  * ESS Allegro-1 / Maestro3 Audio Driver
     30  *
     31  * Lots of magic based on the FreeBSD maestro3 driver and
     32  * reverse engineering.
     33  * Original driver by Don Kim.
     34  *
     35  */
     36 
     37 /* Allegro PCI configuration registers */
     38 #define PCI_LEGACY_AUDIO_CTRL   0x40
     39 #define DISABLE_LEGACY          0x00008000
     40 
     41 /* Power management */
     42 #define ESA_CONF_PM_PTR             0x34
     43 #define ESA_PPMI_D0                 0
     44 #define ESA_PPMI_D1                 1
     45 #define ESA_PPMI_D2                 2
     46 #define ESA_PPMI_D3                 3
     47 
     48 #define ESA_PCI_ALLEGRO_CONFIG      0x50
     49 #define ESA_SB_ADDR_240             0x00000004
     50 #define ESA_MPU_ADDR_MASK           0x00000018
     51 #define ESA_MPU_ADDR_330            0x00000000
     52 #define ESA_MPU_ADDR_300            0x00000008
     53 #define ESA_MPU_ADDR_320            0x00000010
     54 #define ESA_MPU_ADDR_340            0x00000018
     55 #define ESA_USE_PCI_TIMING          0x00000040
     56 #define ESA_POSTED_WRITE_ENABLE     0x00000080
     57 #define ESA_DMA_POLICY_MASK         0x00000700
     58 #define ESA_DMA_DDMA                0x00000000
     59 #define ESA_DMA_TDMA                0x00000100
     60 #define ESA_DMA_PCPCI               0x00000200
     61 #define ESA_DMA_WBDMA16             0x00000400
     62 #define ESA_DMA_WBDMA4              0x00000500
     63 #define ESA_DMA_WBDMA2              0x00000600
     64 #define ESA_DMA_WBDMA1              0x00000700
     65 #define ESA_DMA_SAFE_GUARD          0x00000800
     66 #define ESA_HI_PERF_GP_ENABLE       0x00001000
     67 #define ESA_PIC_SNOOP_MODE_0        0x00002000
     68 #define ESA_PIC_SNOOP_MODE_1        0x00004000
     69 #define ESA_SOUNDBLASTER_IRQ_MASK   0x00008000
     70 #define ESA_RING_IN_ENABLE          0x00010000
     71 #define ESA_SPDIF_TEST_MODE         0x00020000
     72 #define ESA_CLK_MULT_MODE_SELECT_2  0x00040000
     73 #define ESA_EEPROM_WRITE_ENABLE     0x00080000
     74 #define ESA_CODEC_DIR_IN            0x00100000
     75 #define ESA_HV_BUTTON_FROM_GD       0x00200000
     76 #define ESA_REDUCED_DEBOUNCE        0x00400000
     77 #define ESA_HV_CTRL_ENABLE          0x00800000
     78 #define ESA_SPDIF_ENABLE            0x01000000
     79 #define ESA_CLK_DIV_SELECT          0x06000000
     80 #define ESA_CLK_DIV_BY_48           0x00000000
     81 #define ESA_CLK_DIV_BY_49           0x02000000
     82 #define ESA_CLK_DIV_BY_50           0x04000000
     83 #define ESA_CLK_DIV_RESERVED        0x06000000
     84 #define ESA_PM_CTRL_ENABLE          0x08000000
     85 #define ESA_CLK_MULT_MODE_SELECT    0x30000000
     86 #define ESA_CLK_MULT_MODE_SHIFT     28
     87 #define ESA_CLK_MULT_MODE_0         0x00000000
     88 #define ESA_CLK_MULT_MODE_1         0x10000000
     89 #define ESA_CLK_MULT_MODE_2         0x20000000
     90 #define ESA_CLK_MULT_MODE_3         0x30000000
     91 #define ESA_INT_CLK_SELECT          0x40000000
     92 #define ESA_INT_CLK_MULT_RESET      0x80000000
     93 
     94 /* M3 */
     95 #define ESA_INT_CLK_SRC_NOT_PCI     0x00100000
     96 #define ESA_INT_CLK_MULT_ENABLE     0x80000000
     97 
     98 #define ESA_PCI_ACPI_CONTROL        0x54
     99 #define ESA_PCI_ACPI_D0             0x00000000
    100 #define ESA_PCI_ACPI_D1             0xB4F70000
    101 #define ESA_PCI_ACPI_D2             0xB4F7B4F7
    102 
    103 #define ESA_PCI_USER_CONFIG         0x58
    104 #define ESA_EXT_PCI_MASTER_ENABLE   0x00000001
    105 #define ESA_SPDIF_OUT_SELECT        0x00000002
    106 #define ESA_TEST_PIN_DIR_CTRL       0x00000004
    107 #define ESA_AC97_CODEC_TEST         0x00000020
    108 #define ESA_TRI_STATE_BUFFER        0x00000080
    109 #define ESA_IN_CLK_12MHZ_SELECT     0x00000100
    110 #define ESA_MULTI_FUNC_DISABLE      0x00000200
    111 #define ESA_EXT_MASTER_PAIR_SEL     0x00000400
    112 #define ESA_PCI_MASTER_SUPPORT      0x00000800
    113 #define ESA_STOP_CLOCK_ENABLE       0x00001000
    114 #define ESA_EAPD_DRIVE_ENABLE       0x00002000
    115 #define ESA_REQ_TRI_STATE_ENABLE    0x00004000
    116 #define ESA_REQ_LOW_ENABLE          0x00008000
    117 #define ESA_MIDI_1_ENABLE           0x00010000
    118 #define ESA_MIDI_2_ENABLE           0x00020000
    119 #define ESA_SB_AUDIO_SYNC           0x00040000
    120 #define ESA_HV_CTRL_TEST            0x00100000
    121 #define ESA_SOUNDBLASTER_TEST       0x00400000
    122 
    123 #define ESA_PCI_USER_CONFIG_C       0x5C
    124 
    125 #define ESA_PCI_DDMA_CTRL           0x60
    126 #define ESA_DDMA_ENABLE             0x00000001
    127 
    128 
    129 /* Allegro registers */
    130 #define ESA_HOST_INT_CTRL           0x18
    131 #define ESA_SB_INT_ENABLE           0x0001
    132 #define ESA_MPU401_INT_ENABLE       0x0002
    133 #define ESA_ASSP_INT_ENABLE         0x0010
    134 #define ESA_RING_INT_ENABLE         0x0020
    135 #define ESA_HV_INT_ENABLE           0x0040
    136 #define ESA_CLKRUN_GEN_ENABLE       0x0100
    137 #define ESA_HV_CTRL_TO_PME          0x0400
    138 #define ESA_SOFTWARE_RESET_ENABLE   0x8000
    139 
    140 /*
    141  * should be using the above defines, probably.
    142  */
    143 #define ESA_REGB_ENABLE_RESET       0x01
    144 #define ESA_REGB_STOP_CLOCK         0x10
    145 
    146 #define ESA_HOST_INT_STATUS         0x1A
    147 #define ESA_SB_INT_PENDING          0x01
    148 #define ESA_MPU401_INT_PENDING      0x02
    149 #define ESA_ASSP_INT_PENDING        0x10
    150 #define ESA_RING_INT_PENDING        0x20
    151 #define ESA_HV_INT_PENDING          0x40
    152 
    153 #define ESA_HARDWARE_VOL_CTRL       0x1B
    154 #define ESA_SHADOW_MIX_REG_VOICE    0x1C
    155 #define ESA_HW_VOL_COUNTER_VOICE    0x1D
    156 #define ESA_SHADOW_MIX_REG_MASTER   0x1E
    157 #define ESA_HW_VOL_COUNTER_MASTER   0x1F
    158 
    159 #define ESA_CODEC_COMMAND           0x30
    160 #define ESA_CODEC_READ_B            0x80
    161 
    162 #define ESA_CODEC_STATUS            0x30
    163 #define ESA_CODEC_BUSY_B            0x01
    164 
    165 #define ESA_CODEC_DATA              0x32
    166 
    167 #define ESA_RING_BUS_CTRL_A         0x36
    168 #define ESA_RAC_PME_ENABLE          0x0100
    169 #define ESA_RAC_SDFS_ENABLE         0x0200
    170 #define ESA_LAC_PME_ENABLE          0x0400
    171 #define ESA_LAC_SDFS_ENABLE         0x0800
    172 #define ESA_SERIAL_AC_LINK_ENABLE   0x1000
    173 #define ESA_IO_SRAM_ENABLE          0x2000
    174 #define ESA_IIS_INPUT_ENABLE        0x8000
    175 
    176 #define ESA_RING_BUS_CTRL_B         0x38
    177 #define ESA_SECOND_CODEC_ID_MASK    0x0003
    178 #define ESA_SPDIF_FUNC_ENABLE       0x0010
    179 #define ESA_SECOND_AC_ENABLE        0x0020
    180 #define ESA_SB_MODULE_INTF_ENABLE   0x0040
    181 #define ESA_SSPE_ENABLE             0x0040
    182 #define ESA_M3I_DOCK_ENABLE         0x0080
    183 
    184 #define ESA_SDO_OUT_DEST_CTRL       0x3A
    185 #define ESA_COMMAND_ADDR_OUT        0x0003
    186 #define ESA_PCM_LR_OUT_LOCAL        0x0000
    187 #define ESA_PCM_LR_OUT_REMOTE       0x0004
    188 #define ESA_PCM_LR_OUT_MUTE         0x0008
    189 #define ESA_PCM_LR_OUT_BOTH         0x000C
    190 #define ESA_LINE1_DAC_OUT_LOCAL     0x0000
    191 #define ESA_LINE1_DAC_OUT_REMOTE    0x0010
    192 #define ESA_LINE1_DAC_OUT_MUTE      0x0020
    193 #define ESA_LINE1_DAC_OUT_BOTH      0x0030
    194 #define ESA_PCM_CLS_OUT_LOCAL       0x0000
    195 #define ESA_PCM_CLS_OUT_REMOTE      0x0040
    196 #define ESA_PCM_CLS_OUT_MUTE        0x0080
    197 #define ESA_PCM_CLS_OUT_BOTH        0x00C0
    198 #define ESA_PCM_RLF_OUT_LOCAL       0x0000
    199 #define ESA_PCM_RLF_OUT_REMOTE      0x0100
    200 #define ESA_PCM_RLF_OUT_MUTE        0x0200
    201 #define ESA_PCM_RLF_OUT_BOTH        0x0300
    202 #define ESA_LINE2_DAC_OUT_LOCAL     0x0000
    203 #define ESA_LINE2_DAC_OUT_REMOTE    0x0400
    204 #define ESA_LINE2_DAC_OUT_MUTE      0x0800
    205 #define ESA_LINE2_DAC_OUT_BOTH      0x0C00
    206 #define ESA_HANDSET_OUT_LOCAL       0x0000
    207 #define ESA_HANDSET_OUT_REMOTE      0x1000
    208 #define ESA_HANDSET_OUT_MUTE        0x2000
    209 #define ESA_HANDSET_OUT_BOTH        0x3000
    210 #define ESA_IO_CTRL_OUT_LOCAL       0x0000
    211 #define ESA_IO_CTRL_OUT_REMOTE      0x4000
    212 #define ESA_IO_CTRL_OUT_MUTE        0x8000
    213 #define ESA_IO_CTRL_OUT_BOTH        0xC000
    214 
    215 #define ESA_SDO_IN_DEST_CTRL        0x3C
    216 #define ESA_STATUS_ADDR_IN          0x0003
    217 #define ESA_PCM_LR_IN_LOCAL         0x0000
    218 #define ESA_PCM_LR_IN_REMOTE        0x0004
    219 #define ESA_PCM_LR_RESERVED         0x0008
    220 #define ESA_PCM_LR_IN_BOTH          0x000C
    221 #define ESA_LINE1_ADC_IN_LOCAL      0x0000
    222 #define ESA_LINE1_ADC_IN_REMOTE     0x0010
    223 #define ESA_LINE1_ADC_IN_MUTE       0x0020
    224 #define ESA_MIC_ADC_IN_LOCAL        0x0000
    225 #define ESA_MIC_ADC_IN_REMOTE       0x0040
    226 #define ESA_MIC_ADC_IN_MUTE         0x0080
    227 #define ESA_LINE2_DAC_IN_LOCAL      0x0000
    228 #define ESA_LINE2_DAC_IN_REMOTE     0x0400
    229 #define ESA_LINE2_DAC_IN_MUTE       0x0800
    230 #define ESA_HANDSET_IN_LOCAL        0x0000
    231 #define ESA_HANDSET_IN_REMOTE       0x1000
    232 #define ESA_HANDSET_IN_MUTE         0x2000
    233 #define ESA_IO_STATUS_IN_LOCAL      0x0000
    234 #define ESA_IO_STATUS_IN_REMOTE     0x4000
    235 
    236 #define ESA_SPDIF_IN_CTRL           0x3E
    237 #define ESA_SPDIF_IN_ENABLE         0x0001
    238 
    239 #define ESA_GPIO_DATA               0x60
    240 #define ESA_GPIO_DATA_MASK          0x0FFF
    241 #define ESA_GPIO_HV_STATUS          0x3000
    242 #define ESA_GPIO_PME_STATUS         0x4000
    243 
    244 #define ESA_GPIO_MASK               0x64
    245 #define ESA_GPIO_DIRECTION          0x68
    246 #define ESA_GPO_PRIMARY_AC97        0x0001
    247 #define ESA_GPI_LINEOUT_SENSE       0x0004
    248 #define ESA_GPO_SECONDARY_AC97      0x0008
    249 #define ESA_GPI_VOL_DOWN            0x0010
    250 #define ESA_GPI_VOL_UP              0x0020
    251 #define ESA_GPI_IIS_CLK             0x0040
    252 #define ESA_GPI_IIS_LRCLK           0x0080
    253 #define ESA_GPI_IIS_DATA            0x0100
    254 #define ESA_GPI_DOCKING_STATUS      0x0100
    255 #define ESA_GPI_HEADPHONE_SENSE     0x0200
    256 #define ESA_GPO_EXT_AMP_SHUTDOWN    0x1000
    257 
    258 /* M3 */
    259 #define ESA_GPO_M3_EXT_AMP_SHUTDN   0x0002
    260 
    261 #define ESA_ASSP_INDEX_PORT         0x80
    262 #define ESA_ASSP_MEMORY_PORT        0x82
    263 #define ESA_ASSP_DATA_PORT          0x84
    264 
    265 #define ESA_MPU401_DATA_PORT        0x98
    266 #define ESA_MPU401_STATUS_PORT      0x99
    267 
    268 #define ESA_CLK_MULT_DATA_PORT      0x9C
    269 
    270 #define ESA_ASSP_CONTROL_A          0xA2
    271 #define ESA_ASSP_0_WS_ENABLE        0x01
    272 #define ESA_ASSP_CTRL_A_RESERVED1   0x02
    273 #define ESA_ASSP_CTRL_A_RESERVED2   0x04
    274 #define ESA_ASSP_CLK_49MHZ_SELECT   0x08
    275 #define ESA_FAST_PLU_ENABLE         0x10
    276 #define ESA_ASSP_CTRL_A_RESERVED3   0x20
    277 #define ESA_DSP_CLK_36MHZ_SELECT    0x40
    278 
    279 #define ESA_ASSP_CONTROL_B          0xA4
    280 #define ESA_RESET_ASSP              0x00
    281 #define ESA_RUN_ASSP                0x01
    282 #define ESA_ENABLE_ASSP_CLOCK       0x00
    283 #define ESA_STOP_ASSP_CLOCK         0x10
    284 #define ESA_RESET_TOGGLE            0x40
    285 
    286 #define ESA_ASSP_CONTROL_C          0xA6
    287 #define ESA_ASSP_HOST_INT_ENABLE    0x01
    288 #define ESA_FM_ADDR_REMAP_DISABLE   0x02
    289 #define ESA_HOST_WRITE_PORT_ENABLE  0x08
    290 
    291 #define ESA_ASSP_HOST_INT_STATUS    0xAC
    292 #define ESA_DSP2HOST_REQ_PIORECORD  0x01
    293 #define ESA_DSP2HOST_REQ_I2SRATE    0x02
    294 #define ESA_DSP2HOST_REQ_TIMER      0x04
    295 
    296 /* AC97 registers */
    297 /* XXX fix this crap up */
    298 /*#define ESA_AC97_RESET              0x00*/
    299 
    300 #define ESA_AC97_VOL_MUTE_B         0x8000
    301 #define ESA_AC97_VOL_M              0x1F
    302 #define ESA_AC97_LEFT_VOL_S         8
    303 
    304 #define ESA_AC97_MASTER_VOL         0x02
    305 #define ESA_AC97_LINE_LEVEL_VOL     0x04
    306 #define ESA_AC97_MASTER_MONO_VOL    0x06
    307 #define ESA_AC97_PC_BEEP_VOL        0x0A
    308 #define ESA_AC97_PC_BEEP_VOL_M      0x0F
    309 #define ESA_AC97_SROUND_MASTER_VOL  0x38
    310 #define ESA_AC97_PC_BEEP_VOL_S      1
    311 
    312 /*#define ESA_AC97_PHONE_VOL          0x0C
    313 #define ESA_AC97_MIC_VOL            0x0E*/
    314 #define ESA_AC97_MIC_20DB_ENABLE    0x40
    315 
    316 /*#define ESA_AC97_LINEIN_VOL         0x10
    317 #define ESA_AC97_CD_VOL             0x12
    318 #define ESA_AC97_VIDEO_VOL          0x14
    319 #define ESA_AC97_AUX_VOL            0x16*/
    320 #define ESA_AC97_PCM_OUT_VOL        0x18
    321 /*#define ESA_AC97_RECORD_SELECT      0x1A*/
    322 #define ESA_AC97_RECORD_MIC         0x00
    323 #define ESA_AC97_RECORD_CD          0x01
    324 #define ESA_AC97_RECORD_VIDEO       0x02
    325 #define ESA_AC97_RECORD_AUX         0x03
    326 #define ESA_AC97_RECORD_MONO_MUX    0x02
    327 #define ESA_AC97_RECORD_DIGITAL     0x03
    328 #define ESA_AC97_RECORD_LINE        0x04
    329 #define ESA_AC97_RECORD_STEREO      0x05
    330 #define ESA_AC97_RECORD_MONO        0x06
    331 #define ESA_AC97_RECORD_PHONE       0x07
    332 
    333 /*#define ESA_AC97_RECORD_GAIN        0x1C*/
    334 #define ESA_AC97_RECORD_VOL_M       0x0F
    335 
    336 /*#define ESA_AC97_GENERAL_PURPOSE    0x20*/
    337 #define ESA_AC97_POWER_DOWN_CTRL    0x26
    338 #define ESA_AC97_ADC_READY          0x0001
    339 #define ESA_AC97_DAC_READY          0x0002
    340 #define ESA_AC97_ANALOG_READY       0x0004
    341 #define ESA_AC97_VREF_ON            0x0008
    342 #define ESA_AC97_PR0                0x0100
    343 #define ESA_AC97_PR1                0x0200
    344 #define ESA_AC97_PR2                0x0400
    345 #define ESA_AC97_PR3                0x0800
    346 #define ESA_AC97_PR4                0x1000
    347 
    348 #define ESA_AC97_RESERVED1          0x28
    349 
    350 #define ESA_AC97_VENDOR_TEST        0x5A
    351 
    352 #define ESA_AC97_CLOCK_DELAY        0x5C
    353 #define ESA_AC97_LINEOUT_MUX_SEL    0x0001
    354 #define ESA_AC97_MONO_MUX_SEL       0x0002
    355 #define ESA_AC97_CLOCK_DELAY_SEL    0x1F
    356 #define ESA_AC97_DAC_CDS_SHIFT      6
    357 #define ESA_AC97_ADC_CDS_SHIFT      11
    358 
    359 #define ESA_AC97_MULTI_CHANNEL_SEL  0x74
    360 
    361 /*#define ESA_AC97_VENDOR_ID1         0x7C
    362 #define ESA_AC97_VENDOR_ID2         0x7E*/
    363 
    364 /*
    365  * ASSP control regs
    366  */
    367 #define ESA_DSP_PORT_TIMER_COUNT    0x06
    368 
    369 #define ESA_DSP_PORT_MEMORY_INDEX   0x80
    370 
    371 #define ESA_DSP_PORT_MEMORY_TYPE    0x82
    372 #define ESA_MEMTYPE_INTERNAL_CODE   0x0002
    373 #define ESA_MEMTYPE_INTERNAL_DATA   0x0003
    374 #define ESA_MEMTYPE_MASK            0x0003
    375 
    376 #define ESA_DSP_PORT_MEMORY_DATA    0x84
    377 
    378 #define ESA_DSP_PORT_CONTROL_REG_A  0xA2
    379 #define ESA_DSP_PORT_CONTROL_REG_B  0xA4
    380 #define ESA_DSP_PORT_CONTROL_REG_C  0xA6
    381 
    382 #define ESA_REV_A_CODE_MEMORY_BEGIN         0x0000
    383 #define ESA_REV_A_CODE_MEMORY_END           0x0FFF
    384 #define ESA_REV_A_CODE_MEMORY_UNIT_LENGTH   0x0040
    385 #define ESA_REV_A_CODE_MEMORY_LENGTH        (ESA_REV_A_CODE_MEMORY_END - ESA_REV_A_CODE_MEMORY_BEGIN + 1)
    386 
    387 #define ESA_REV_B_CODE_MEMORY_BEGIN         0x0000
    388 #define ESA_REV_B_CODE_MEMORY_END           0x0BFF
    389 #define ESA_REV_B_CODE_MEMORY_UNIT_LENGTH   0x0040
    390 #define ESA_REV_B_CODE_MEMORY_LENGTH        (ESA_REV_B_CODE_MEMORY_END - ESA_REV_B_CODE_MEMORY_BEGIN + 1)
    391 
    392 #define ESA_REV_A_DATA_MEMORY_BEGIN         0x1000
    393 #define ESA_REV_A_DATA_MEMORY_END           0x2FFF
    394 #define ESA_REV_A_DATA_MEMORY_UNIT_LENGTH   0x0080
    395 #define ESA_REV_A_DATA_MEMORY_LENGTH        (ESA_REV_A_DATA_MEMORY_END - ESA_REV_A_DATA_MEMORY_BEGIN + 1)
    396 
    397 #define ESA_REV_B_DATA_MEMORY_BEGIN         0x1000
    398 #define ESA_REV_B_DATA_MEMORY_END           0x2BFF
    399 #define ESA_REV_B_DATA_MEMORY_UNIT_LENGTH   0x0080
    400 #define ESA_REV_B_DATA_MEMORY_LENGTH        (ESA_REV_B_DATA_MEMORY_END - ESA_REV_B_DATA_MEMORY_BEGIN + 1)
    401 
    402 
    403 #define ESA_NUM_UNITS_KERNEL_CODE          16
    404 #define ESA_NUM_UNITS_KERNEL_DATA           2
    405 
    406 #define ESA_NUM_UNITS_KERNEL_CODE_WITH_HSP 16
    407 #define ESA_NUM_UNITS_KERNEL_DATA_WITH_HSP  5
    408 
    409 /*
    410  * Kernel data layout
    411  */
    412 
    413 #define ESA_DP_SHIFT_COUNT                  7
    414 
    415 #define ESA_KDATA_BASE_ADDR                 0x1000
    416 #define ESA_KDATA_BASE_ADDR2                0x1080
    417 
    418 #define ESA_KDATA_TASK0                     (ESA_KDATA_BASE_ADDR + 0x0000)
    419 #define ESA_KDATA_TASK1                     (ESA_KDATA_BASE_ADDR + 0x0001)
    420 #define ESA_KDATA_TASK2                     (ESA_KDATA_BASE_ADDR + 0x0002)
    421 #define ESA_KDATA_TASK3                     (ESA_KDATA_BASE_ADDR + 0x0003)
    422 #define ESA_KDATA_TASK4                     (ESA_KDATA_BASE_ADDR + 0x0004)
    423 #define ESA_KDATA_TASK5                     (ESA_KDATA_BASE_ADDR + 0x0005)
    424 #define ESA_KDATA_TASK6                     (ESA_KDATA_BASE_ADDR + 0x0006)
    425 #define ESA_KDATA_TASK7                     (ESA_KDATA_BASE_ADDR + 0x0007)
    426 #define ESA_KDATA_TASK_ENDMARK              (ESA_KDATA_BASE_ADDR + 0x0008)
    427 
    428 #define ESA_KDATA_CURRENT_TASK              (ESA_KDATA_BASE_ADDR + 0x0009)
    429 #define ESA_KDATA_TASK_SWITCH               (ESA_KDATA_BASE_ADDR + 0x000A)
    430 
    431 #define ESA_KDATA_INSTANCE0_POS3D           (ESA_KDATA_BASE_ADDR + 0x000B)
    432 #define ESA_KDATA_INSTANCE1_POS3D           (ESA_KDATA_BASE_ADDR + 0x000C)
    433 #define ESA_KDATA_INSTANCE2_POS3D           (ESA_KDATA_BASE_ADDR + 0x000D)
    434 #define ESA_KDATA_INSTANCE3_POS3D           (ESA_KDATA_BASE_ADDR + 0x000E)
    435 #define ESA_KDATA_INSTANCE4_POS3D           (ESA_KDATA_BASE_ADDR + 0x000F)
    436 #define ESA_KDATA_INSTANCE5_POS3D           (ESA_KDATA_BASE_ADDR + 0x0010)
    437 #define ESA_KDATA_INSTANCE6_POS3D           (ESA_KDATA_BASE_ADDR + 0x0011)
    438 #define ESA_KDATA_INSTANCE7_POS3D           (ESA_KDATA_BASE_ADDR + 0x0012)
    439 #define ESA_KDATA_INSTANCE8_POS3D           (ESA_KDATA_BASE_ADDR + 0x0013)
    440 #define ESA_KDATA_INSTANCE_POS3D_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x0014)
    441 
    442 #define ESA_KDATA_INSTANCE0_SPKVIRT         (ESA_KDATA_BASE_ADDR + 0x0015)
    443 #define ESA_KDATA_INSTANCE_SPKVIRT_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0016)
    444 
    445 #define ESA_KDATA_INSTANCE0_SPDIF           (ESA_KDATA_BASE_ADDR + 0x0017)
    446 #define ESA_KDATA_INSTANCE_SPDIF_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x0018)
    447 
    448 #define ESA_KDATA_INSTANCE0_MODEM           (ESA_KDATA_BASE_ADDR + 0x0019)
    449 #define ESA_KDATA_INSTANCE_MODEM_ENDMARK    (ESA_KDATA_BASE_ADDR + 0x001A)
    450 
    451 #define ESA_KDATA_INSTANCE0_SRC             (ESA_KDATA_BASE_ADDR + 0x001B)
    452 #define ESA_KDATA_INSTANCE1_SRC             (ESA_KDATA_BASE_ADDR + 0x001C)
    453 #define ESA_KDATA_INSTANCE_SRC_ENDMARK      (ESA_KDATA_BASE_ADDR + 0x001D)
    454 
    455 #define ESA_KDATA_INSTANCE0_MINISRC         (ESA_KDATA_BASE_ADDR + 0x001E)
    456 #define ESA_KDATA_INSTANCE1_MINISRC         (ESA_KDATA_BASE_ADDR + 0x001F)
    457 #define ESA_KDATA_INSTANCE2_MINISRC         (ESA_KDATA_BASE_ADDR + 0x0020)
    458 #define ESA_KDATA_INSTANCE3_MINISRC         (ESA_KDATA_BASE_ADDR + 0x0021)
    459 #define ESA_KDATA_INSTANCE_MINISRC_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0022)
    460 
    461 #define ESA_KDATA_INSTANCE0_CPYTHRU         (ESA_KDATA_BASE_ADDR + 0x0023)
    462 #define ESA_KDATA_INSTANCE1_CPYTHRU         (ESA_KDATA_BASE_ADDR + 0x0024)
    463 #define ESA_KDATA_INSTANCE_CPYTHRU_ENDMARK  (ESA_KDATA_BASE_ADDR + 0x0025)
    464 
    465 #define ESA_KDATA_CURRENT_DMA               (ESA_KDATA_BASE_ADDR + 0x0026)
    466 #define ESA_KDATA_DMA_SWITCH                (ESA_KDATA_BASE_ADDR + 0x0027)
    467 #define ESA_KDATA_DMA_ACTIVE                (ESA_KDATA_BASE_ADDR + 0x0028)
    468 
    469 #define ESA_KDATA_DMA_XFER0                 (ESA_KDATA_BASE_ADDR + 0x0029)
    470 #define ESA_KDATA_DMA_XFER1                 (ESA_KDATA_BASE_ADDR + 0x002A)
    471 #define ESA_KDATA_DMA_XFER2                 (ESA_KDATA_BASE_ADDR + 0x002B)
    472 #define ESA_KDATA_DMA_XFER3                 (ESA_KDATA_BASE_ADDR + 0x002C)
    473 #define ESA_KDATA_DMA_XFER4                 (ESA_KDATA_BASE_ADDR + 0x002D)
    474 #define ESA_KDATA_DMA_XFER5                 (ESA_KDATA_BASE_ADDR + 0x002E)
    475 #define ESA_KDATA_DMA_XFER6                 (ESA_KDATA_BASE_ADDR + 0x002F)
    476 #define ESA_KDATA_DMA_XFER7                 (ESA_KDATA_BASE_ADDR + 0x0030)
    477 #define ESA_KDATA_DMA_XFER8                 (ESA_KDATA_BASE_ADDR + 0x0031)
    478 #define ESA_KDATA_DMA_XFER_ENDMARK          (ESA_KDATA_BASE_ADDR + 0x0032)
    479 
    480 #define ESA_KDATA_I2S_SAMPLE_COUNT          (ESA_KDATA_BASE_ADDR + 0x0033)
    481 #define ESA_KDATA_I2S_INT_METER             (ESA_KDATA_BASE_ADDR + 0x0034)
    482 #define ESA_KDATA_I2S_ACTIVE                (ESA_KDATA_BASE_ADDR + 0x0035)
    483 
    484 #define ESA_KDATA_TIMER_COUNT_RELOAD        (ESA_KDATA_BASE_ADDR + 0x0036)
    485 #define ESA_KDATA_TIMER_COUNT_CURRENT       (ESA_KDATA_BASE_ADDR + 0x0037)
    486 
    487 #define ESA_KDATA_HALT_SYNCH_CLIENT         (ESA_KDATA_BASE_ADDR + 0x0038)
    488 #define ESA_KDATA_HALT_SYNCH_DMA            (ESA_KDATA_BASE_ADDR + 0x0039)
    489 #define ESA_KDATA_HALT_ACKNOWLEDGE          (ESA_KDATA_BASE_ADDR + 0x003A)
    490 
    491 #define ESA_KDATA_ADC1_XFER0                (ESA_KDATA_BASE_ADDR + 0x003B)
    492 #define ESA_KDATA_ADC1_XFER_ENDMARK         (ESA_KDATA_BASE_ADDR + 0x003C)
    493 #define ESA_KDATA_ADC1_LEFT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x003D)
    494 #define ESA_KDATA_ADC1_RIGHT_VOLUME  	    (ESA_KDATA_BASE_ADDR + 0x003E)
    495 #define ESA_KDATA_ADC1_LEFT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x003F)
    496 #define ESA_KDATA_ADC1_RIGHT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x0040)
    497 
    498 #define ESA_KDATA_ADC2_XFER0                (ESA_KDATA_BASE_ADDR + 0x0041)
    499 #define ESA_KDATA_ADC2_XFER_ENDMARK         (ESA_KDATA_BASE_ADDR + 0x0042)
    500 #define ESA_KDATA_ADC2_LEFT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x0043)
    501 #define ESA_KDATA_ADC2_RIGHT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x0044)
    502 #define ESA_KDATA_ADC2_LEFT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x0045)
    503 #define ESA_KDATA_ADC2_RIGHT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x0046)
    504 
    505 #define ESA_KDATA_CD_XFER0		    (ESA_KDATA_BASE_ADDR + 0x0047)
    506 #define ESA_KDATA_CD_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x0048)
    507 #define ESA_KDATA_CD_LEFT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x0049)
    508 #define ESA_KDATA_CD_RIGHT_VOLUME	    (ESA_KDATA_BASE_ADDR + 0x004A)
    509 #define ESA_KDATA_CD_LEFT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x004B)
    510 #define ESA_KDATA_CD_RIGHT_SUR_VOL	    (ESA_KDATA_BASE_ADDR + 0x004C)
    511 
    512 #define ESA_KDATA_MIC_XFER0		    (ESA_KDATA_BASE_ADDR + 0x004D)
    513 #define ESA_KDATA_MIC_XFER_ENDMARK	    (ESA_KDATA_BASE_ADDR + 0x004E)
    514 #define ESA_KDATA_MIC_VOLUME		    (ESA_KDATA_BASE_ADDR + 0x004F)
    515 #define ESA_KDATA_MIC_SUR_VOL		    (ESA_KDATA_BASE_ADDR + 0x0050)
    516 
    517 #define ESA_KDATA_I2S_XFER0                 (ESA_KDATA_BASE_ADDR + 0x0051)
    518 #define ESA_KDATA_I2S_XFER_ENDMARK          (ESA_KDATA_BASE_ADDR + 0x0052)
    519 
    520 #define ESA_KDATA_CHI_XFER0                 (ESA_KDATA_BASE_ADDR + 0x0053)
    521 #define ESA_KDATA_CHI_XFER_ENDMARK          (ESA_KDATA_BASE_ADDR + 0x0054)
    522 
    523 #define ESA_KDATA_SPDIF_XFER                (ESA_KDATA_BASE_ADDR + 0x0055)
    524 #define ESA_KDATA_SPDIF_CURRENT_FRAME       (ESA_KDATA_BASE_ADDR + 0x0056)
    525 #define ESA_KDATA_SPDIF_FRAME0              (ESA_KDATA_BASE_ADDR + 0x0057)
    526 #define ESA_KDATA_SPDIF_FRAME1              (ESA_KDATA_BASE_ADDR + 0x0058)
    527 #define ESA_KDATA_SPDIF_FRAME2              (ESA_KDATA_BASE_ADDR + 0x0059)
    528 
    529 #define ESA_KDATA_SPDIF_REQUEST             (ESA_KDATA_BASE_ADDR + 0x005A)
    530 #define ESA_KDATA_SPDIF_TEMP                (ESA_KDATA_BASE_ADDR + 0x005B)
    531 
    532 #define ESA_KDATA_SPDIFIN_XFER0             (ESA_KDATA_BASE_ADDR + 0x005C)
    533 #define ESA_KDATA_SPDIFIN_XFER_ENDMARK      (ESA_KDATA_BASE_ADDR + 0x005D)
    534 #define ESA_KDATA_SPDIFIN_INT_METER         (ESA_KDATA_BASE_ADDR + 0x005E)
    535 
    536 #define ESA_KDATA_DSP_RESET_COUNT           (ESA_KDATA_BASE_ADDR + 0x005F)
    537 #define ESA_KDATA_DEBUG_OUTPUT              (ESA_KDATA_BASE_ADDR + 0x0060)
    538 
    539 #define ESA_KDATA_KERNEL_ISR_LIST           (ESA_KDATA_BASE_ADDR + 0x0061)
    540 
    541 #define ESA_KDATA_KERNEL_ISR_CBSR1          (ESA_KDATA_BASE_ADDR + 0x0062)
    542 #define ESA_KDATA_KERNEL_ISR_CBER1          (ESA_KDATA_BASE_ADDR + 0x0063)
    543 #define ESA_KDATA_KERNEL_ISR_CBCR           (ESA_KDATA_BASE_ADDR + 0x0064)
    544 #define ESA_KDATA_KERNEL_ISR_AR0            (ESA_KDATA_BASE_ADDR + 0x0065)
    545 #define ESA_KDATA_KERNEL_ISR_AR1            (ESA_KDATA_BASE_ADDR + 0x0066)
    546 #define ESA_KDATA_KERNEL_ISR_AR2            (ESA_KDATA_BASE_ADDR + 0x0067)
    547 #define ESA_KDATA_KERNEL_ISR_AR3            (ESA_KDATA_BASE_ADDR + 0x0068)
    548 #define ESA_KDATA_KERNEL_ISR_AR4            (ESA_KDATA_BASE_ADDR + 0x0069)
    549 #define ESA_KDATA_KERNEL_ISR_AR5            (ESA_KDATA_BASE_ADDR + 0x006A)
    550 #define ESA_KDATA_KERNEL_ISR_BRCR           (ESA_KDATA_BASE_ADDR + 0x006B)
    551 #define ESA_KDATA_KERNEL_ISR_PASR           (ESA_KDATA_BASE_ADDR + 0x006C)
    552 #define ESA_KDATA_KERNEL_ISR_PAER           (ESA_KDATA_BASE_ADDR + 0x006D)
    553 
    554 #define ESA_KDATA_CLIENT_SCRATCH0           (ESA_KDATA_BASE_ADDR + 0x006E)
    555 #define ESA_KDATA_CLIENT_SCRATCH1           (ESA_KDATA_BASE_ADDR + 0x006F)
    556 #define ESA_KDATA_KERNEL_SCRATCH            (ESA_KDATA_BASE_ADDR + 0x0070)
    557 #define ESA_KDATA_KERNEL_ISR_SCRATCH        (ESA_KDATA_BASE_ADDR + 0x0071)
    558 
    559 #define ESA_KDATA_OUEUE_LEFT                (ESA_KDATA_BASE_ADDR + 0x0072)
    560 #define ESA_KDATA_QUEUE_RIGHT               (ESA_KDATA_BASE_ADDR + 0x0073)
    561 
    562 #define ESA_KDATA_ADC1_REQUEST              (ESA_KDATA_BASE_ADDR + 0x0074)
    563 #define ESA_KDATA_ADC2_REQUEST              (ESA_KDATA_BASE_ADDR + 0x0075)
    564 #define ESA_KDATA_CD_REQUEST		    (ESA_KDATA_BASE_ADDR + 0x0076)
    565 #define ESA_KDATA_MIC_REQUEST		    (ESA_KDATA_BASE_ADDR + 0x0077)
    566 
    567 #define ESA_KDATA_ADC1_MIXER_REQUEST        (ESA_KDATA_BASE_ADDR + 0x0078)
    568 #define ESA_KDATA_ADC2_MIXER_REQUEST        (ESA_KDATA_BASE_ADDR + 0x0079)
    569 #define ESA_KDATA_CD_MIXER_REQUEST	    (ESA_KDATA_BASE_ADDR + 0x007A)
    570 #define ESA_KDATA_MIC_MIXER_REQUEST	    (ESA_KDATA_BASE_ADDR + 0x007B)
    571 #define ESA_KDATA_MIC_SYNC_COUNTER	    (ESA_KDATA_BASE_ADDR + 0x007C)
    572 
    573 /*
    574  * second 'segment' (?) reserved for mixer
    575  * buffers..
    576  */
    577 
    578 #define ESA_KDATA_MIXER_WORD0               (ESA_KDATA_BASE_ADDR2 + 0x0000)
    579 #define ESA_KDATA_MIXER_WORD1               (ESA_KDATA_BASE_ADDR2 + 0x0001)
    580 #define ESA_KDATA_MIXER_WORD2               (ESA_KDATA_BASE_ADDR2 + 0x0002)
    581 #define ESA_KDATA_MIXER_WORD3               (ESA_KDATA_BASE_ADDR2 + 0x0003)
    582 #define ESA_KDATA_MIXER_WORD4               (ESA_KDATA_BASE_ADDR2 + 0x0004)
    583 #define ESA_KDATA_MIXER_WORD5               (ESA_KDATA_BASE_ADDR2 + 0x0005)
    584 #define ESA_KDATA_MIXER_WORD6               (ESA_KDATA_BASE_ADDR2 + 0x0006)
    585 #define ESA_KDATA_MIXER_WORD7               (ESA_KDATA_BASE_ADDR2 + 0x0007)
    586 #define ESA_KDATA_MIXER_WORD8               (ESA_KDATA_BASE_ADDR2 + 0x0008)
    587 #define ESA_KDATA_MIXER_WORD9               (ESA_KDATA_BASE_ADDR2 + 0x0009)
    588 #define ESA_KDATA_MIXER_WORDA               (ESA_KDATA_BASE_ADDR2 + 0x000A)
    589 #define ESA_KDATA_MIXER_WORDB               (ESA_KDATA_BASE_ADDR2 + 0x000B)
    590 #define ESA_KDATA_MIXER_WORDC               (ESA_KDATA_BASE_ADDR2 + 0x000C)
    591 #define ESA_KDATA_MIXER_WORDD               (ESA_KDATA_BASE_ADDR2 + 0x000D)
    592 #define ESA_KDATA_MIXER_WORDE               (ESA_KDATA_BASE_ADDR2 + 0x000E)
    593 #define ESA_KDATA_MIXER_WORDF               (ESA_KDATA_BASE_ADDR2 + 0x000F)
    594 
    595 #define ESA_KDATA_MIXER_XFER0               (ESA_KDATA_BASE_ADDR2 + 0x0010)
    596 #define ESA_KDATA_MIXER_XFER1               (ESA_KDATA_BASE_ADDR2 + 0x0011)
    597 #define ESA_KDATA_MIXER_XFER2               (ESA_KDATA_BASE_ADDR2 + 0x0012)
    598 #define ESA_KDATA_MIXER_XFER3               (ESA_KDATA_BASE_ADDR2 + 0x0013)
    599 #define ESA_KDATA_MIXER_XFER4               (ESA_KDATA_BASE_ADDR2 + 0x0014)
    600 #define ESA_KDATA_MIXER_XFER5               (ESA_KDATA_BASE_ADDR2 + 0x0015)
    601 #define ESA_KDATA_MIXER_XFER6               (ESA_KDATA_BASE_ADDR2 + 0x0016)
    602 #define ESA_KDATA_MIXER_XFER7               (ESA_KDATA_BASE_ADDR2 + 0x0017)
    603 #define ESA_KDATA_MIXER_XFER8               (ESA_KDATA_BASE_ADDR2 + 0x0018)
    604 #define ESA_KDATA_MIXER_XFER9               (ESA_KDATA_BASE_ADDR2 + 0x0019)
    605 #define ESA_KDATA_MIXER_XFER_ENDMARK        (ESA_KDATA_BASE_ADDR2 + 0x001A)
    606 
    607 #define ESA_KDATA_MIXER_TASK_NUMBER         (ESA_KDATA_BASE_ADDR2 + 0x001B)
    608 #define ESA_KDATA_CURRENT_MIXER             (ESA_KDATA_BASE_ADDR2 + 0x001C)
    609 #define ESA_KDATA_MIXER_ACTIVE              (ESA_KDATA_BASE_ADDR2 + 0x001D)
    610 #define ESA_KDATA_MIXER_BANK_STATUS         (ESA_KDATA_BASE_ADDR2 + 0x001E)
    611 #define ESA_KDATA_DAC_LEFT_VOLUME	        (ESA_KDATA_BASE_ADDR2 + 0x001F)
    612 #define ESA_KDATA_DAC_RIGHT_VOLUME          (ESA_KDATA_BASE_ADDR2 + 0x0020)
    613 
    614 #define ESA_MAX_INSTANCE_MINISRC            (ESA_KDATA_INSTANCE_MINISRC_ENDMARK - KDATA_INSTANCE0_MINISRC)
    615 #define ESA_MAX_VIRTUAL_DMA_CHANNELS        (ESA_KDATA_DMA_XFER_ENDMARK - KDATA_DMA_XFER0)
    616 #define ESA_MAX_VIRTUAL_MIXER_CHANNELS      (ESA_KDATA_MIXER_XFER_ENDMARK - KDATA_MIXER_XFER0)
    617 #define ESA_MAX_VIRTUAL_ADC1_CHANNELS       (ESA_KDATA_ADC1_XFER_ENDMARK - KDATA_ADC1_XFER0)
    618 
    619 /*
    620  * client data area offsets
    621  */
    622 #define ESA_CDATA_INSTANCE_READY            0x00
    623 
    624 #define ESA_CDATA_HOST_SRC_ADDRL            0x01
    625 #define ESA_CDATA_HOST_SRC_ADDRH            0x02
    626 #define ESA_CDATA_HOST_SRC_END_PLUS_1L      0x03
    627 #define ESA_CDATA_HOST_SRC_END_PLUS_1H      0x04
    628 #define ESA_CDATA_HOST_SRC_CURRENTL         0x05
    629 #define ESA_CDATA_HOST_SRC_CURRENTH         0x06
    630 
    631 #define ESA_CDATA_IN_BUF_CONNECT            0x07
    632 #define ESA_CDATA_OUT_BUF_CONNECT           0x08
    633 
    634 #define ESA_CDATA_IN_BUF_BEGIN              0x09
    635 #define ESA_CDATA_IN_BUF_END_PLUS_1         0x0A
    636 #define ESA_CDATA_IN_BUF_HEAD               0x0B
    637 #define ESA_CDATA_IN_BUF_TAIL               0x0C
    638 #define ESA_CDATA_OUT_BUF_BEGIN             0x0D
    639 #define ESA_CDATA_OUT_BUF_END_PLUS_1        0x0E
    640 #define ESA_CDATA_OUT_BUF_HEAD              0x0F
    641 #define ESA_CDATA_OUT_BUF_TAIL              0x10
    642 
    643 #define ESA_CDATA_DMA_CONTROL               0x11
    644 #define ESA_CDATA_RESERVED                  0x12
    645 
    646 #define ESA_CDATA_FREQUENCY                 0x13
    647 #define ESA_CDATA_LEFT_VOLUME               0x14
    648 #define ESA_CDATA_RIGHT_VOLUME              0x15
    649 #define ESA_CDATA_LEFT_SUR_VOL              0x16
    650 #define ESA_CDATA_RIGHT_SUR_VOL             0x17
    651 
    652 #define ESA_CDATA_HEADER_LEN                0x18
    653 
    654 #define ESA_SRC3_DIRECTION_OFFSET           ESA_CDATA_HEADER_LEN
    655 #define ESA_SRC3_MODE_OFFSET                (ESA_CDATA_HEADER_LEN + 1)
    656 #define ESA_SRC3_WORD_LENGTH_OFFSET         (ESA_CDATA_HEADER_LEN + 2)
    657 #define ESA_SRC3_PARAMETER_OFFSET           (ESA_CDATA_HEADER_LEN + 3)
    658 #define ESA_SRC3_COEFF_ADDR_OFFSET          (ESA_CDATA_HEADER_LEN + 8)
    659 #define ESA_SRC3_FILTAP_ADDR_OFFSET         (ESA_CDATA_HEADER_LEN + 10)
    660 #define ESA_SRC3_TEMP_INBUF_ADDR_OFFSET     (ESA_CDATA_HEADER_LEN + 16)
    661 #define ESA_SRC3_TEMP_OUTBUF_ADDR_OFFSET    (ESA_CDATA_HEADER_LEN + 17)
    662 
    663 #define ESA_MINISRC_IN_BUFFER_SIZE   (0x50 * 2)
    664 #define ESA_MINISRC_OUT_BUFFER_SIZE  (0x50 * 2 * 2)
    665 #define ESA_MINISRC_OUT_BUFFER_SIZE  (0x50 * 2 * 2)
    666 #define ESA_MINISRC_TMP_BUFFER_SIZE  (112 + (ESA_MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2)
    667 #define ESA_MINISRC_BIQUAD_STAGE	2
    668 #define ESA_MINISRC_COEF_LOC		0x175
    669 
    670 #define ESA_DMACONTROL_BLOCK_MASK           0x000F
    671 #define  ESA_DMAC_BLOCK0_SELECTOR           0x0000
    672 #define  ESA_DMAC_BLOCK1_SELECTOR           0x0001
    673 #define  ESA_DMAC_BLOCK2_SELECTOR           0x0002
    674 #define  ESA_DMAC_BLOCK3_SELECTOR           0x0003
    675 #define  ESA_DMAC_BLOCK4_SELECTOR           0x0004
    676 #define  ESA_DMAC_BLOCK5_SELECTOR           0x0005
    677 #define  ESA_DMAC_BLOCK6_SELECTOR           0x0006
    678 #define  ESA_DMAC_BLOCK7_SELECTOR           0x0007
    679 #define  ESA_DMAC_BLOCK8_SELECTOR           0x0008
    680 #define  ESA_DMAC_BLOCK9_SELECTOR           0x0009
    681 #define  ESA_DMAC_BLOCKA_SELECTOR           0x000A
    682 #define  ESA_DMAC_BLOCKB_SELECTOR           0x000B
    683 #define  ESA_DMAC_BLOCKC_SELECTOR           0x000C
    684 #define  ESA_DMAC_BLOCKD_SELECTOR           0x000D
    685 #define  ESA_DMAC_BLOCKE_SELECTOR           0x000E
    686 #define  ESA_DMAC_BLOCKF_SELECTOR           0x000F
    687 #define ESA_DMACONTROL_PAGE_MASK            0x00F0
    688 #define  ESA_DMAC_PAGE0_SELECTOR            0x0030
    689 #define  ESA_DMAC_PAGE1_SELECTOR            0x0020
    690 #define  ESA_DMAC_PAGE2_SELECTOR            0x0010
    691 #define  ESA_DMAC_PAGE3_SELECTOR            0x0000
    692 #define ESA_DMACONTROL_AUTOREPEAT           0x1000
    693 #define ESA_DMACONTROL_STOPPED              0x2000
    694 #define ESA_DMACONTROL_DIRECTION            0x0100
    695