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esm.c revision 1.9
      1  1.9      rh /*      $NetBSD: esm.c,v 1.9 2001/03/31 10:10:37 rh Exp $      */
      2  1.1      rh 
      3  1.1      rh /*-
      4  1.1      rh  * Copyright (c) 2000, 2001 Rene Hexel <rh (at) netbsd.org>
      5  1.1      rh  * All rights reserved.
      6  1.1      rh  *
      7  1.1      rh  * Copyright (c) 2000 Taku YAMAMOTO <taku (at) cent.saitama-u.ac.jp>
      8  1.1      rh  * All rights reserved.
      9  1.1      rh  *
     10  1.1      rh  * Redistribution and use in source and binary forms, with or without
     11  1.1      rh  * modification, are permitted provided that the following conditions
     12  1.1      rh  * are met:
     13  1.1      rh  * 1. Redistributions of source code must retain the above copyright
     14  1.1      rh  *    notice, this list of conditions and the following disclaimer.
     15  1.1      rh  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1      rh  *    notice, this list of conditions and the following disclaimer in the
     17  1.1      rh  *    documentation and/or other materials provided with the distribution.
     18  1.1      rh  *
     19  1.1      rh  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     20  1.1      rh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21  1.1      rh  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22  1.1      rh  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     23  1.1      rh  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24  1.1      rh  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25  1.1      rh  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  1.1      rh  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  1.1      rh  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  1.1      rh  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  1.1      rh  * SUCH DAMAGE.
     30  1.1      rh  *
     31  1.1      rh  * Taku Id: maestro.c,v 1.12 2000/09/06 03:32:34 taku Exp
     32  1.1      rh  * FreeBSD: /c/ncvs/src/sys/dev/sound/pci/maestro.c,v 1.4 2000/12/18 01:36:35 cg Exp
     33  1.1      rh  */
     34  1.1      rh 
     35  1.1      rh /*
     36  1.1      rh  * TODO:
     37  1.1      rh  *	- hardware volume support
     38  1.1      rh  *	- recording
     39  1.1      rh  *	- MIDI support
     40  1.1      rh  *	- joystick support
     41  1.1      rh  *
     42  1.1      rh  *
     43  1.1      rh  * Credits:
     44  1.1      rh  *
     45  1.1      rh  * This code is based on the FreeBSD driver written by Taku YAMAMOTO
     46  1.1      rh  *
     47  1.1      rh  *
     48  1.1      rh  * Original credits from the FreeBSD driver:
     49  1.1      rh  *
     50  1.1      rh  * Part of this code (especially in many magic numbers) was heavily inspired
     51  1.1      rh  * by the Linux driver originally written by
     52  1.1      rh  * Alan Cox <alan.cox (at) linux.org>, modified heavily by
     53  1.1      rh  * Zach Brown <zab (at) zabbo.net>.
     54  1.1      rh  *
     55  1.1      rh  * busdma()-ize and buffer size reduction were suggested by
     56  1.1      rh  * Cameron Grant <gandalf (at) vilnya.demon.co.uk>.
     57  1.1      rh  * Also he showed me the way to use busdma() suite.
     58  1.1      rh  *
     59  1.1      rh  * Internal speaker problems on NEC VersaPro's and Dell Inspiron 7500
     60  1.1      rh  * were looked at by
     61  1.1      rh  * Munehiro Matsuda <haro (at) tk.kubota.co.jp>,
     62  1.1      rh  * who brought patches based on the Linux driver with some simplification.
     63  1.1      rh  */
     64  1.1      rh 
     65  1.1      rh #include <sys/param.h>
     66  1.1      rh #include <sys/systm.h>
     67  1.1      rh #include <sys/kernel.h>
     68  1.1      rh #include <sys/malloc.h>
     69  1.1      rh #include <sys/device.h>
     70  1.1      rh 
     71  1.1      rh #include <machine/bus.h>
     72  1.1      rh 
     73  1.1      rh #include <sys/audioio.h>
     74  1.1      rh #include <dev/audio_if.h>
     75  1.1      rh #include <dev/mulaw.h>
     76  1.1      rh #include <dev/auconv.h>
     77  1.1      rh #include <dev/ic/ac97var.h>
     78  1.8  ichiro #include <dev/ic/ac97reg.h>
     79  1.1      rh 
     80  1.1      rh #include <dev/pci/pcidevs.h>
     81  1.1      rh #include <dev/pci/pcivar.h>
     82  1.1      rh 
     83  1.1      rh #include <dev/pci/esmreg.h>
     84  1.1      rh #include <dev/pci/esmvar.h>
     85  1.1      rh 
     86  1.1      rh #define	PCI_CBIO		0x10	/* Configuration Base I/O Address */
     87  1.1      rh 
     88  1.1      rh /* Debug */
     89  1.1      rh #ifdef AUDIO_DEBUG
     90  1.1      rh #define DPRINTF(l,x)	do { if (esm_debug & (l)) printf x; } while(0)
     91  1.1      rh #define DUMPREG(x)	do { if (esm_debug & ESM_DEBUG_REG)	\
     92  1.1      rh 				 esm_dump_regs(x); } while(0)
     93  1.1      rh int esm_debug = 0xfffc;
     94  1.1      rh #define ESM_DEBUG_CODECIO	0x0001
     95  1.1      rh #define ESM_DEBUG_IRQ		0x0002
     96  1.1      rh #define ESM_DEBUG_DMA		0x0004
     97  1.1      rh #define ESM_DEBUG_TIMER		0x0008
     98  1.1      rh #define ESM_DEBUG_REG		0x0010
     99  1.1      rh #define ESM_DEBUG_PARAM		0x0020
    100  1.1      rh #define ESM_DEBUG_APU		0x0040
    101  1.1      rh #define ESM_DEBUG_CODEC		0x0080
    102  1.3      rh #define ESM_DEBUG_PCI		0x0100
    103  1.8  ichiro #define ESM_DEBUG_RESUME	0x0200
    104  1.1      rh #else
    105  1.1      rh #define DPRINTF(x,y)	/* nothing */
    106  1.1      rh #define DUMPREG(x)	/* nothing */
    107  1.1      rh #endif
    108  1.1      rh 
    109  1.1      rh #ifdef DIAGNOSTIC
    110  1.1      rh #define RANGE(n, l, h)	if ((n) < (l) || (n) >= (h))			\
    111  1.1      rh 		printf (#n "=%d out of range (%d, %d) in "		\
    112  1.1      rh 		__FILE__ ", line %d\n", (n), (l), (h), __LINE__)
    113  1.1      rh #else
    114  1.1      rh #define RANGE(x,y,z)	/* nothing */
    115  1.1      rh #endif
    116  1.1      rh 
    117  1.1      rh #define inline __inline
    118  1.1      rh 
    119  1.1      rh static inline void	 ringbus_setdest(struct esm_softc *, int, int);
    120  1.1      rh 
    121  1.1      rh static inline u_int16_t	wp_rdreg(struct esm_softc *, u_int16_t);
    122  1.1      rh static inline void	wp_wrreg(struct esm_softc *, u_int16_t, u_int16_t);
    123  1.1      rh static inline u_int16_t	wp_rdapu(struct esm_softc *, int, u_int16_t);
    124  1.1      rh static inline void	wp_wrapu(struct esm_softc *, int, u_int16_t,
    125  1.1      rh 			    u_int16_t);
    126  1.1      rh static inline void	wp_settimer(struct esm_softc *, u_int);
    127  1.1      rh static inline void	wp_starttimer(struct esm_softc *);
    128  1.1      rh static inline void	wp_stoptimer(struct esm_softc *);
    129  1.1      rh 
    130  1.1      rh static inline u_int16_t	wc_rdreg(struct esm_softc *, u_int16_t);
    131  1.1      rh static inline void	wc_wrreg(struct esm_softc *, u_int16_t, u_int16_t);
    132  1.1      rh static inline u_int16_t	wc_rdchctl(struct esm_softc *, int);
    133  1.1      rh static inline void	wc_wrchctl(struct esm_softc *, int, u_int16_t);
    134  1.1      rh 
    135  1.1      rh static inline u_int	calc_timer_freq(struct esm_chinfo*);
    136  1.1      rh static void		set_timer(struct esm_softc *);
    137  1.1      rh 
    138  1.1      rh static void		esmch_set_format(struct esm_chinfo *,
    139  1.1      rh 			    struct audio_params *p);
    140  1.1      rh 
    141  1.7  ichiro /* Power Management */
    142  1.7  ichiro void esm_powerhook(int, void *);
    143  1.7  ichiro 
    144  1.1      rh struct cfattach esm_ca = {
    145  1.1      rh 	sizeof(struct esm_softc), esm_match, esm_attach
    146  1.1      rh };
    147  1.1      rh 
    148  1.1      rh struct audio_hw_if esm_hw_if = {
    149  1.1      rh 	esm_open,
    150  1.1      rh 	esm_close,
    151  1.1      rh 	NULL,				/* drain */
    152  1.1      rh 	esm_query_encoding,
    153  1.1      rh 	esm_set_params,
    154  1.1      rh 	esm_round_blocksize,
    155  1.1      rh 	NULL,				/* commit_settings */
    156  1.1      rh 	esm_init_output,
    157  1.1      rh 	NULL,				/* init_input */
    158  1.1      rh 	NULL,				/* start_output */
    159  1.1      rh 	NULL,				/* start_input */
    160  1.1      rh 	esm_halt_output,
    161  1.1      rh 	esm_halt_input,
    162  1.1      rh 	NULL,				/* speaker_ctl */
    163  1.1      rh 	esm_getdev,
    164  1.1      rh 	NULL,				/* getfd */
    165  1.1      rh 	esm_set_port,
    166  1.1      rh 	esm_get_port,
    167  1.1      rh 	esm_query_devinfo,
    168  1.1      rh 	esm_malloc,
    169  1.1      rh 	esm_free,
    170  1.1      rh 	esm_round_buffersize,
    171  1.1      rh 	esm_mappage,
    172  1.1      rh 	esm_get_props,
    173  1.1      rh 	esm_trigger_output,
    174  1.1      rh 	esm_trigger_input
    175  1.1      rh };
    176  1.1      rh 
    177  1.1      rh struct audio_device esm_device = {
    178  1.1      rh 	"ESS Maestro",
    179  1.1      rh 	"",
    180  1.1      rh 	"esm"
    181  1.1      rh };
    182  1.1      rh 
    183  1.1      rh 
    184  1.1      rh static audio_encoding_t esm_encoding[] = {
    185  1.1      rh 	{ 0, AudioEulinear, AUDIO_ENCODING_ULINEAR, 8, 0 },
    186  1.1      rh 	{ 1, AudioEmulaw, AUDIO_ENCODING_ULAW, 8,
    187  1.1      rh 		AUDIO_ENCODINGFLAG_EMULATED },
    188  1.1      rh 	{ 2, AudioEalaw, AUDIO_ENCODING_ALAW, 8, AUDIO_ENCODINGFLAG_EMULATED },
    189  1.1      rh 	{ 3, AudioEslinear, AUDIO_ENCODING_SLINEAR, 8, 0 },
    190  1.1      rh 	{ 4, AudioEslinear_le, AUDIO_ENCODING_SLINEAR_LE, 16, 0 },
    191  1.1      rh 	{ 5, AudioEulinear_le, AUDIO_ENCODING_ULINEAR_LE, 16,
    192  1.1      rh 		AUDIO_ENCODINGFLAG_EMULATED },
    193  1.1      rh 	{ 6, AudioEslinear_be, AUDIO_ENCODING_SLINEAR_BE, 16,
    194  1.1      rh 		AUDIO_ENCODINGFLAG_EMULATED },
    195  1.1      rh 	{ 7, AudioEulinear_be, AUDIO_ENCODING_ULINEAR_BE, 16,
    196  1.1      rh 		AUDIO_ENCODINGFLAG_EMULATED },
    197  1.1      rh };
    198  1.1      rh 
    199  1.1      rh #define MAESTRO_NENCODINGS 8
    200  1.1      rh 
    201  1.3      rh 
    202  1.3      rh static const struct esm_quirks esm_quirks[] = {
    203  1.3      rh 	/* COMPAL 38W2 OEM Notebook, e.g. Dell INSPIRON 5000e */
    204  1.3      rh 	{ PCI_VENDOR_COMPAL, PCI_PRODUCT_COMPAL_38W2, ESM_QUIRKF_SWAPPEDCH },
    205  1.3      rh 
    206  1.5      rh 	/* COMPAQ Armada M700 Notebook */
    207  1.5      rh 	{ PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_M700, ESM_QUIRKF_SWAPPEDCH },
    208  1.5      rh 
    209  1.3      rh 	/* NEC Versa Pro LX VA26D */
    210  1.3      rh 	{ PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VA26D, ESM_QUIRKF_GPIO },
    211  1.3      rh 
    212  1.3      rh 	/* NEC Versa LX */
    213  1.6      rh 	{ PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VERSALX, ESM_QUIRKF_GPIO },
    214  1.6      rh 
    215  1.6      rh 	/* Toshiba Protege */
    216  1.6      rh 	{ PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PROTEGE, ESM_QUIRKF_SWAPPEDCH }
    217  1.3      rh };
    218  1.3      rh 
    219  1.3      rh enum esm_quirk_flags
    220  1.3      rh esm_get_quirks(pcireg_t subid)
    221  1.3      rh {
    222  1.3      rh 	int i;
    223  1.3      rh 
    224  1.3      rh 	for (i = 0; i < (sizeof esm_quirks / sizeof esm_quirks[0]); i++) {
    225  1.3      rh 		if (PCI_VENDOR(subid) == esm_quirks[i].eq_vendor &&
    226  1.3      rh 		    PCI_PRODUCT(subid) == esm_quirks[i].eq_product) {
    227  1.3      rh 			return esm_quirks[i].eq_quirks;
    228  1.3      rh 		}
    229  1.3      rh 	}
    230  1.3      rh 
    231  1.3      rh 	return 0;
    232  1.3      rh }
    233  1.3      rh 
    234  1.3      rh 
    235  1.1      rh #ifdef AUDIO_DEBUG
    236  1.1      rh struct esm_reg_info {
    237  1.1      rh 	int	offset;			/* register offset */
    238  1.1      rh 	int	width;			/* 1/2/4 bytes */
    239  1.1      rh } dump_regs[] = {
    240  1.1      rh 	{ PORT_WAVCACHE_CTRL,		2 },
    241  1.1      rh 	{ PORT_HOSTINT_CTRL,		2 },
    242  1.1      rh 	{ PORT_HOSTINT_STAT,		2 },
    243  1.1      rh 	{ PORT_HWVOL_VOICE_SHADOW,	1 },
    244  1.1      rh 	{ PORT_HWVOL_VOICE,		1 },
    245  1.1      rh 	{ PORT_HWVOL_MASTER_SHADOW,	1 },
    246  1.1      rh 	{ PORT_HWVOL_MASTER,		1 },
    247  1.1      rh 	{ PORT_RINGBUS_CTRL,		4 },
    248  1.1      rh 	{ PORT_GPIO_DATA,		2 },
    249  1.1      rh 	{ PORT_GPIO_MASK,		2 },
    250  1.1      rh 	{ PORT_GPIO_DIR,		2 },
    251  1.1      rh 	{ PORT_ASSP_CTRL_A,		1 },
    252  1.1      rh 	{ PORT_ASSP_CTRL_B,		1 },
    253  1.1      rh 	{ PORT_ASSP_CTRL_C,		1 },
    254  1.3      rh 	{ PORT_ASSP_INT_STAT,		1 }
    255  1.1      rh };
    256  1.1      rh 
    257  1.2   lukem static void
    258  1.2   lukem esm_dump_regs(struct esm_softc *ess)
    259  1.1      rh {
    260  1.3      rh 	int i;
    261  1.1      rh 
    262  1.1      rh 	printf("%s registers:", ess->sc_dev.dv_xname);
    263  1.3      rh 	for (i = 0; i < (sizeof dump_regs / sizeof dump_regs[0]); i++) {
    264  1.1      rh 		if (i % 5 == 0)
    265  1.1      rh 			printf("\n");
    266  1.1      rh 		printf("0x%2.2x: ", dump_regs[i].offset);
    267  1.1      rh 		switch(dump_regs[i].width) {
    268  1.1      rh 		case 4:
    269  1.1      rh 			printf("%8.8x, ", bus_space_read_4(ess->st, ess->sh,
    270  1.1      rh 			    dump_regs[i].offset));
    271  1.1      rh 			break;
    272  1.1      rh 		case 2:
    273  1.1      rh 			printf("%4.4x,     ", bus_space_read_2(ess->st, ess->sh,
    274  1.1      rh 			    dump_regs[i].offset));
    275  1.1      rh 			break;
    276  1.1      rh 		default:
    277  1.1      rh 			printf("%2.2x,       ",
    278  1.1      rh 			    bus_space_read_1(ess->st, ess->sh,
    279  1.1      rh 			    dump_regs[i].offset));
    280  1.1      rh 		}
    281  1.1      rh 	}
    282  1.1      rh 	printf("\n");
    283  1.1      rh }
    284  1.1      rh #endif
    285  1.1      rh 
    286  1.3      rh 
    287  1.1      rh /* -----------------------------
    288  1.1      rh  * Subsystems.
    289  1.1      rh  */
    290  1.1      rh 
    291  1.1      rh /* Codec/Ringbus */
    292  1.1      rh 
    293  1.1      rh /* -------------------------------------------------------------------- */
    294  1.1      rh 
    295  1.1      rh int
    296  1.1      rh esm_read_codec(void *sc, u_int8_t regno, u_int16_t *result)
    297  1.1      rh {
    298  1.1      rh 	struct esm_softc *ess = sc;
    299  1.1      rh 	unsigned t;
    300  1.1      rh 
    301  1.1      rh 	/* We have to wait for a SAFE time to write addr/data */
    302  1.1      rh 	for (t = 0; t < 20; t++) {
    303  1.1      rh 		if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    304  1.1      rh 		    & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS)
    305  1.1      rh 			break;
    306  1.1      rh 		delay(2);	/* 20.8us / 13 */
    307  1.1      rh 	}
    308  1.1      rh 	if (t == 20)
    309  1.1      rh 		printf("%s: esm_read_codec() PROGLESS timed out.\n",
    310  1.1      rh 		    ess->sc_dev.dv_xname);
    311  1.1      rh 
    312  1.1      rh 	bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD,
    313  1.1      rh 	    CODEC_CMD_READ | regno);
    314  1.1      rh 	delay(21);	/* AC97 cycle = 20.8usec */
    315  1.1      rh 
    316  1.1      rh 	/* Wait for data retrieve */
    317  1.1      rh 	for (t = 0; t < 20; t++) {
    318  1.1      rh 		if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    319  1.1      rh 		    & CODEC_STAT_MASK) == CODEC_STAT_RW_DONE)
    320  1.1      rh 			break;
    321  1.1      rh 		delay(2);	/* 20.8us / 13 */
    322  1.1      rh 	}
    323  1.1      rh 	if (t == 20)
    324  1.1      rh 		/* Timed out, but perform dummy read. */
    325  1.1      rh 		printf("%s: esm_read_codec() RW_DONE timed out.\n",
    326  1.1      rh 		    ess->sc_dev.dv_xname);
    327  1.1      rh 
    328  1.1      rh 	*result = bus_space_read_2(ess->st, ess->sh, PORT_CODEC_REG);
    329  1.1      rh 
    330  1.1      rh 	return 0;
    331  1.1      rh }
    332  1.1      rh 
    333  1.1      rh int
    334  1.1      rh esm_write_codec(void *sc, u_int8_t regno, u_int16_t data)
    335  1.1      rh {
    336  1.1      rh 	struct esm_softc *ess = sc;
    337  1.1      rh 	unsigned t;
    338  1.1      rh 
    339  1.1      rh 	/* We have to wait for a SAFE time to write addr/data */
    340  1.1      rh 	for (t = 0; t < 20; t++) {
    341  1.1      rh 		if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    342  1.1      rh 		    & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS)
    343  1.1      rh 			break;
    344  1.1      rh 		delay(2);	/* 20.8us / 13 */
    345  1.1      rh 	}
    346  1.1      rh 	if (t == 20) {
    347  1.1      rh 		/* Timed out. Abort writing. */
    348  1.1      rh 		printf("%s: esm_write_codec() PROGLESS timed out.\n",
    349  1.1      rh 		    ess->sc_dev.dv_xname);
    350  1.1      rh 		return -1;
    351  1.1      rh 	}
    352  1.1      rh 
    353  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_CODEC_REG, data);
    354  1.1      rh 	bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD,
    355  1.1      rh 	    CODEC_CMD_WRITE | regno);
    356  1.1      rh 
    357  1.1      rh 	return 0;
    358  1.1      rh }
    359  1.1      rh 
    360  1.1      rh /* -------------------------------------------------------------------- */
    361  1.1      rh 
    362  1.1      rh static inline void
    363  1.1      rh ringbus_setdest(struct esm_softc *ess, int src, int dest)
    364  1.1      rh {
    365  1.1      rh 	u_int32_t data;
    366  1.1      rh 
    367  1.1      rh 	data = bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL);
    368  1.1      rh 	data &= ~(0xfU << src);
    369  1.1      rh 	data |= (0xfU & dest) << src;
    370  1.1      rh 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, data);
    371  1.1      rh }
    372  1.1      rh 
    373  1.1      rh /* Wave Processor */
    374  1.1      rh 
    375  1.1      rh static inline u_int16_t
    376  1.1      rh wp_rdreg(struct esm_softc *ess, u_int16_t reg)
    377  1.1      rh {
    378  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg);
    379  1.1      rh 	return bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA);
    380  1.1      rh }
    381  1.1      rh 
    382  1.1      rh static inline void
    383  1.1      rh wp_wrreg(struct esm_softc *ess, u_int16_t reg, u_int16_t data)
    384  1.1      rh {
    385  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg);
    386  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data);
    387  1.1      rh }
    388  1.1      rh 
    389  1.1      rh static inline void
    390  1.1      rh apu_setindex(struct esm_softc *ess, u_int16_t reg)
    391  1.1      rh {
    392  1.1      rh 	int t;
    393  1.1      rh 
    394  1.1      rh 	wp_wrreg(ess, WPREG_CRAM_PTR, reg);
    395  1.1      rh 	/* Sometimes WP fails to set apu register index. */
    396  1.1      rh 	for (t = 0; t < 1000; t++) {
    397  1.1      rh 		if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == reg)
    398  1.1      rh 			break;
    399  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, reg);
    400  1.1      rh 	}
    401  1.1      rh 	if (t == 1000)
    402  1.1      rh 		printf("%s: apu_setindex() timed out.\n", ess->sc_dev.dv_xname);
    403  1.1      rh }
    404  1.1      rh 
    405  1.1      rh static inline u_int16_t
    406  1.1      rh wp_rdapu(struct esm_softc *ess, int ch, u_int16_t reg)
    407  1.1      rh {
    408  1.1      rh 	u_int16_t ret;
    409  1.1      rh 
    410  1.1      rh 	apu_setindex(ess, ((unsigned)ch << 4) + reg);
    411  1.1      rh 	ret = wp_rdreg(ess, WPREG_DATA_PORT);
    412  1.1      rh 	return ret;
    413  1.1      rh }
    414  1.1      rh 
    415  1.1      rh static inline void
    416  1.1      rh wp_wrapu(struct esm_softc *ess, int ch, u_int16_t reg, u_int16_t data)
    417  1.1      rh {
    418  1.1      rh 	int t;
    419  1.1      rh 
    420  1.1      rh 	DPRINTF(ESM_DEBUG_APU,
    421  1.1      rh 	    ("wp_wrapu(%p, ch=%d, reg=0x%x, data=0x%04x)\n",
    422  1.1      rh 	    ess, ch, reg, data));
    423  1.1      rh 
    424  1.1      rh 	apu_setindex(ess, ((unsigned)ch << 4) + reg);
    425  1.1      rh 	wp_wrreg(ess, WPREG_DATA_PORT, data);
    426  1.1      rh 	for (t = 0; t < 1000; t++) {
    427  1.1      rh 		if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == data)
    428  1.1      rh 			break;
    429  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data);
    430  1.1      rh 	}
    431  1.1      rh 	if (t == 1000)
    432  1.1      rh 		printf("%s: wp_wrapu() timed out.\n", ess->sc_dev.dv_xname);
    433  1.1      rh }
    434  1.1      rh 
    435  1.1      rh static inline void
    436  1.1      rh wp_settimer(struct esm_softc *ess, u_int freq)
    437  1.1      rh {
    438  1.1      rh 	u_int clock = 48000 << 2;
    439  1.1      rh 	u_int prescale = 0, divide = (freq != 0) ? (clock / freq) : ~0;
    440  1.1      rh 
    441  1.1      rh 	RANGE(divide, WPTIMER_MINDIV, WPTIMER_MAXDIV);
    442  1.1      rh 
    443  1.1      rh 	for (; divide > 32 << 1; divide >>= 1)
    444  1.1      rh 		prescale++;
    445  1.1      rh 	divide = (divide + 1) >> 1;
    446  1.1      rh 
    447  1.1      rh 	for (; prescale < 7 && divide > 2 && !(divide & 1); divide >>= 1)
    448  1.1      rh 		prescale++;
    449  1.1      rh 
    450  1.1      rh 	DPRINTF(ESM_DEBUG_TIMER,
    451  1.1      rh 	    ("wp_settimer(%p, %u): clock = %u, prescale = %u, divide = %u\n",
    452  1.1      rh 	    ess, freq, clock, prescale, divide));
    453  1.1      rh 
    454  1.1      rh 	wp_wrreg(ess, WPREG_TIMER_ENABLE, 0);
    455  1.1      rh 	wp_wrreg(ess, WPREG_TIMER_FREQ,
    456  1.1      rh 	    (prescale << WP_TIMER_FREQ_PRESCALE_SHIFT) | (divide - 1));
    457  1.1      rh 	wp_wrreg(ess, WPREG_TIMER_ENABLE, 1);
    458  1.1      rh }
    459  1.1      rh 
    460  1.1      rh static inline void
    461  1.1      rh wp_starttimer(struct esm_softc *ess)
    462  1.1      rh {
    463  1.1      rh 	wp_wrreg(ess, WPREG_TIMER_START, 1);
    464  1.1      rh }
    465  1.1      rh 
    466  1.1      rh static inline void
    467  1.1      rh wp_stoptimer(struct esm_softc *ess)
    468  1.1      rh {
    469  1.1      rh 	wp_wrreg(ess, WPREG_TIMER_START, 0);
    470  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1);
    471  1.1      rh }
    472  1.1      rh 
    473  1.1      rh /* WaveCache */
    474  1.1      rh 
    475  1.1      rh static inline u_int16_t
    476  1.1      rh wc_rdreg(struct esm_softc *ess, u_int16_t reg)
    477  1.1      rh {
    478  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_INDEX, reg);
    479  1.1      rh 	return bus_space_read_2(ess->st, ess->sh, PORT_WAVCACHE_DATA);
    480  1.1      rh }
    481  1.1      rh 
    482  1.1      rh static inline void
    483  1.1      rh wc_wrreg(struct esm_softc *ess, u_int16_t reg, u_int16_t data)
    484  1.1      rh {
    485  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_INDEX, reg);
    486  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_DATA, data);
    487  1.1      rh }
    488  1.1      rh 
    489  1.1      rh static inline u_int16_t
    490  1.1      rh wc_rdchctl(struct esm_softc *ess, int ch)
    491  1.1      rh {
    492  1.1      rh 	return wc_rdreg(ess, ch << 3);
    493  1.1      rh }
    494  1.1      rh 
    495  1.1      rh static inline void
    496  1.1      rh wc_wrchctl(struct esm_softc *ess, int ch, u_int16_t data)
    497  1.1      rh {
    498  1.1      rh 	wc_wrreg(ess, ch << 3, data);
    499  1.1      rh }
    500  1.1      rh 
    501  1.1      rh /* Power management */
    502  1.1      rh 
    503  1.1      rh void
    504  1.1      rh esm_power(struct esm_softc *ess, int status)
    505  1.1      rh {
    506  1.1      rh 	u_int8_t data;
    507  1.1      rh 
    508  1.1      rh 	data = pci_conf_read(ess->pc, ess->tag, CONF_PM_PTR);
    509  1.1      rh 	if ((pci_conf_read(ess->pc, ess->tag, data) & 0xff) == PPMI_CID)
    510  1.1      rh 		pci_conf_write(ess->pc, ess->tag, data + PM_CTRL, status);
    511  1.1      rh }
    512  1.1      rh 
    513  1.1      rh 
    514  1.1      rh /* -----------------------------
    515  1.1      rh  * Controller.
    516  1.1      rh  */
    517  1.1      rh 
    518  1.1      rh int
    519  1.1      rh esm_attach_codec(void *sc, struct ac97_codec_if *codec_if)
    520  1.1      rh {
    521  1.1      rh 	struct esm_softc *ess = sc;
    522  1.1      rh 
    523  1.1      rh 	ess->codec_if = codec_if;
    524  1.1      rh 
    525  1.1      rh 	return 0;
    526  1.1      rh }
    527  1.1      rh 
    528  1.1      rh void
    529  1.1      rh esm_reset_codec(void *sc)
    530  1.1      rh {
    531  1.1      rh }
    532  1.1      rh 
    533  1.1      rh 
    534  1.3      rh enum ac97_host_flags
    535  1.3      rh esm_flags_codec(void *sc)
    536  1.3      rh {
    537  1.3      rh 	struct esm_softc *ess = sc;
    538  1.3      rh 
    539  1.3      rh 	return ess->codec_flags;
    540  1.3      rh }
    541  1.3      rh 
    542  1.3      rh 
    543  1.1      rh void
    544  1.1      rh esm_initcodec(struct esm_softc *ess)
    545  1.1      rh {
    546  1.1      rh 	u_int16_t data;
    547  1.1      rh 
    548  1.1      rh 	DPRINTF(ESM_DEBUG_CODEC, ("esm_initcodec(%p)\n", ess));
    549  1.1      rh 
    550  1.1      rh 	if (bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL)
    551  1.1      rh 	    & RINGBUS_CTRL_ACLINK_ENABLED) {
    552  1.1      rh 		bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
    553  1.1      rh 		delay(104);	/* 20.8us * (4 + 1) */
    554  1.1      rh 	}
    555  1.1      rh 	/* XXX - 2nd codec should be looked at. */
    556  1.1      rh 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    557  1.1      rh 	    RINGBUS_CTRL_AC97_SWRESET);
    558  1.1      rh 	delay(2);
    559  1.1      rh 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    560  1.1      rh 	    RINGBUS_CTRL_ACLINK_ENABLED);
    561  1.1      rh 	delay(21);
    562  1.1      rh 
    563  1.1      rh 	esm_read_codec(ess, 0, &data);
    564  1.1      rh 	if (bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    565  1.1      rh 	    & CODEC_STAT_MASK) {
    566  1.1      rh 		bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
    567  1.1      rh 		delay(21);
    568  1.1      rh 
    569  1.1      rh 		/* Try cold reset. */
    570  1.1      rh 		printf("%s: will perform cold reset.\n", ess->sc_dev.dv_xname);
    571  1.1      rh 		data = bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR);
    572  1.1      rh 		if (pci_conf_read(ess->pc, ess->tag, 0x58) & 1)
    573  1.1      rh 			data |= 0x10;
    574  1.1      rh 		data |= 0x009 &
    575  1.1      rh 		    ~bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DATA);
    576  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, 0xff6);
    577  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR,
    578  1.1      rh 		    data | 0x009);
    579  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x000);
    580  1.1      rh 		delay(2);
    581  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x001);
    582  1.1      rh 		delay(1);
    583  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x009);
    584  1.1      rh 		delay(500000);
    585  1.1      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, data);
    586  1.1      rh 		delay(84);	/* 20.8us * 4 */
    587  1.1      rh 		bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    588  1.1      rh 		    RINGBUS_CTRL_ACLINK_ENABLED);
    589  1.1      rh 		delay(21);
    590  1.1      rh 	}
    591  1.1      rh }
    592  1.1      rh 
    593  1.1      rh void
    594  1.1      rh esm_init(struct esm_softc *ess)
    595  1.1      rh {
    596  1.1      rh 	/* Reset direct sound. */
    597  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL,
    598  1.1      rh 	    HOSTINT_CTRL_DSOUND_RESET);
    599  1.1      rh 	delay(10000);
    600  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0);
    601  1.1      rh 	delay(10000);
    602  1.1      rh 
    603  1.1      rh 	/* Enable direct sound interruption. */
    604  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL,
    605  1.1      rh 	    HOSTINT_CTRL_DSOUND_INT_ENABLED);
    606  1.1      rh 
    607  1.1      rh 	/* Setup Wave Processor. */
    608  1.1      rh 
    609  1.1      rh 	/* Enable WaveCache */
    610  1.1      rh 	wp_wrreg(ess, WPREG_WAVE_ROMRAM,
    611  1.1      rh 	    WP_WAVE_VIRTUAL_ENABLED | WP_WAVE_DRAM_ENABLED);
    612  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_CTRL,
    613  1.1      rh 	    WAVCACHE_ENABLED | WAVCACHE_WTSIZE_4MB);
    614  1.1      rh 
    615  1.1      rh 	/* Setup Codec/Ringbus. */
    616  1.1      rh 	esm_initcodec(ess);
    617  1.1      rh 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    618  1.1      rh 	    RINGBUS_CTRL_RINGBUS_ENABLED | RINGBUS_CTRL_ACLINK_ENABLED);
    619  1.1      rh 
    620  1.1      rh 	wp_wrreg(ess, WPREG_BASE, 0x8500);	/* Parallel I/O */
    621  1.1      rh 	ringbus_setdest(ess, RINGBUS_SRC_ADC,
    622  1.1      rh 	    RINGBUS_DEST_STEREO | RINGBUS_DEST_DSOUND_IN);
    623  1.1      rh 	ringbus_setdest(ess, RINGBUS_SRC_DSOUND,
    624  1.1      rh 	    RINGBUS_DEST_STEREO | RINGBUS_DEST_DAC);
    625  1.1      rh 
    626  1.1      rh 	/* Setup ASSP. Needed for Dell Inspiron 7500? */
    627  1.1      rh 	bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_B, 0x00);
    628  1.1      rh 	bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_A, 0x03);
    629  1.1      rh 	bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_C, 0x00);
    630  1.1      rh 
    631  1.1      rh 	/*
    632  1.1      rh 	 * Setup GPIO.
    633  1.1      rh 	 * There seems to be speciality with NEC systems.
    634  1.1      rh 	 */
    635  1.3      rh 	if (esm_get_quirks(ess->subid) & ESM_QUIRKF_GPIO) {
    636  1.3      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK,
    637  1.3      rh 		    0x9ff);
    638  1.3      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR,
    639  1.3      rh 		    bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR) |
    640  1.3      rh 			0x600);
    641  1.3      rh 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA,
    642  1.3      rh 		    0x200);
    643  1.1      rh 	}
    644  1.1      rh 
    645  1.1      rh 	DUMPREG(ess);
    646  1.1      rh }
    647  1.1      rh 
    648  1.1      rh 
    649  1.1      rh /* Channel controller. */
    650  1.1      rh 
    651  1.1      rh int
    652  1.1      rh esm_init_output (void *sc, void *start, int size)
    653  1.1      rh {
    654  1.1      rh 	struct esm_softc *ess = sc;
    655  1.1      rh 	struct esm_dma *p;
    656  1.1      rh 	u_int32_t data;
    657  1.1      rh 
    658  1.1      rh 	for (p = ess->sc_dmas; p && KERNADDR(p) != start; p = p->next)
    659  1.1      rh 		;
    660  1.1      rh 	if (!p) {
    661  1.1      rh 		printf("%s: esm_init_output: bad addr %p\n",
    662  1.1      rh 		    ess->sc_dev.dv_xname, start);
    663  1.1      rh 		return EINVAL;
    664  1.1      rh 	}
    665  1.1      rh 
    666  1.1      rh 	ess->pch.base = DMAADDR(p) & ~0xFFF;
    667  1.1      rh 
    668  1.1      rh 	DPRINTF(ESM_DEBUG_DMA, ("%s: pch.base = 0x%x\n",
    669  1.1      rh 		ess->sc_dev.dv_xname, ess->pch.base));
    670  1.1      rh 
    671  1.1      rh 	/* set DMA base address */
    672  1.1      rh 	for (data = WAVCACHE_PCMBAR; data < WAVCACHE_PCMBAR + 4; data++)
    673  1.1      rh 		wc_wrreg(ess, data, ess->pch.base >> WAVCACHE_BASEADDR_SHIFT);
    674  1.1      rh 
    675  1.1      rh 	return 0;
    676  1.1      rh }
    677  1.1      rh 
    678  1.1      rh 
    679  1.1      rh int
    680  1.1      rh esm_trigger_output(void *sc, void *start, void *end, int blksize,
    681  1.1      rh     void (*intr)(void *), void *arg, struct audio_params *param)
    682  1.1      rh {
    683  1.1      rh 	struct esm_softc *ess = sc;
    684  1.1      rh 	struct esm_chinfo *ch = &ess->pch;
    685  1.1      rh 	struct esm_dma *p;
    686  1.1      rh 	int pan = 0, choffset;
    687  1.3      rh 	int i, nch = 1;
    688  1.1      rh 	unsigned speed = ch->sample_rate, offset, wpwa, dv;
    689  1.1      rh 	size_t size;
    690  1.1      rh 	u_int16_t apuch = ch->num << 1;
    691  1.1      rh 
    692  1.1      rh 	DPRINTF(ESM_DEBUG_DMA,
    693  1.1      rh 	    ("esm_trigger_output(%p, %p, %p, 0x%x, %p, %p, %p)\n",
    694  1.1      rh 	    sc, start, end, blksize, intr, arg, param));
    695  1.1      rh 
    696  1.1      rh #ifdef DIAGNOSTIC
    697  1.1      rh 	if (ess->pactive) {
    698  1.1      rh 		printf("%s: esm_trigger_output: already running",
    699  1.1      rh 		    ess->sc_dev.dv_xname);
    700  1.1      rh 		return EINVAL;
    701  1.1      rh 	}
    702  1.1      rh #endif
    703  1.1      rh 
    704  1.1      rh 	ess->sc_pintr = intr;
    705  1.1      rh 	ess->sc_parg = arg;
    706  1.1      rh 	for (p = ess->sc_dmas; p && KERNADDR(p) != start; p = p->next)
    707  1.1      rh 		;
    708  1.1      rh 	if (!p) {
    709  1.1      rh 		printf("%s: esm_trigger_output: bad addr %p\n",
    710  1.1      rh 		    ess->sc_dev.dv_xname, start);
    711  1.1      rh 		return EINVAL;
    712  1.1      rh 	}
    713  1.1      rh 
    714  1.1      rh 	ess->pch.blocksize = blksize;
    715  1.1      rh 	ess->pch.apublk = blksize >> 1;
    716  1.1      rh 	ess->pactive = 1;
    717  1.1      rh 
    718  1.1      rh 	size = (size_t)(((caddr_t)end - (caddr_t)start) >> 1);
    719  1.1      rh 	choffset = DMAADDR(p) - ess->pch.base;
    720  1.1      rh 	offset = choffset >> 1;
    721  1.1      rh 	wpwa = APU_USE_SYSMEM | (offset >> 9);
    722  1.1      rh 
    723  1.1      rh 	DPRINTF(ESM_DEBUG_DMA,
    724  1.1      rh 	    ("choffs=0x%x, wpwa=0x%x, size=0x%x words\n",
    725  1.1      rh 	    choffset, wpwa, size));
    726  1.1      rh 
    727  1.1      rh 	switch (ch->aputype) {
    728  1.1      rh 	case APUTYPE_16BITSTEREO:
    729  1.1      rh 		ess->pch.apublk >>= 1;
    730  1.1      rh 		wpwa >>= 1;
    731  1.1      rh 		size >>= 1;
    732  1.1      rh 		offset >>= 1;
    733  1.1      rh 		/* FALLTHROUGH */
    734  1.1      rh 	case APUTYPE_8BITSTEREO:
    735  1.3      rh 		if (ess->codec_flags & AC97_HOST_SWAPPED_CHANNELS)
    736  1.3      rh 			pan = 8;
    737  1.3      rh 		else
    738  1.3      rh 			pan = -8;
    739  1.3      rh 		nch++;
    740  1.1      rh 		break;
    741  1.1      rh 	case APUTYPE_8BITLINEAR:
    742  1.1      rh 		ess->pch.apublk <<= 1;
    743  1.1      rh 		speed >>= 1;
    744  1.1      rh 		break;
    745  1.1      rh 	}
    746  1.1      rh 
    747  1.1      rh 	ess->pch.apubuf = size;
    748  1.1      rh 	ess->pch.nextirq = ess->pch.apublk;
    749  1.1      rh 
    750  1.1      rh 	set_timer(ess);
    751  1.1      rh 	wp_starttimer(ess);
    752  1.1      rh 
    753  1.1      rh 	dv = (((speed % 48000) << 16) + 24000) / 48000
    754  1.1      rh 	    + ((speed / 48000) << 16);
    755  1.1      rh 
    756  1.3      rh 	for (i = nch-1; i >= 0; i--) {
    757  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_WAVESPACE, wpwa & 0xff00);
    758  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_CURPTR, offset);
    759  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_ENDPTR, offset + size);
    760  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_LOOPLEN, size - 1);
    761  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_AMPLITUDE, 0xe800);
    762  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_POSITION, 0x8f00
    763  1.1      rh 		    | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT)
    764  1.1      rh 		    | ((PAN_FRONT + pan) << APU_PAN_SHIFT));
    765  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_FREQ_LOBYTE, APU_plus6dB
    766  1.1      rh 		    | ((dv & 0xff) << APU_FREQ_LOBYTE_SHIFT));
    767  1.3      rh 		wp_wrapu(ess, apuch + i, APUREG_FREQ_HIWORD, dv >> 8);
    768  1.1      rh 
    769  1.1      rh 		if (ch->aputype == APUTYPE_16BITSTEREO)
    770  1.1      rh 			wpwa |= APU_STEREO >> 1;
    771  1.1      rh 		pan = -pan;
    772  1.3      rh 	}
    773  1.1      rh 
    774  1.1      rh 	wc_wrchctl(ess, apuch, ch->wcreg_tpl);
    775  1.3      rh 	if (nch > 1)
    776  1.3      rh 		wc_wrchctl(ess, apuch + 1, ch->wcreg_tpl);
    777  1.1      rh 
    778  1.1      rh 	wp_wrapu(ess, apuch, APUREG_APUTYPE,
    779  1.1      rh 	    (ch->aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf);
    780  1.1      rh 	if (ch->wcreg_tpl & WAVCACHE_CHCTL_STEREO)
    781  1.1      rh 		wp_wrapu(ess, apuch + 1, APUREG_APUTYPE,
    782  1.1      rh 		    (ch->aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf);
    783  1.1      rh 
    784  1.1      rh 	return 0;
    785  1.1      rh }
    786  1.1      rh 
    787  1.1      rh 
    788  1.1      rh int
    789  1.1      rh esm_trigger_input(void *sc, void *start, void *end, int blksize,
    790  1.1      rh     void (*intr)(void *), void *arg, struct audio_params *param)
    791  1.1      rh {
    792  1.1      rh 	return 0;
    793  1.1      rh }
    794  1.1      rh 
    795  1.1      rh 
    796  1.1      rh int
    797  1.1      rh esm_halt_output(void *sc)
    798  1.1      rh {
    799  1.1      rh 	struct esm_softc *ess = sc;
    800  1.1      rh 	struct esm_chinfo *ch = &ess->pch;
    801  1.1      rh 
    802  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM, ("esm_halt_output(%p)\n", sc));
    803  1.1      rh 
    804  1.1      rh 	wp_wrapu(ess, (ch->num << 1), APUREG_APUTYPE,
    805  1.1      rh 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
    806  1.1      rh 	wp_wrapu(ess, (ch->num << 1) + 1, APUREG_APUTYPE,
    807  1.1      rh 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
    808  1.1      rh 
    809  1.1      rh 	ess->pactive = 0;
    810  1.1      rh 	if (!ess->ractive)
    811  1.1      rh 		wp_stoptimer(ess);
    812  1.1      rh 
    813  1.1      rh 	return 0;
    814  1.1      rh }
    815  1.1      rh 
    816  1.1      rh 
    817  1.1      rh int
    818  1.1      rh esm_halt_input(void *sc)
    819  1.1      rh {
    820  1.1      rh 	return 0;
    821  1.1      rh }
    822  1.1      rh 
    823  1.1      rh 
    824  1.1      rh static inline u_int
    825  1.1      rh calc_timer_freq(struct esm_chinfo *ch)
    826  1.1      rh {
    827  1.1      rh 	u_int freq;
    828  1.1      rh 
    829  1.1      rh 	freq = (ch->sample_rate + ch->apublk - 1) / ch->apublk;
    830  1.1      rh 
    831  1.1      rh 	DPRINTF(ESM_DEBUG_TIMER,
    832  1.1      rh 	    ("calc_timer_freq(%p): rate = %u, blk = 0x%x (0x%x): freq = %u\n",
    833  1.1      rh 	    ch, ch->sample_rate, ch->apublk, ch->blocksize, freq));
    834  1.1      rh 
    835  1.1      rh 	return freq;
    836  1.1      rh }
    837  1.1      rh 
    838  1.1      rh static void
    839  1.1      rh set_timer(struct esm_softc *ess)
    840  1.1      rh {
    841  1.1      rh 	unsigned freq = 0, freq2;
    842  1.1      rh 
    843  1.1      rh 	if (ess->pactive)
    844  1.1      rh 		freq = calc_timer_freq(&ess->pch);
    845  1.1      rh 
    846  1.1      rh 	if (ess->ractive) {
    847  1.1      rh 		freq2 = calc_timer_freq(&ess->rch);
    848  1.1      rh 		if (freq2 < freq)
    849  1.1      rh 			freq = freq2;
    850  1.1      rh 	}
    851  1.1      rh 
    852  1.1      rh 	for (; freq < MAESTRO_MINFREQ; freq <<= 1)
    853  1.1      rh 		;
    854  1.1      rh 
    855  1.1      rh 	if (freq > 0)
    856  1.1      rh 		wp_settimer(ess, freq);
    857  1.1      rh }
    858  1.1      rh 
    859  1.1      rh 
    860  1.1      rh static void
    861  1.1      rh esmch_set_format(struct esm_chinfo *ch, struct audio_params *p)
    862  1.1      rh {
    863  1.1      rh 	u_int16_t wcreg_tpl = (ch->base - 16) & WAVCACHE_CHCTL_ADDRTAG_MASK;
    864  1.1      rh 	u_int16_t aputype = APUTYPE_16BITLINEAR;
    865  1.1      rh 
    866  1.1      rh 	if (p->channels == 2) {
    867  1.1      rh 		wcreg_tpl |= WAVCACHE_CHCTL_STEREO;
    868  1.1      rh 		aputype++;
    869  1.1      rh 	}
    870  1.1      rh 	if (p->precision * p->factor == 8) {
    871  1.1      rh 		aputype += 2;
    872  1.1      rh 		if (p->encoding == AUDIO_ENCODING_ULINEAR)
    873  1.1      rh 			wcreg_tpl |= WAVCACHE_CHCTL_U8;
    874  1.1      rh 	}
    875  1.1      rh 	ch->wcreg_tpl = wcreg_tpl;
    876  1.1      rh 	ch->aputype = aputype;
    877  1.1      rh 	ch->sample_rate = p->sample_rate;
    878  1.1      rh 
    879  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM, ("esmch_set_format: "
    880  1.1      rh 	    "numch=%d, prec=%d*%d, tpl=0x%x, aputype=%d, rate=%ld\n",
    881  1.1      rh 	    p->channels, p->precision, p->factor, wcreg_tpl, aputype,
    882  1.1      rh 	    p->sample_rate));
    883  1.1      rh }
    884  1.1      rh 
    885  1.1      rh 
    886  1.1      rh /*
    887  1.1      rh  * Audio interface glue functions
    888  1.1      rh  */
    889  1.1      rh 
    890  1.1      rh int
    891  1.1      rh esm_open(void *sc, int flags)
    892  1.1      rh {
    893  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM, ("esm_open(%p, 0x%x)\n", sc, flags));
    894  1.1      rh 
    895  1.1      rh 	return 0;
    896  1.1      rh }
    897  1.1      rh 
    898  1.1      rh 
    899  1.1      rh void
    900  1.1      rh esm_close(void *sc)
    901  1.1      rh {
    902  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM, ("esm_close(%p)\n", sc));
    903  1.1      rh }
    904  1.1      rh 
    905  1.1      rh 
    906  1.1      rh int
    907  1.1      rh esm_getdev (void *sc, struct audio_device *adp)
    908  1.1      rh {
    909  1.1      rh 	*adp = esm_device;
    910  1.1      rh 	return 0;
    911  1.1      rh }
    912  1.1      rh 
    913  1.1      rh 
    914  1.1      rh int
    915  1.1      rh esm_round_blocksize (void *sc, int blk)
    916  1.1      rh {
    917  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM,
    918  1.1      rh 	    ("esm_round_blocksize(%p, 0x%x)", sc, blk));
    919  1.1      rh 
    920  1.1      rh 	blk &= ~0x3f;		/* keep good alignment */
    921  1.1      rh 
    922  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM, (" = 0x%x\n", blk));
    923  1.1      rh 
    924  1.1      rh 	return blk;
    925  1.1      rh }
    926  1.1      rh 
    927  1.1      rh 
    928  1.1      rh int
    929  1.1      rh esm_query_encoding(void *sc, struct audio_encoding *fp)
    930  1.1      rh {
    931  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM,
    932  1.1      rh 	    ("esm_query_encoding(%p, %d)\n", sc, fp->index));
    933  1.1      rh 
    934  1.1      rh 	if (fp->index < 0 || fp->index >= MAESTRO_NENCODINGS)
    935  1.1      rh 		return EINVAL;
    936  1.1      rh 
    937  1.1      rh 	*fp = esm_encoding[fp->index];
    938  1.1      rh 	return 0;
    939  1.1      rh }
    940  1.1      rh 
    941  1.1      rh 
    942  1.1      rh int
    943  1.1      rh esm_set_params(void *sc, int setmode, int usemode,
    944  1.1      rh 	struct audio_params *play, struct audio_params *rec)
    945  1.1      rh {
    946  1.1      rh 	struct esm_softc *ess = sc;
    947  1.1      rh 	struct audio_params *p;
    948  1.1      rh 	int mode;
    949  1.1      rh 
    950  1.1      rh 	DPRINTF(ESM_DEBUG_PARAM,
    951  1.1      rh 	    ("esm_set_params(%p, 0x%x, 0x%x, %p, %p)\n",
    952  1.1      rh 	    sc, setmode, usemode, play, rec));
    953  1.1      rh 
    954  1.1      rh 	for (mode = AUMODE_RECORD; mode != -1;
    955  1.1      rh 	     mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
    956  1.1      rh 		if ((setmode & mode) == 0)
    957  1.1      rh 			continue;
    958  1.1      rh 
    959  1.1      rh 		p = mode == AUMODE_PLAY ? play : rec;
    960  1.1      rh 
    961  1.1      rh 		if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
    962  1.1      rh 		    (p->precision != 8 && p->precision != 16) ||
    963  1.1      rh 		    (p->channels != 1 && p->channels != 2))
    964  1.1      rh 			return EINVAL;
    965  1.1      rh 
    966  1.1      rh 		p->factor = 1;
    967  1.1      rh 		p->sw_code = 0;
    968  1.1      rh 		switch (p->encoding) {
    969  1.1      rh 		case AUDIO_ENCODING_SLINEAR_BE:
    970  1.1      rh 			if (p->precision == 16)
    971  1.1      rh 				p->sw_code = swap_bytes;
    972  1.1      rh 			else
    973  1.1      rh 				p->sw_code = change_sign8;
    974  1.1      rh 			break;
    975  1.1      rh 		case AUDIO_ENCODING_SLINEAR_LE:
    976  1.1      rh 			if (p->precision != 16)
    977  1.1      rh 				p->sw_code = change_sign8;
    978  1.1      rh 			break;
    979  1.1      rh 		case AUDIO_ENCODING_ULINEAR_BE:
    980  1.1      rh 			if (p->precision == 16) {
    981  1.1      rh 				if (mode == AUMODE_PLAY)
    982  1.1      rh 					p->sw_code = swap_bytes_change_sign16_le;
    983  1.1      rh 				else
    984  1.1      rh 					p->sw_code = change_sign16_swap_bytes_le;
    985  1.1      rh 			}
    986  1.1      rh 			break;
    987  1.1      rh 		case AUDIO_ENCODING_ULINEAR_LE:
    988  1.1      rh 			if (p->precision == 16)
    989  1.1      rh 				p->sw_code = change_sign16_le;
    990  1.1      rh 			break;
    991  1.1      rh 		case AUDIO_ENCODING_ULAW:
    992  1.1      rh 			if (mode == AUMODE_PLAY) {
    993  1.1      rh 				p->factor = 2;
    994  1.1      rh 				p->sw_code = mulaw_to_slinear16_le;
    995  1.1      rh 			} else
    996  1.1      rh 				p->sw_code = ulinear8_to_mulaw;
    997  1.1      rh 			break;
    998  1.1      rh 		case AUDIO_ENCODING_ALAW:
    999  1.1      rh 			if (mode == AUMODE_PLAY) {
   1000  1.1      rh 				p->factor = 2;
   1001  1.1      rh 				p->sw_code = alaw_to_slinear16_le;
   1002  1.1      rh 			} else
   1003  1.1      rh 				p->sw_code = ulinear8_to_alaw;
   1004  1.1      rh 			break;
   1005  1.1      rh 		default:
   1006  1.1      rh 			return EINVAL;
   1007  1.1      rh 		}
   1008  1.1      rh 	}
   1009  1.1      rh 
   1010  1.1      rh 	if (setmode & AUMODE_PLAY)
   1011  1.1      rh 		esmch_set_format(&ess->pch, play);
   1012  1.1      rh 
   1013  1.1      rh 	if (setmode & AUMODE_RECORD)
   1014  1.1      rh 		esmch_set_format(&ess->rch, rec);
   1015  1.1      rh 
   1016  1.1      rh 	return 0;
   1017  1.1      rh }
   1018  1.1      rh 
   1019  1.1      rh 
   1020  1.1      rh int
   1021  1.1      rh esm_set_port(void *sc, mixer_ctrl_t *cp)
   1022  1.1      rh {
   1023  1.1      rh 	struct esm_softc *ess = sc;
   1024  1.1      rh 
   1025  1.1      rh 	return (ess->codec_if->vtbl->mixer_set_port(ess->codec_if, cp));
   1026  1.1      rh }
   1027  1.1      rh 
   1028  1.1      rh 
   1029  1.1      rh int
   1030  1.1      rh esm_get_port(void *sc, mixer_ctrl_t *cp)
   1031  1.1      rh {
   1032  1.1      rh 	struct esm_softc *ess = sc;
   1033  1.1      rh 
   1034  1.1      rh 	return (ess->codec_if->vtbl->mixer_get_port(ess->codec_if, cp));
   1035  1.1      rh }
   1036  1.1      rh 
   1037  1.1      rh 
   1038  1.1      rh int
   1039  1.1      rh esm_query_devinfo(void *sc, mixer_devinfo_t *dip)
   1040  1.1      rh {
   1041  1.1      rh 	struct esm_softc *ess = sc;
   1042  1.1      rh 
   1043  1.1      rh 	return (ess->codec_if->vtbl->query_devinfo(ess->codec_if, dip));
   1044  1.1      rh }
   1045  1.1      rh 
   1046  1.1      rh 
   1047  1.1      rh void *
   1048  1.1      rh esm_malloc(void *sc, int direction, size_t size, int pool, int flags)
   1049  1.1      rh {
   1050  1.1      rh 	struct esm_softc *ess = sc;
   1051  1.1      rh 	struct esm_dma *p;
   1052  1.1      rh 	int error;
   1053  1.1      rh 
   1054  1.1      rh 	DPRINTF(ESM_DEBUG_DMA,
   1055  1.1      rh 	    ("esm_malloc(%p, %d, 0x%x, 0x%x, 0x%x)",
   1056  1.1      rh 	    sc, direction, size, pool, flags));
   1057  1.1      rh 
   1058  1.1      rh 	p = malloc(sizeof(*p), pool, flags);
   1059  1.1      rh 	if (!p)
   1060  1.1      rh 		return 0;
   1061  1.1      rh 	error = esm_allocmem(ess, size, 16, p);
   1062  1.1      rh 	if (error) {
   1063  1.1      rh 		free(p, pool);
   1064  1.1      rh 		DPRINTF(ESM_DEBUG_DMA, (" = 0 (ENOMEM)\n"));
   1065  1.1      rh 		return 0;
   1066  1.1      rh 	}
   1067  1.1      rh 	p->next = ess->sc_dmas;
   1068  1.1      rh 	ess->sc_dmas = p;
   1069  1.1      rh 
   1070  1.1      rh 	DPRINTF(ESM_DEBUG_DMA,
   1071  1.1      rh 	    (": KERNADDR(%p) = %p (DMAADDR 0x%x)\n", p, KERNADDR(p), (int)DMAADDR(p)));
   1072  1.1      rh 
   1073  1.1      rh 	return KERNADDR(p);
   1074  1.1      rh }
   1075  1.1      rh 
   1076  1.1      rh 
   1077  1.1      rh void
   1078  1.1      rh esm_free(void *sc, void *ptr, int pool)
   1079  1.1      rh {
   1080  1.1      rh 	struct esm_softc *ess = sc;
   1081  1.1      rh 	struct esm_dma *p, **pp;
   1082  1.1      rh 
   1083  1.1      rh 	DPRINTF(ESM_DEBUG_DMA,
   1084  1.1      rh 	    ("esm_free(%p, %p, 0x%x)\n",
   1085  1.1      rh 	    sc, ptr, pool));
   1086  1.1      rh 
   1087  1.1      rh 	for (pp = &ess->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
   1088  1.1      rh 		if (KERNADDR(p) == ptr) {
   1089  1.1      rh 			esm_freemem(ess, p);
   1090  1.1      rh 			*pp = p->next;
   1091  1.1      rh 			free(p, pool);
   1092  1.1      rh 			return;
   1093  1.1      rh 		}
   1094  1.1      rh 	}
   1095  1.1      rh }
   1096  1.1      rh 
   1097  1.1      rh 
   1098  1.1      rh size_t
   1099  1.1      rh esm_round_buffersize(void *sc, int direction, size_t size)
   1100  1.1      rh {
   1101  1.1      rh 	return size;
   1102  1.1      rh }
   1103  1.1      rh 
   1104  1.1      rh 
   1105  1.1      rh paddr_t
   1106  1.1      rh esm_mappage(void *sc, void *mem, off_t off, int prot)
   1107  1.1      rh {
   1108  1.1      rh 	struct esm_softc *ess = sc;
   1109  1.1      rh 	struct esm_dma *p;
   1110  1.1      rh 
   1111  1.1      rh 	DPRINTF(ESM_DEBUG_DMA,
   1112  1.1      rh 	    ("esm_mappage(%p, %p, 0x%lx, 0x%x)\n",
   1113  1.1      rh 	    sc, mem, (unsigned long)off, prot));
   1114  1.1      rh 
   1115  1.1      rh 	if (off < 0)
   1116  1.1      rh 		return (-1);
   1117  1.1      rh 
   1118  1.1      rh 	for (p = ess->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
   1119  1.1      rh 		;
   1120  1.1      rh 	if (!p)
   1121  1.1      rh 		return (-1);
   1122  1.1      rh 	return bus_dmamem_mmap(ess->dmat, p->segs, p->nsegs, off,
   1123  1.1      rh 	    prot, BUS_DMA_WAITOK);
   1124  1.1      rh }
   1125  1.1      rh 
   1126  1.1      rh 
   1127  1.1      rh int
   1128  1.1      rh esm_get_props(void *sc)
   1129  1.1      rh {
   1130  1.1      rh 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1131  1.1      rh }
   1132  1.1      rh 
   1133  1.1      rh 
   1134  1.1      rh /* -----------------------------
   1135  1.1      rh  * Bus space.
   1136  1.1      rh  */
   1137  1.1      rh 
   1138  1.1      rh int
   1139  1.1      rh esm_intr(void *sc)
   1140  1.1      rh {
   1141  1.1      rh 	struct esm_softc *ess = sc;
   1142  1.1      rh 	u_int16_t status;
   1143  1.1      rh 	u_int16_t pos;
   1144  1.1      rh 	int ret = 0;
   1145  1.1      rh 
   1146  1.1      rh 	status = bus_space_read_1(ess->st, ess->sh, PORT_HOSTINT_STAT);
   1147  1.1      rh 	if (!status)
   1148  1.1      rh 		return 0;
   1149  1.1      rh 
   1150  1.1      rh 	/* Acknowledge all. */
   1151  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1);
   1152  1.1      rh 	bus_space_write_1(ess->st, ess->sh, PORT_HOSTINT_STAT, 0);
   1153  1.1      rh #if 0	/* XXX - HWVOL */
   1154  1.1      rh 	if (status & HOSTINT_STAT_HWVOL) {
   1155  1.1      rh 		u_int delta;
   1156  1.1      rh 		delta = bus_space_read_1(ess->st, ess->sh, PORT_HWVOL_MASTER)
   1157  1.1      rh 		    - 0x88;
   1158  1.1      rh 		if (delta & 0x11)
   1159  1.1      rh 			mixer_set(device_get_softc(ess->dev),
   1160  1.1      rh 			    SOUND_MIXER_VOLUME, 0);
   1161  1.1      rh 		else {
   1162  1.1      rh 			mixer_set(device_get_softc(ess->dev),
   1163  1.1      rh 			    SOUND_MIXER_VOLUME,
   1164  1.1      rh 			    mixer_get(device_get_softc(ess->dev),
   1165  1.1      rh 				SOUND_MIXER_VOLUME)
   1166  1.1      rh 			    + ((delta >> 5) & 0x7) - 4
   1167  1.1      rh 			    + ((delta << 7) & 0x700) - 0x400);
   1168  1.1      rh 		}
   1169  1.1      rh 		bus_space_write_1(ess->st, ess->sh, PORT_HWVOL_MASTER, 0x88);
   1170  1.1      rh 		ret++;
   1171  1.1      rh 	}
   1172  1.1      rh #endif	/* XXX - HWVOL */
   1173  1.1      rh 
   1174  1.1      rh 	if (ess->pactive) {
   1175  1.1      rh 		pos = wp_rdapu(ess, ess->pch.num << 1, APUREG_CURPTR);
   1176  1.1      rh 
   1177  1.1      rh 		DPRINTF(ESM_DEBUG_IRQ, (" %4.4x/%4.4x ", pos,
   1178  1.1      rh 		    wp_rdapu(ess, (ess->pch.num<<1)+1, APUREG_CURPTR)));
   1179  1.1      rh 
   1180  1.1      rh 		if (pos >= ess->pch.nextirq &&
   1181  1.1      rh 		    pos - ess->pch.nextirq < ess->pch.apubuf / 2) {
   1182  1.1      rh 			ess->pch.nextirq += ess->pch.apublk;
   1183  1.1      rh 
   1184  1.1      rh 			if (ess->pch.nextirq >= ess->pch.apubuf)
   1185  1.1      rh 				ess->pch.nextirq = 0;
   1186  1.1      rh 
   1187  1.1      rh 			if (ess->sc_pintr) {
   1188  1.1      rh 				DPRINTF(ESM_DEBUG_IRQ, ("P\n"));
   1189  1.1      rh 				ess->sc_pintr(ess->sc_parg);
   1190  1.1      rh 			}
   1191  1.1      rh 
   1192  1.1      rh 		}
   1193  1.1      rh 		ret++;
   1194  1.1      rh 	}
   1195  1.1      rh 
   1196  1.1      rh 	if (ess->ractive) {
   1197  1.1      rh 		pos = wp_rdapu(ess, ess->rch.num << 1, APUREG_CURPTR);
   1198  1.1      rh 
   1199  1.1      rh 		DPRINTF(ESM_DEBUG_IRQ, (" %4.4x/%4.4x ", pos,
   1200  1.1      rh 		    wp_rdapu(ess, (ess->rch.num<<1)+1, APUREG_CURPTR)));
   1201  1.1      rh 
   1202  1.1      rh 		if (pos >= ess->rch.nextirq &&
   1203  1.1      rh 		    pos - ess->rch.nextirq < ess->rch.apubuf / 2) {
   1204  1.1      rh 			ess->rch.nextirq += ess->rch.apublk;
   1205  1.1      rh 
   1206  1.1      rh 			if (ess->rch.nextirq >= ess->rch.apubuf)
   1207  1.1      rh 				ess->rch.nextirq = 0;
   1208  1.1      rh 
   1209  1.1      rh 			if (ess->sc_rintr) {
   1210  1.1      rh 				DPRINTF(ESM_DEBUG_IRQ, ("R\n"));
   1211  1.1      rh 				ess->sc_rintr(ess->sc_parg);
   1212  1.1      rh 			}
   1213  1.1      rh 
   1214  1.1      rh 		}
   1215  1.1      rh 		ret++;
   1216  1.1      rh 	}
   1217  1.1      rh 
   1218  1.1      rh 	return ret;
   1219  1.1      rh }
   1220  1.1      rh 
   1221  1.1      rh 
   1222  1.1      rh int
   1223  1.1      rh esm_allocmem(struct esm_softc *sc, size_t size, size_t align,
   1224  1.1      rh     struct esm_dma *p)
   1225  1.1      rh {
   1226  1.1      rh 	int error;
   1227  1.1      rh 
   1228  1.1      rh 	p->size = size;
   1229  1.1      rh 	error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
   1230  1.1      rh 				 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
   1231  1.1      rh 				 &p->nsegs, BUS_DMA_NOWAIT);
   1232  1.1      rh 	if (error)
   1233  1.1      rh 		return error;
   1234  1.1      rh 
   1235  1.1      rh 	error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
   1236  1.1      rh 			       &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
   1237  1.1      rh 	if (error)
   1238  1.1      rh 		goto free;
   1239  1.1      rh 
   1240  1.1      rh 	error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
   1241  1.1      rh 				  0, BUS_DMA_NOWAIT, &p->map);
   1242  1.1      rh 	if (error)
   1243  1.1      rh 		goto unmap;
   1244  1.1      rh 
   1245  1.1      rh 	error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
   1246  1.1      rh 				BUS_DMA_NOWAIT);
   1247  1.1      rh 	if (error)
   1248  1.1      rh 		goto destroy;
   1249  1.1      rh 
   1250  1.1      rh 	return 0;
   1251  1.1      rh 
   1252  1.1      rh  destroy:
   1253  1.1      rh 	bus_dmamap_destroy(sc->dmat, p->map);
   1254  1.1      rh  unmap:
   1255  1.1      rh 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
   1256  1.1      rh  free:
   1257  1.1      rh 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
   1258  1.1      rh 
   1259  1.1      rh 	return error;
   1260  1.1      rh }
   1261  1.1      rh 
   1262  1.1      rh 
   1263  1.1      rh int
   1264  1.1      rh esm_freemem(struct esm_softc *sc, struct esm_dma *p)
   1265  1.1      rh {
   1266  1.1      rh 	bus_dmamap_unload(sc->dmat, p->map);
   1267  1.1      rh 	bus_dmamap_destroy(sc->dmat, p->map);
   1268  1.1      rh 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
   1269  1.1      rh 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
   1270  1.1      rh 	return 0;
   1271  1.1      rh }
   1272  1.1      rh 
   1273  1.1      rh 
   1274  1.1      rh int
   1275  1.1      rh esm_match(struct device *dev, struct cfdata *match, void *aux)
   1276  1.1      rh {
   1277  1.1      rh 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
   1278  1.1      rh 
   1279  1.1      rh 	switch (PCI_VENDOR(pa->pa_id)) {
   1280  1.1      rh 	case PCI_VENDOR_ESSTECH:
   1281  1.1      rh 		switch (PCI_PRODUCT(pa->pa_id)) {
   1282  1.1      rh 		case PCI_PRODUCT_ESSTECH_MAESTRO1:
   1283  1.1      rh 		case PCI_PRODUCT_ESSTECH_MAESTRO2:
   1284  1.1      rh 		case PCI_PRODUCT_ESSTECH_MAESTRO2E:
   1285  1.1      rh 			return 1;
   1286  1.1      rh 		}
   1287  1.1      rh 
   1288  1.1      rh 	case PCI_VENDOR_ESSTECH2:
   1289  1.1      rh 		switch (PCI_PRODUCT(pa->pa_id)) {
   1290  1.1      rh 		case PCI_PRODUCT_ESSTECH2_MAESTRO1:
   1291  1.1      rh 			return 1;
   1292  1.1      rh 		}
   1293  1.1      rh 	}
   1294  1.1      rh 	return 0;
   1295  1.1      rh }
   1296  1.1      rh 
   1297  1.1      rh void
   1298  1.1      rh esm_attach(struct device *parent, struct device *self, void *aux)
   1299  1.1      rh {
   1300  1.1      rh 	struct esm_softc *ess = (struct esm_softc *)self;
   1301  1.1      rh 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
   1302  1.1      rh 	pci_chipset_tag_t pc = pa->pa_pc;
   1303  1.1      rh 	pcitag_t tag = pa->pa_tag;
   1304  1.1      rh 	pci_intr_handle_t ih;
   1305  1.1      rh 	pcireg_t csr, data;
   1306  1.1      rh 	u_int16_t codec_data;
   1307  1.1      rh 	const char *intrstr;
   1308  1.1      rh 	int revision;
   1309  1.1      rh 	char devinfo[256];
   1310  1.1      rh 
   1311  1.1      rh 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
   1312  1.1      rh 	revision = PCI_REVISION(pa->pa_class);
   1313  1.1      rh 	printf(": %s (rev. 0x%02x)\n", devinfo, revision);
   1314  1.1      rh 
   1315  1.1      rh 	/* Enable the device. */
   1316  1.1      rh 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
   1317  1.1      rh 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
   1318  1.1      rh 	    csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
   1319  1.1      rh 
   1320  1.1      rh 	/* Map I/O register */
   1321  1.1      rh 	if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
   1322  1.1      rh 	    &ess->st, &ess->sh, NULL, NULL)) {
   1323  1.1      rh 		printf("%s: can't map i/o space\n", ess->sc_dev.dv_xname);
   1324  1.1      rh 		return;
   1325  1.1      rh 	}
   1326  1.1      rh 
   1327  1.1      rh 	/* Initialize softc */
   1328  1.1      rh 	ess->pch.num = 0;
   1329  1.1      rh 	ess->rch.num = 2;
   1330  1.1      rh 	ess->dmat = pa->pa_dmat;
   1331  1.1      rh 	ess->tag = tag;
   1332  1.1      rh 	ess->pc = pc;
   1333  1.1      rh 	ess->subid = pci_conf_read(pc, tag, PCI_SUBSYS_ID_REG);
   1334  1.1      rh 
   1335  1.3      rh 	DPRINTF(ESM_DEBUG_PCI,
   1336  1.3      rh 	    ("%s: sub-system vendor 0x%4.4x, product 0x%4.4x\n",
   1337  1.3      rh 	    ess->sc_dev.dv_xname,
   1338  1.3      rh 	    PCI_VENDOR(ess->subid), PCI_PRODUCT(ess->subid)));
   1339  1.3      rh 
   1340  1.1      rh 	/* Map and establish the interrupt. */
   1341  1.1      rh 	if (pci_intr_map(pa, &ih)) {
   1342  1.1      rh 		printf("%s: can't map interrupt\n", ess->sc_dev.dv_xname);
   1343  1.1      rh 		return;
   1344  1.1      rh 	}
   1345  1.1      rh 	intrstr = pci_intr_string(pc, ih);
   1346  1.1      rh 	ess->ih = pci_intr_establish(pc, ih, IPL_AUDIO, esm_intr, self);
   1347  1.1      rh 	if (ess->ih == NULL) {
   1348  1.1      rh 		printf("%s: can't establish interrupt", ess->sc_dev.dv_xname);
   1349  1.1      rh 		if (intrstr != NULL)
   1350  1.1      rh 			printf(" at %s", intrstr);
   1351  1.1      rh 		printf("\n");
   1352  1.1      rh 		return;
   1353  1.1      rh 	}
   1354  1.1      rh 	printf("%s: interrupting at %s\n", ess->sc_dev.dv_xname, intrstr);
   1355  1.1      rh 
   1356  1.1      rh 	/*
   1357  1.1      rh 	 * Setup PCI config registers
   1358  1.1      rh 	 */
   1359  1.1      rh 
   1360  1.1      rh 	/* set to power state D0 */
   1361  1.1      rh 	esm_power(ess, PPMI_D0);
   1362  1.1      rh 	delay(100000);
   1363  1.1      rh 
   1364  1.1      rh 	/* Disable all legacy emulations. */
   1365  1.1      rh 	data = pci_conf_read(pc, tag, CONF_LEGACY);
   1366  1.1      rh 	pci_conf_write(pc, tag, CONF_LEGACY, data | LEGACY_DISABLED);
   1367  1.1      rh 
   1368  1.1      rh 	/* Disconnect from CHI. (Makes Dell inspiron 7500 work?)
   1369  1.1      rh 	 * Enable posted write.
   1370  1.1      rh 	 * Prefer PCI timing rather than that of ISA.
   1371  1.1      rh 	 * Don't swap L/R. */
   1372  1.1      rh 	data = pci_conf_read(pc, tag, CONF_MAESTRO);
   1373  1.1      rh 	data |= MAESTRO_CHIBUS | MAESTRO_POSTEDWRITE | MAESTRO_DMA_PCITIMING;
   1374  1.1      rh 	data &= ~MAESTRO_SWAP_LR;
   1375  1.1      rh 	pci_conf_write(pc, tag, CONF_MAESTRO, data);
   1376  1.1      rh 
   1377  1.1      rh 	/* initialize sound chip */
   1378  1.1      rh 	esm_init(ess);
   1379  1.1      rh 
   1380  1.1      rh 	esm_read_codec(ess, 0, &codec_data);
   1381  1.1      rh 	if (codec_data == 0x80) {
   1382  1.1      rh 		printf("%s: PT101 codec detected!\n", ess->sc_dev.dv_xname);
   1383  1.1      rh 		return;
   1384  1.1      rh 	}
   1385  1.1      rh 
   1386  1.3      rh 	/*
   1387  1.3      rh 	 * Some cards and Notebooks appear to have left and right channels
   1388  1.3      rh 	 * reversed.  Check if there is a corresponding quirk entry for
   1389  1.3      rh 	 * the subsystem vendor and product and if so, set the appropriate
   1390  1.3      rh 	 * codec flag.
   1391  1.3      rh 	 */
   1392  1.3      rh 	if (esm_get_quirks(ess->subid) & ESM_QUIRKF_SWAPPEDCH) {
   1393  1.3      rh 		ess->codec_flags |= AC97_HOST_SWAPPED_CHANNELS;
   1394  1.3      rh 	}
   1395  1.5      rh 	ess->codec_flags |= AC97_HOST_DONT_READ;
   1396  1.3      rh 
   1397  1.1      rh 	/* initialize AC97 host interface */
   1398  1.1      rh 	ess->host_if.arg = self;
   1399  1.1      rh 	ess->host_if.attach = esm_attach_codec;
   1400  1.1      rh 	ess->host_if.read = esm_read_codec;
   1401  1.1      rh 	ess->host_if.write = esm_write_codec;
   1402  1.1      rh 	ess->host_if.reset = esm_reset_codec;
   1403  1.3      rh 	ess->host_if.flags = esm_flags_codec;
   1404  1.1      rh 
   1405  1.1      rh 	if (ac97_attach(&ess->host_if) != 0)
   1406  1.1      rh 		return;
   1407  1.1      rh 
   1408  1.1      rh 	audio_attach_mi(&esm_hw_if, self, &ess->sc_dev);
   1409  1.7  ichiro 
   1410  1.7  ichiro 	ess->esm_suspend = PWR_RESUME;
   1411  1.7  ichiro 	ess->esm_powerhook = powerhook_establish(esm_powerhook, ess);
   1412  1.7  ichiro }
   1413  1.7  ichiro 
   1414  1.7  ichiro /* Power Hook */
   1415  1.7  ichiro void
   1416  1.7  ichiro esm_powerhook(why, v)
   1417  1.7  ichiro 	int why;
   1418  1.7  ichiro 	void *v;
   1419  1.7  ichiro {
   1420  1.7  ichiro 	struct esm_softc *ess = (struct esm_softc *)v;
   1421  1.7  ichiro 
   1422  1.7  ichiro 	DPRINTF(ESM_DEBUG_PARAM,
   1423  1.7  ichiro 	("%s: ESS maestro 2E why=%d\n", ess->sc_dev.dv_xname, why));
   1424  1.7  ichiro 	switch (why) {
   1425  1.8  ichiro 		case PWR_SUSPEND:
   1426  1.8  ichiro 		case PWR_STANDBY:
   1427  1.8  ichiro 			ess->esm_suspend = why;
   1428  1.8  ichiro 			esm_suspend(ess);
   1429  1.9      rh 			DPRINTF(ESM_DEBUG_RESUME, ("esm_suspend\n"));
   1430  1.8  ichiro 			break;
   1431  1.8  ichiro 
   1432  1.7  ichiro 		case PWR_RESUME:
   1433  1.7  ichiro 			ess->esm_suspend = why;
   1434  1.8  ichiro 			esm_resume(ess);
   1435  1.9      rh 			DPRINTF(ESM_DEBUG_RESUME, ("esm_resumed\n"));
   1436  1.7  ichiro 			break;
   1437  1.7  ichiro 	}
   1438  1.1      rh }
   1439  1.1      rh 
   1440  1.1      rh int
   1441  1.1      rh esm_suspend(struct esm_softc *ess)
   1442  1.1      rh {
   1443  1.8  ichiro 	int x;
   1444  1.1      rh 
   1445  1.1      rh 	x = splaudio();
   1446  1.1      rh 	wp_stoptimer(ess);
   1447  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0);
   1448  1.1      rh 
   1449  1.1      rh 	esm_halt_output(ess);
   1450  1.1      rh 	esm_halt_input(ess);
   1451  1.1      rh 	splx(x);
   1452  1.1      rh 
   1453  1.1      rh 	/* Power down everything except clock. */
   1454  1.1      rh 	esm_write_codec(ess, AC97_REG_POWER, 0xdf00);
   1455  1.1      rh 	delay(20);
   1456  1.1      rh 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
   1457  1.1      rh 	delay(1);
   1458  1.1      rh 	esm_power(ess, PPMI_D3);
   1459  1.1      rh 
   1460  1.1      rh 	return 0;
   1461  1.1      rh }
   1462  1.1      rh 
   1463  1.1      rh int
   1464  1.1      rh esm_resume(struct esm_softc *ess)
   1465  1.1      rh {
   1466  1.8  ichiro 	int x;
   1467  1.1      rh 
   1468  1.1      rh 	esm_power(ess, PPMI_D0);
   1469  1.1      rh 	delay(100000);
   1470  1.1      rh 	esm_init(ess);
   1471  1.8  ichiro 
   1472  1.8  ichiro 	(*ess->codec_if->vtbl->restore_ports)(ess->codec_if);
   1473  1.8  ichiro #if 0
   1474  1.1      rh 	if (mixer_reinit(dev)) {
   1475  1.1      rh 		printf("%s: unable to reinitialize the mixer\n",
   1476  1.1      rh 		    ess->sc_dev.dv_xname);
   1477  1.1      rh 		return ENXIO;
   1478  1.1      rh 	}
   1479  1.8  ichiro #endif
   1480  1.1      rh 
   1481  1.1      rh 	x = splaudio();
   1482  1.8  ichiro #if TODO
   1483  1.1      rh 	if (ess->pactive)
   1484  1.1      rh 		esm_start_output(ess);
   1485  1.1      rh 	if (ess->ractive)
   1486  1.1      rh 		esm_start_input(ess);
   1487  1.8  ichiro #endif
   1488  1.1      rh 	if (ess->pactive || ess->ractive) {
   1489  1.1      rh 		set_timer(ess);
   1490  1.1      rh 		wp_starttimer(ess);
   1491  1.1      rh 	}
   1492  1.1      rh 	splx(x);
   1493  1.1      rh 	return 0;
   1494  1.1      rh }
   1495  1.1      rh 
   1496  1.8  ichiro #if 0
   1497  1.1      rh int
   1498  1.1      rh esm_shutdown(struct esm_softc *ess)
   1499  1.1      rh {
   1500  1.1      rh 	int i;
   1501  1.1      rh 
   1502  1.1      rh 	wp_stoptimer(ess);
   1503  1.1      rh 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0);
   1504  1.1      rh 
   1505  1.1      rh 	esm_halt_output(ess);
   1506  1.1      rh 	esm_halt_input(ess);
   1507  1.1      rh 
   1508  1.1      rh 	return 0;
   1509  1.1      rh }
   1510  1.1      rh #endif
   1511