esm.c revision 1.29
1 /* $NetBSD: esm.c,v 1.29 2005/01/10 22:01:37 kent Exp $ */ 2 3 /*- 4 * Copyright (c) 2002, 2003 Matt Fredette 5 * All rights reserved. 6 * 7 * Copyright (c) 2000, 2001 Rene Hexel <rh (at) NetBSD.org> 8 * All rights reserved. 9 * 10 * Copyright (c) 2000 Taku YAMAMOTO <taku (at) cent.saitama-u.ac.jp> 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * Taku Id: maestro.c,v 1.12 2000/09/06 03:32:34 taku Exp 35 * FreeBSD: /c/ncvs/src/sys/dev/sound/pci/maestro.c,v 1.4 2000/12/18 01:36:35 cg Exp 36 */ 37 38 /* 39 * TODO: 40 * - hardware volume support 41 * - fix 16-bit stereo recording, add 8-bit recording 42 * - MIDI support 43 * - joystick support 44 * 45 * 46 * Credits: 47 * 48 * This code is based on the FreeBSD driver written by Taku YAMAMOTO 49 * 50 * 51 * Original credits from the FreeBSD driver: 52 * 53 * Part of this code (especially in many magic numbers) was heavily inspired 54 * by the Linux driver originally written by 55 * Alan Cox <alan.cox (at) linux.org>, modified heavily by 56 * Zach Brown <zab (at) zabbo.net>. 57 * 58 * busdma()-ize and buffer size reduction were suggested by 59 * Cameron Grant <gandalf (at) vilnya.demon.co.uk>. 60 * Also he showed me the way to use busdma() suite. 61 * 62 * Internal speaker problems on NEC VersaPro's and Dell Inspiron 7500 63 * were looked at by 64 * Munehiro Matsuda <haro (at) tk.kubota.co.jp>, 65 * who brought patches based on the Linux driver with some simplification. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: esm.c,v 1.29 2005/01/10 22:01:37 kent Exp $"); 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/kernel.h> 74 #include <sys/malloc.h> 75 #include <sys/device.h> 76 77 #include <machine/bus.h> 78 79 #include <sys/audioio.h> 80 #include <dev/audio_if.h> 81 #include <dev/mulaw.h> 82 #include <dev/auconv.h> 83 #include <dev/ic/ac97var.h> 84 #include <dev/ic/ac97reg.h> 85 86 #include <dev/pci/pcidevs.h> 87 #include <dev/pci/pcivar.h> 88 89 #include <dev/pci/esmreg.h> 90 #include <dev/pci/esmvar.h> 91 92 #define PCI_CBIO 0x10 /* Configuration Base I/O Address */ 93 94 /* Debug */ 95 #ifdef AUDIO_DEBUG 96 #define DPRINTF(l,x) do { if (esm_debug & (l)) printf x; } while(0) 97 #define DUMPREG(x) do { if (esm_debug & ESM_DEBUG_REG) \ 98 esm_dump_regs(x); } while(0) 99 int esm_debug = 0xfffc; 100 #define ESM_DEBUG_CODECIO 0x0001 101 #define ESM_DEBUG_IRQ 0x0002 102 #define ESM_DEBUG_DMA 0x0004 103 #define ESM_DEBUG_TIMER 0x0008 104 #define ESM_DEBUG_REG 0x0010 105 #define ESM_DEBUG_PARAM 0x0020 106 #define ESM_DEBUG_APU 0x0040 107 #define ESM_DEBUG_CODEC 0x0080 108 #define ESM_DEBUG_PCI 0x0100 109 #define ESM_DEBUG_RESUME 0x0200 110 #else 111 #define DPRINTF(x,y) /* nothing */ 112 #define DUMPREG(x) /* nothing */ 113 #endif 114 115 #ifdef DIAGNOSTIC 116 #define RANGE(n, l, h) if ((n) < (l) || (n) >= (h)) \ 117 printf (#n "=%d out of range (%d, %d) in " \ 118 __FILE__ ", line %d\n", (n), (l), (h), __LINE__) 119 #else 120 #define RANGE(x,y,z) /* nothing */ 121 #endif 122 123 #define inline __inline 124 125 static inline void ringbus_setdest(struct esm_softc *, int, int); 126 127 static inline u_int16_t wp_rdreg(struct esm_softc *, u_int16_t); 128 static inline void wp_wrreg(struct esm_softc *, u_int16_t, u_int16_t); 129 static inline u_int16_t wp_rdapu(struct esm_softc *, int, u_int16_t); 130 static inline void wp_wrapu(struct esm_softc *, int, u_int16_t, 131 u_int16_t); 132 static inline void wp_settimer(struct esm_softc *, u_int); 133 static inline void wp_starttimer(struct esm_softc *); 134 static inline void wp_stoptimer(struct esm_softc *); 135 136 static inline u_int16_t wc_rdreg(struct esm_softc *, u_int16_t); 137 static inline void wc_wrreg(struct esm_softc *, u_int16_t, u_int16_t); 138 static inline u_int16_t wc_rdchctl(struct esm_softc *, int); 139 static inline void wc_wrchctl(struct esm_softc *, int, u_int16_t); 140 141 static inline u_int calc_timer_freq(struct esm_chinfo*); 142 static void set_timer(struct esm_softc *); 143 144 static void esmch_set_format(struct esm_chinfo *, 145 const audio_params_t *); 146 static void esmch_combine_input(struct esm_softc *, 147 struct esm_chinfo *); 148 149 /* Power Management */ 150 void esm_powerhook(int, void *); 151 152 CFATTACH_DECL(esm, sizeof(struct esm_softc), 153 esm_match, esm_attach, NULL, NULL); 154 155 const struct audio_hw_if esm_hw_if = { 156 NULL, /* open */ 157 NULL, /* close */ 158 NULL, /* drain */ 159 esm_query_encoding, 160 esm_set_params, 161 esm_round_blocksize, 162 NULL, /* commit_settings */ 163 esm_init_output, 164 esm_init_input, 165 NULL, /* start_output */ 166 NULL, /* start_input */ 167 esm_halt_output, 168 esm_halt_input, 169 NULL, /* speaker_ctl */ 170 esm_getdev, 171 NULL, /* getfd */ 172 esm_set_port, 173 esm_get_port, 174 esm_query_devinfo, 175 esm_malloc, 176 esm_free, 177 esm_round_buffersize, 178 esm_mappage, 179 esm_get_props, 180 esm_trigger_output, 181 esm_trigger_input, 182 NULL, 183 }; 184 185 struct audio_device esm_device = { 186 "ESS Maestro", 187 "", 188 "esm" 189 }; 190 191 192 static audio_encoding_t esm_encoding[] = { 193 { 0, AudioEulinear, AUDIO_ENCODING_ULINEAR, 8, 0 }, 194 { 1, AudioEmulaw, AUDIO_ENCODING_ULAW, 8, 195 AUDIO_ENCODINGFLAG_EMULATED }, 196 { 2, AudioEalaw, AUDIO_ENCODING_ALAW, 8, AUDIO_ENCODINGFLAG_EMULATED }, 197 { 3, AudioEslinear, AUDIO_ENCODING_SLINEAR, 8, 0 }, 198 { 4, AudioEslinear_le, AUDIO_ENCODING_SLINEAR_LE, 16, 0 }, 199 { 5, AudioEulinear_le, AUDIO_ENCODING_ULINEAR_LE, 16, 200 AUDIO_ENCODINGFLAG_EMULATED }, 201 { 6, AudioEslinear_be, AUDIO_ENCODING_SLINEAR_BE, 16, 202 AUDIO_ENCODINGFLAG_EMULATED }, 203 { 7, AudioEulinear_be, AUDIO_ENCODING_ULINEAR_BE, 16, 204 AUDIO_ENCODINGFLAG_EMULATED }, 205 }; 206 207 #define MAESTRO_NENCODINGS 8 208 209 #define ESM_NFORMATS 4 210 static const struct audio_format esm_formats[ESM_NFORMATS] = { 211 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 212 2, AUFMT_STEREO, 0, {4000, 48000}}, 213 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 214 1, AUFMT_MONAURAL, 0, {4000, 48000}}, 215 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 216 2, AUFMT_STEREO, 0, {4000, 48000}}, 217 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8, 218 1, AUFMT_MONAURAL, 0, {4000, 48000}}, 219 }; 220 221 static const struct esm_quirks esm_quirks[] = { 222 /* COMPAL 38W2 OEM Notebook, e.g. Dell INSPIRON 5000e */ 223 { PCI_VENDOR_COMPAL, PCI_PRODUCT_COMPAL_38W2, ESM_QUIRKF_SWAPPEDCH }, 224 225 /* COMPAQ Armada M700 Notebook */ 226 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_M700, ESM_QUIRKF_SWAPPEDCH }, 227 228 /* NEC Versa Pro LX VA26D */ 229 { PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VA26D, ESM_QUIRKF_GPIO }, 230 231 /* NEC Versa LX */ 232 { PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VERSALX, ESM_QUIRKF_GPIO }, 233 234 /* Toshiba Portege */ 235 { PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PORTEGE, ESM_QUIRKF_SWAPPEDCH } 236 }; 237 238 enum esm_quirk_flags 239 esm_get_quirks(pcireg_t subid) 240 { 241 int i; 242 243 for (i = 0; i < (sizeof esm_quirks / sizeof esm_quirks[0]); i++) { 244 if (PCI_VENDOR(subid) == esm_quirks[i].eq_vendor && 245 PCI_PRODUCT(subid) == esm_quirks[i].eq_product) { 246 return esm_quirks[i].eq_quirks; 247 } 248 } 249 250 return 0; 251 } 252 253 254 #ifdef AUDIO_DEBUG 255 struct esm_reg_info { 256 int offset; /* register offset */ 257 int width; /* 1/2/4 bytes */ 258 } dump_regs[] = { 259 { PORT_WAVCACHE_CTRL, 2 }, 260 { PORT_HOSTINT_CTRL, 2 }, 261 { PORT_HOSTINT_STAT, 2 }, 262 { PORT_HWVOL_VOICE_SHADOW, 1 }, 263 { PORT_HWVOL_VOICE, 1 }, 264 { PORT_HWVOL_MASTER_SHADOW, 1 }, 265 { PORT_HWVOL_MASTER, 1 }, 266 { PORT_RINGBUS_CTRL, 4 }, 267 { PORT_GPIO_DATA, 2 }, 268 { PORT_GPIO_MASK, 2 }, 269 { PORT_GPIO_DIR, 2 }, 270 { PORT_ASSP_CTRL_A, 1 }, 271 { PORT_ASSP_CTRL_B, 1 }, 272 { PORT_ASSP_CTRL_C, 1 }, 273 { PORT_ASSP_INT_STAT, 1 } 274 }; 275 276 static void 277 esm_dump_regs(struct esm_softc *ess) 278 { 279 int i; 280 281 printf("%s registers:", ess->sc_dev.dv_xname); 282 for (i = 0; i < (sizeof dump_regs / sizeof dump_regs[0]); i++) { 283 if (i % 5 == 0) 284 printf("\n"); 285 printf("0x%2.2x: ", dump_regs[i].offset); 286 switch(dump_regs[i].width) { 287 case 4: 288 printf("%8.8x, ", bus_space_read_4(ess->st, ess->sh, 289 dump_regs[i].offset)); 290 break; 291 case 2: 292 printf("%4.4x, ", bus_space_read_2(ess->st, ess->sh, 293 dump_regs[i].offset)); 294 break; 295 default: 296 printf("%2.2x, ", 297 bus_space_read_1(ess->st, ess->sh, 298 dump_regs[i].offset)); 299 } 300 } 301 printf("\n"); 302 } 303 #endif 304 305 306 /* ----------------------------- 307 * Subsystems. 308 */ 309 310 /* Codec/Ringbus */ 311 312 /* -------------------------------------------------------------------- */ 313 314 int 315 esm_read_codec(void *sc, u_int8_t regno, u_int16_t *result) 316 { 317 struct esm_softc *ess = sc; 318 unsigned t; 319 320 /* We have to wait for a SAFE time to write addr/data */ 321 for (t = 0; t < 20; t++) { 322 if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT) 323 & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS) 324 break; 325 delay(2); /* 20.8us / 13 */ 326 } 327 if (t == 20) 328 printf("%s: esm_read_codec() PROGLESS timed out.\n", 329 ess->sc_dev.dv_xname); 330 331 bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD, 332 CODEC_CMD_READ | regno); 333 delay(21); /* AC97 cycle = 20.8usec */ 334 335 /* Wait for data retrieve */ 336 for (t = 0; t < 20; t++) { 337 if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT) 338 & CODEC_STAT_MASK) == CODEC_STAT_RW_DONE) 339 break; 340 delay(2); /* 20.8us / 13 */ 341 } 342 if (t == 20) 343 /* Timed out, but perform dummy read. */ 344 printf("%s: esm_read_codec() RW_DONE timed out.\n", 345 ess->sc_dev.dv_xname); 346 347 *result = bus_space_read_2(ess->st, ess->sh, PORT_CODEC_REG); 348 349 return 0; 350 } 351 352 int 353 esm_write_codec(void *sc, u_int8_t regno, u_int16_t data) 354 { 355 struct esm_softc *ess = sc; 356 unsigned t; 357 358 /* We have to wait for a SAFE time to write addr/data */ 359 for (t = 0; t < 20; t++) { 360 if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT) 361 & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS) 362 break; 363 delay(2); /* 20.8us / 13 */ 364 } 365 if (t == 20) { 366 /* Timed out. Abort writing. */ 367 printf("%s: esm_write_codec() PROGLESS timed out.\n", 368 ess->sc_dev.dv_xname); 369 return -1; 370 } 371 372 bus_space_write_2(ess->st, ess->sh, PORT_CODEC_REG, data); 373 bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD, 374 CODEC_CMD_WRITE | regno); 375 376 return 0; 377 } 378 379 /* -------------------------------------------------------------------- */ 380 381 static inline void 382 ringbus_setdest(struct esm_softc *ess, int src, int dest) 383 { 384 u_int32_t data; 385 386 data = bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL); 387 data &= ~(0xfU << src); 388 data |= (0xfU & dest) << src; 389 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, data); 390 } 391 392 /* Wave Processor */ 393 394 static inline u_int16_t 395 wp_rdreg(struct esm_softc *ess, u_int16_t reg) 396 { 397 bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg); 398 return bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA); 399 } 400 401 static inline void 402 wp_wrreg(struct esm_softc *ess, u_int16_t reg, u_int16_t data) 403 { 404 bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg); 405 bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data); 406 } 407 408 static inline void 409 apu_setindex(struct esm_softc *ess, u_int16_t reg) 410 { 411 int t; 412 413 wp_wrreg(ess, WPREG_CRAM_PTR, reg); 414 /* Sometimes WP fails to set apu register index. */ 415 for (t = 0; t < 1000; t++) { 416 if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == reg) 417 break; 418 bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, reg); 419 } 420 if (t == 1000) 421 printf("%s: apu_setindex() timed out.\n", ess->sc_dev.dv_xname); 422 } 423 424 static inline u_int16_t 425 wp_rdapu(struct esm_softc *ess, int ch, u_int16_t reg) 426 { 427 u_int16_t ret; 428 429 apu_setindex(ess, ((unsigned)ch << 4) + reg); 430 ret = wp_rdreg(ess, WPREG_DATA_PORT); 431 return ret; 432 } 433 434 static inline void 435 wp_wrapu(struct esm_softc *ess, int ch, u_int16_t reg, u_int16_t data) 436 { 437 int t; 438 439 DPRINTF(ESM_DEBUG_APU, 440 ("wp_wrapu(%p, ch=%d, reg=0x%x, data=0x%04x)\n", 441 ess, ch, reg, data)); 442 443 apu_setindex(ess, ((unsigned)ch << 4) + reg); 444 wp_wrreg(ess, WPREG_DATA_PORT, data); 445 for (t = 0; t < 1000; t++) { 446 if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == data) 447 break; 448 bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data); 449 } 450 if (t == 1000) 451 printf("%s: wp_wrapu() timed out.\n", ess->sc_dev.dv_xname); 452 } 453 454 static inline void 455 wp_settimer(struct esm_softc *ess, u_int freq) 456 { 457 u_int clock = 48000 << 2; 458 u_int prescale = 0, divide = (freq != 0) ? (clock / freq) : ~0; 459 460 RANGE(divide, WPTIMER_MINDIV, WPTIMER_MAXDIV); 461 462 for (; divide > 32 << 1; divide >>= 1) 463 prescale++; 464 divide = (divide + 1) >> 1; 465 466 for (; prescale < 7 && divide > 2 && !(divide & 1); divide >>= 1) 467 prescale++; 468 469 DPRINTF(ESM_DEBUG_TIMER, 470 ("wp_settimer(%p, %u): clock = %u, prescale = %u, divide = %u\n", 471 ess, freq, clock, prescale, divide)); 472 473 wp_wrreg(ess, WPREG_TIMER_ENABLE, 0); 474 wp_wrreg(ess, WPREG_TIMER_FREQ, 475 (prescale << WP_TIMER_FREQ_PRESCALE_SHIFT) | (divide - 1)); 476 wp_wrreg(ess, WPREG_TIMER_ENABLE, 1); 477 } 478 479 static inline void 480 wp_starttimer(struct esm_softc *ess) 481 { 482 wp_wrreg(ess, WPREG_TIMER_START, 1); 483 } 484 485 static inline void 486 wp_stoptimer(struct esm_softc *ess) 487 { 488 wp_wrreg(ess, WPREG_TIMER_START, 0); 489 bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1); 490 } 491 492 /* WaveCache */ 493 494 static inline u_int16_t 495 wc_rdreg(struct esm_softc *ess, u_int16_t reg) 496 { 497 bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_INDEX, reg); 498 return bus_space_read_2(ess->st, ess->sh, PORT_WAVCACHE_DATA); 499 } 500 501 static inline void 502 wc_wrreg(struct esm_softc *ess, u_int16_t reg, u_int16_t data) 503 { 504 bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_INDEX, reg); 505 bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_DATA, data); 506 } 507 508 static inline u_int16_t 509 wc_rdchctl(struct esm_softc *ess, int ch) 510 { 511 return wc_rdreg(ess, ch << 3); 512 } 513 514 static inline void 515 wc_wrchctl(struct esm_softc *ess, int ch, u_int16_t data) 516 { 517 wc_wrreg(ess, ch << 3, data); 518 } 519 520 /* Power management */ 521 522 void 523 esm_power(struct esm_softc *ess, int status) 524 { 525 pcireg_t data; 526 int pmcapreg; 527 528 if (pci_get_capability(ess->pc, ess->tag, PCI_CAP_PWRMGMT, 529 &pmcapreg, 0)) { 530 data = pci_conf_read(ess->pc, ess->tag, pmcapreg + PCI_PMCSR); 531 if ((data && PCI_PMCSR_STATE_MASK) != status) 532 pci_conf_write(ess->pc, ess->tag, 533 pmcapreg + PCI_PMCSR, status); 534 } 535 } 536 537 538 /* ----------------------------- 539 * Controller. 540 */ 541 542 int 543 esm_attach_codec(void *sc, struct ac97_codec_if *codec_if) 544 { 545 struct esm_softc *ess = sc; 546 547 ess->codec_if = codec_if; 548 549 return 0; 550 } 551 552 int 553 esm_reset_codec(void *sc) 554 { 555 return 0; 556 } 557 558 559 enum ac97_host_flags 560 esm_flags_codec(void *sc) 561 { 562 struct esm_softc *ess = sc; 563 564 return ess->codec_flags; 565 } 566 567 568 void 569 esm_initcodec(struct esm_softc *ess) 570 { 571 u_int16_t data; 572 573 DPRINTF(ESM_DEBUG_CODEC, ("esm_initcodec(%p)\n", ess)); 574 575 if (bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL) 576 & RINGBUS_CTRL_ACLINK_ENABLED) { 577 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0); 578 delay(104); /* 20.8us * (4 + 1) */ 579 } 580 /* XXX - 2nd codec should be looked at. */ 581 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 582 RINGBUS_CTRL_AC97_SWRESET); 583 delay(2); 584 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 585 RINGBUS_CTRL_ACLINK_ENABLED); 586 delay(21); 587 588 esm_read_codec(ess, 0, &data); 589 if (bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT) 590 & CODEC_STAT_MASK) { 591 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0); 592 delay(21); 593 594 /* Try cold reset. */ 595 printf("%s: will perform cold reset.\n", ess->sc_dev.dv_xname); 596 data = bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR); 597 if (pci_conf_read(ess->pc, ess->tag, 0x58) & 1) 598 data |= 0x10; 599 data |= 0x009 & 600 ~bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DATA); 601 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, 0xff6); 602 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, 603 data | 0x009); 604 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x000); 605 delay(2); 606 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x001); 607 delay(1); 608 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x009); 609 delay(500000); 610 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, data); 611 delay(84); /* 20.8us * 4 */ 612 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 613 RINGBUS_CTRL_ACLINK_ENABLED); 614 delay(21); 615 } 616 } 617 618 void 619 esm_init(struct esm_softc *ess) 620 { 621 /* Reset direct sound. */ 622 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 623 HOSTINT_CTRL_DSOUND_RESET); 624 delay(10000); 625 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0); 626 delay(10000); 627 628 /* Enable direct sound interruption. */ 629 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 630 HOSTINT_CTRL_DSOUND_INT_ENABLED); 631 632 /* Setup Wave Processor. */ 633 634 /* Enable WaveCache */ 635 wp_wrreg(ess, WPREG_WAVE_ROMRAM, 636 WP_WAVE_VIRTUAL_ENABLED | WP_WAVE_DRAM_ENABLED); 637 bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_CTRL, 638 WAVCACHE_ENABLED | WAVCACHE_WTSIZE_4MB); 639 640 /* Setup Codec/Ringbus. */ 641 esm_initcodec(ess); 642 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 643 RINGBUS_CTRL_RINGBUS_ENABLED | RINGBUS_CTRL_ACLINK_ENABLED); 644 645 /* Undocumented registers from the Linux driver. */ 646 wp_wrreg(ess, 0x8, 0xB004); 647 wp_wrreg(ess, 0x9, 0x001B); 648 wp_wrreg(ess, 0xA, 0x8000); 649 wp_wrreg(ess, 0xB, 0x3F37); 650 wp_wrreg(ess, 0xD, 0x7632); 651 652 wp_wrreg(ess, WPREG_BASE, 0x8598); /* Parallel I/O */ 653 ringbus_setdest(ess, RINGBUS_SRC_ADC, 654 RINGBUS_DEST_STEREO | RINGBUS_DEST_DSOUND_IN); 655 ringbus_setdest(ess, RINGBUS_SRC_DSOUND, 656 RINGBUS_DEST_STEREO | RINGBUS_DEST_DAC); 657 658 /* Setup ASSP. Needed for Dell Inspiron 7500? */ 659 bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_B, 0x00); 660 bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_A, 0x03); 661 bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_C, 0x00); 662 663 /* 664 * Setup GPIO. 665 * There seems to be speciality with NEC systems. 666 */ 667 if (esm_get_quirks(ess->subid) & ESM_QUIRKF_GPIO) { 668 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, 669 0x9ff); 670 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, 671 bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR) | 672 0x600); 673 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 674 0x200); 675 } 676 677 DUMPREG(ess); 678 } 679 680 681 /* Channel controller. */ 682 683 int 684 esm_init_output (void *sc, void *start, int size) 685 { 686 struct esm_softc *ess = sc; 687 struct esm_dma *p; 688 689 p = &ess->sc_dma; 690 if ((caddr_t)start != p->addr + MAESTRO_PLAYBUF_OFF) { 691 printf("%s: esm_init_output: bad addr %p\n", 692 ess->sc_dev.dv_xname, start); 693 return EINVAL; 694 } 695 696 ess->pch.base = DMAADDR(p) + MAESTRO_PLAYBUF_OFF; 697 698 DPRINTF(ESM_DEBUG_DMA, ("%s: pch.base = 0x%x\n", 699 ess->sc_dev.dv_xname, ess->pch.base)); 700 701 return 0; 702 } 703 704 int 705 esm_init_input (void *sc, void *start, int size) 706 { 707 struct esm_softc *ess = sc; 708 struct esm_dma *p; 709 710 p = &ess->sc_dma; 711 if ((caddr_t)start != p->addr + MAESTRO_RECBUF_OFF) { 712 printf("%s: esm_init_input: bad addr %p\n", 713 ess->sc_dev.dv_xname, start); 714 return EINVAL; 715 } 716 717 switch (ess->rch.aputype) { 718 case APUTYPE_16BITSTEREO: 719 ess->rch.base = DMAADDR(p) + MAESTRO_RECBUF_L_OFF; 720 break; 721 default: 722 ess->rch.base = DMAADDR(p) + MAESTRO_RECBUF_OFF; 723 break; 724 } 725 726 DPRINTF(ESM_DEBUG_DMA, ("%s: rch.base = 0x%x\n", 727 ess->sc_dev.dv_xname, ess->rch.base)); 728 729 return 0; 730 } 731 732 int 733 esm_trigger_output(void *sc, void *start, void *end, int blksize, 734 void (*intr)(void *), void *arg, const audio_params_t *param) 735 { 736 struct esm_softc *ess = sc; 737 struct esm_chinfo *ch = &ess->pch; 738 struct esm_dma *p; 739 int pan = 0, choffset; 740 int i, nch = 1; 741 unsigned speed = ch->sample_rate, offset, wpwa, dv; 742 size_t size; 743 u_int16_t apuch = ch->num << 1; 744 745 DPRINTF(ESM_DEBUG_DMA, 746 ("esm_trigger_output(%p, %p, %p, 0x%x, %p, %p, %p)\n", 747 sc, start, end, blksize, intr, arg, param)); 748 749 #ifdef DIAGNOSTIC 750 if (ess->pactive) { 751 printf("%s: esm_trigger_output: already running", 752 ess->sc_dev.dv_xname); 753 return EINVAL; 754 } 755 #endif 756 757 ess->sc_pintr = intr; 758 ess->sc_parg = arg; 759 p = &ess->sc_dma; 760 if ((caddr_t)start != p->addr + MAESTRO_PLAYBUF_OFF) { 761 printf("%s: esm_trigger_output: bad addr %p\n", 762 ess->sc_dev.dv_xname, start); 763 return EINVAL; 764 } 765 766 ess->pch.blocksize = blksize; 767 ess->pch.apublk = blksize >> 1; 768 ess->pactive = 1; 769 770 size = (size_t)(((caddr_t)end - (caddr_t)start) >> 1); 771 choffset = MAESTRO_PLAYBUF_OFF; 772 offset = choffset >> 1; 773 wpwa = APU_USE_SYSMEM | ((offset >> 8) & APU_64KPAGE_MASK); 774 775 DPRINTF(ESM_DEBUG_DMA, 776 ("choffs=0x%x, wpwa=0x%x, size=0x%lx words\n", 777 choffset, wpwa, (unsigned long int)size)); 778 779 switch (ch->aputype) { 780 case APUTYPE_16BITSTEREO: 781 ess->pch.apublk >>= 1; 782 wpwa >>= 1; 783 size >>= 1; 784 offset >>= 1; 785 /* FALLTHROUGH */ 786 case APUTYPE_8BITSTEREO: 787 if (ess->codec_flags & AC97_HOST_SWAPPED_CHANNELS) 788 pan = 8; 789 else 790 pan = -8; 791 nch++; 792 break; 793 case APUTYPE_8BITLINEAR: 794 ess->pch.apublk <<= 1; 795 speed >>= 1; 796 break; 797 } 798 799 ess->pch.apubase = offset; 800 ess->pch.apubuf = size; 801 ess->pch.nextirq = ess->pch.apublk; 802 803 set_timer(ess); 804 wp_starttimer(ess); 805 806 dv = (((speed % 48000) << 16) + 24000) / 48000 807 + ((speed / 48000) << 16); 808 809 for (i = nch-1; i >= 0; i--) { 810 wp_wrapu(ess, apuch + i, APUREG_WAVESPACE, wpwa & 0xff00); 811 wp_wrapu(ess, apuch + i, APUREG_CURPTR, offset); 812 wp_wrapu(ess, apuch + i, APUREG_ENDPTR, offset + size); 813 wp_wrapu(ess, apuch + i, APUREG_LOOPLEN, size - 1); 814 wp_wrapu(ess, apuch + i, APUREG_AMPLITUDE, 0xe800); 815 wp_wrapu(ess, apuch + i, APUREG_POSITION, 0x8f00 816 | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT) 817 | ((PAN_FRONT + pan) << APU_PAN_SHIFT)); 818 wp_wrapu(ess, apuch + i, APUREG_FREQ_LOBYTE, APU_plus6dB 819 | ((dv & 0xff) << APU_FREQ_LOBYTE_SHIFT)); 820 wp_wrapu(ess, apuch + i, APUREG_FREQ_HIWORD, dv >> 8); 821 822 if (ch->aputype == APUTYPE_16BITSTEREO) 823 wpwa |= APU_STEREO >> 1; 824 pan = -pan; 825 } 826 827 wc_wrchctl(ess, apuch, ch->wcreg_tpl); 828 if (nch > 1) 829 wc_wrchctl(ess, apuch + 1, ch->wcreg_tpl); 830 831 wp_wrapu(ess, apuch, APUREG_APUTYPE, 832 (ch->aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf); 833 if (ch->wcreg_tpl & WAVCACHE_CHCTL_STEREO) 834 wp_wrapu(ess, apuch + 1, APUREG_APUTYPE, 835 (ch->aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf); 836 837 return 0; 838 } 839 840 841 int 842 esm_trigger_input(void *sc, void *start, void *end, int blksize, 843 void (*intr)(void *), void *arg, const audio_params_t *param) 844 { 845 struct esm_softc *ess = sc; 846 struct esm_chinfo *ch = &ess->rch; 847 struct esm_dma *p; 848 u_int32_t chctl, choffset; 849 int i, nch = 1; 850 u_int32_t speed = ch->sample_rate, offset, wpwa, dv; 851 size_t size; 852 u_int16_t apuch = ch->num << 1; 853 u_int32_t mixoffset, mixdv; 854 size_t mixsize; 855 u_int16_t reg; 856 857 DPRINTF(ESM_DEBUG_DMA, 858 ("esm_trigger_input(%p, %p, %p, 0x%x, %p, %p, %p)\n", 859 sc, start, end, blksize, intr, arg, param)); 860 861 #ifdef DIAGNOSTIC 862 if (ess->ractive) { 863 printf("%s: esm_trigger_input: already running", 864 ess->sc_dev.dv_xname); 865 return EINVAL; 866 } 867 #endif 868 869 ess->sc_rintr = intr; 870 ess->sc_rarg = arg; 871 p = &ess->sc_dma; 872 if ((caddr_t)start != p->addr + MAESTRO_RECBUF_OFF) { 873 printf("%s: esm_trigger_input: bad addr %p\n", 874 ess->sc_dev.dv_xname, start); 875 return EINVAL; 876 } 877 878 ess->rch.buffer = (caddr_t)start; 879 ess->rch.offset = 0; 880 ess->rch.blocksize = blksize; 881 ess->rch.bufsize = ((caddr_t)end - (caddr_t)start); 882 ess->rch.apublk = blksize >> 1; 883 ess->ractive = 1; 884 885 size = (size_t)(((caddr_t)end - (caddr_t)start) >> 1); 886 choffset = MAESTRO_RECBUF_OFF; 887 switch (ch->aputype) { 888 case APUTYPE_16BITSTEREO: 889 size >>= 1; 890 choffset = MAESTRO_RECBUF_L_OFF; 891 ess->rch.apublk >>= 1; 892 nch++; 893 break; 894 case APUTYPE_16BITLINEAR: 895 break; 896 default: 897 ess->ractive = 0; 898 return EINVAL; 899 } 900 901 mixsize = (MAESTRO_MIXBUF_SZ >> 1) >> 1; 902 mixoffset = MAESTRO_MIXBUF_OFF; 903 904 ess->rch.apubase = (choffset >> 1); 905 ess->rch.apubuf = size; 906 ess->rch.nextirq = ess->rch.apublk; 907 908 set_timer(ess); 909 wp_starttimer(ess); 910 911 if (speed > 47999) speed = 47999; 912 if (speed < 4000) speed = 4000; 913 dv = (((speed % 48000) << 16) + 24000) / 48000 914 + ((speed / 48000) << 16); 915 mixdv = 65536; /* 48KHz */ 916 917 for (i = 0; i < nch; i++) { 918 919 /* Clear all rate conversion WP channel registers first. */ 920 for (reg = 0; reg < 15; reg++) 921 wp_wrapu(ess, apuch + i, reg, 0); 922 923 /* Program the WaveCache for the rate conversion WP channel. */ 924 chctl = (DMAADDR(p) + choffset - 0x10) & 925 WAVCACHE_CHCTL_ADDRTAG_MASK; 926 wc_wrchctl(ess, apuch + i, chctl); 927 928 /* Program the rate conversion WP channel. */ 929 wp_wrapu(ess, apuch + i, APUREG_FREQ_LOBYTE, APU_plus6dB 930 | ((dv & 0xff) << APU_FREQ_LOBYTE_SHIFT) | 0x08); 931 wp_wrapu(ess, apuch + i, APUREG_FREQ_HIWORD, dv >> 8); 932 offset = choffset >> 1; 933 wpwa = APU_USE_SYSMEM | ((offset >> 8) & APU_64KPAGE_MASK); 934 wp_wrapu(ess, apuch + i, APUREG_WAVESPACE, wpwa); 935 wp_wrapu(ess, apuch + i, APUREG_CURPTR, offset); 936 wp_wrapu(ess, apuch + i, APUREG_ENDPTR, offset + size); 937 wp_wrapu(ess, apuch + i, APUREG_LOOPLEN, size - 1); 938 wp_wrapu(ess, apuch + i, APUREG_EFFECTS_ENV, 0x00f0); 939 wp_wrapu(ess, apuch + i, APUREG_AMPLITUDE, 0xe800); 940 wp_wrapu(ess, apuch + i, APUREG_POSITION, 0x8f00 941 | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT) 942 | (PAN_FRONT << APU_PAN_SHIFT)); 943 wp_wrapu(ess, apuch + i, APUREG_ROUTE, apuch + 2 + i); 944 945 DPRINTF(ESM_DEBUG_DMA, 946 ("choffs=0x%x, wpwa=0x%x, offset=0x%x words, size=0x%lx words\n", 947 choffset, wpwa, offset, (unsigned long int)size)); 948 949 /* Clear all mixer WP channel registers first. */ 950 for (reg = 0; reg < 15; reg++) 951 wp_wrapu(ess, apuch + 2 + i, reg, 0); 952 953 /* Program the WaveCache for the mixer WP channel. */ 954 chctl = (ess->rch.base + mixoffset - 0x10) & 955 WAVCACHE_CHCTL_ADDRTAG_MASK; 956 wc_wrchctl(ess, apuch + 2 + i, chctl); 957 958 /* Program the mixer WP channel. */ 959 wp_wrapu(ess, apuch + 2 + i, APUREG_FREQ_LOBYTE, APU_plus6dB 960 | ((mixdv & 0xff) << APU_FREQ_LOBYTE_SHIFT) | 0x08); 961 wp_wrapu(ess, apuch + 2 + i, APUREG_FREQ_HIWORD, mixdv >> 8); 962 offset = mixoffset >> 1; 963 wpwa = APU_USE_SYSMEM | ((offset >> 8) & APU_64KPAGE_MASK); 964 wp_wrapu(ess, apuch + 2 + i, APUREG_WAVESPACE, wpwa); 965 wp_wrapu(ess, apuch + 2 + i, APUREG_CURPTR, offset); 966 wp_wrapu(ess, apuch + 2 + i, APUREG_ENDPTR, 967 offset + mixsize); 968 wp_wrapu(ess, apuch + 2 + i, APUREG_LOOPLEN, mixsize); 969 wp_wrapu(ess, apuch + 2 + i, APUREG_EFFECTS_ENV, 0x00f0); 970 wp_wrapu(ess, apuch + 2 + i, APUREG_AMPLITUDE, 0xe800); 971 wp_wrapu(ess, apuch + 2 + i, APUREG_POSITION, 0x8f00 972 | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT) 973 | (PAN_FRONT << APU_PAN_SHIFT)); 974 wp_wrapu(ess, apuch + 2 + i, APUREG_ROUTE, 975 ROUTE_PARALLEL + i); 976 977 DPRINTF(ESM_DEBUG_DMA, 978 ("mixoffs=0x%x, wpwa=0x%x, offset=0x%x words, size=0x%lx words\n", 979 mixoffset, wpwa, offset, (unsigned long int)mixsize)); 980 981 /* Assume we're going to loop to do the right channel. */ 982 choffset += MAESTRO_RECBUF_L_SZ; 983 mixoffset += MAESTRO_MIXBUF_SZ >> 1; 984 } 985 986 wp_wrapu(ess, apuch, APUREG_APUTYPE, 987 (APUTYPE_RATECONV << APU_APUTYPE_SHIFT) | 988 APU_DMA_ENABLED | 0xf); 989 if (nch > 1) 990 wp_wrapu(ess, apuch + 1, APUREG_APUTYPE, 991 (APUTYPE_RATECONV << APU_APUTYPE_SHIFT) | 992 APU_DMA_ENABLED | 0xf); 993 wp_wrapu(ess, apuch + 2, APUREG_APUTYPE, 994 (APUTYPE_INPUTMIXER << APU_APUTYPE_SHIFT) | 995 APU_DMA_ENABLED | 0xf); 996 if (nch > 1) 997 wp_wrapu(ess, apuch + 3, APUREG_APUTYPE, 998 (APUTYPE_RATECONV << APU_APUTYPE_SHIFT) | 999 APU_DMA_ENABLED | 0xf); 1000 1001 return 0; 1002 } 1003 1004 1005 int 1006 esm_halt_output(void *sc) 1007 { 1008 struct esm_softc *ess = sc; 1009 struct esm_chinfo *ch = &ess->pch; 1010 1011 DPRINTF(ESM_DEBUG_PARAM, ("esm_halt_output(%p)\n", sc)); 1012 1013 wp_wrapu(ess, (ch->num << 1), APUREG_APUTYPE, 1014 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1015 wp_wrapu(ess, (ch->num << 1) + 1, APUREG_APUTYPE, 1016 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1017 1018 ess->pactive = 0; 1019 if (!ess->ractive) 1020 wp_stoptimer(ess); 1021 1022 return 0; 1023 } 1024 1025 1026 int 1027 esm_halt_input(void *sc) 1028 { 1029 struct esm_softc *ess = sc; 1030 struct esm_chinfo *ch = &ess->rch; 1031 1032 DPRINTF(ESM_DEBUG_PARAM, ("esm_halt_input(%p)\n", sc)); 1033 1034 wp_wrapu(ess, (ch->num << 1), APUREG_APUTYPE, 1035 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1036 wp_wrapu(ess, (ch->num << 1) + 1, APUREG_APUTYPE, 1037 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1038 wp_wrapu(ess, (ch->num << 1) + 2, APUREG_APUTYPE, 1039 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1040 wp_wrapu(ess, (ch->num << 1) + 3, APUREG_APUTYPE, 1041 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1042 1043 ess->ractive = 0; 1044 if (!ess->pactive) 1045 wp_stoptimer(ess); 1046 1047 return 0; 1048 } 1049 1050 1051 static inline u_int 1052 calc_timer_freq(struct esm_chinfo *ch) 1053 { 1054 u_int freq; 1055 1056 freq = (ch->sample_rate + ch->apublk - 1) / ch->apublk; 1057 1058 DPRINTF(ESM_DEBUG_TIMER, 1059 ("calc_timer_freq(%p): rate = %u, blk = 0x%x (0x%x): freq = %u\n", 1060 ch, ch->sample_rate, ch->apublk, ch->blocksize, freq)); 1061 1062 return freq; 1063 } 1064 1065 static void 1066 set_timer(struct esm_softc *ess) 1067 { 1068 unsigned freq = 0, freq2; 1069 1070 if (ess->pactive) 1071 freq = calc_timer_freq(&ess->pch); 1072 1073 if (ess->ractive) { 1074 freq2 = calc_timer_freq(&ess->rch); 1075 if (freq2 > freq) 1076 freq = freq2; 1077 } 1078 1079 KASSERT(freq != 0); 1080 1081 for (; freq < MAESTRO_MINFREQ; freq <<= 1) 1082 ; 1083 1084 if (freq > 0) 1085 wp_settimer(ess, freq); 1086 } 1087 1088 1089 static void 1090 esmch_set_format(struct esm_chinfo *ch, const audio_params_t *p) 1091 { 1092 u_int16_t wcreg_tpl = (ch->base - 16) & WAVCACHE_CHCTL_ADDRTAG_MASK; 1093 u_int16_t aputype = APUTYPE_16BITLINEAR; 1094 1095 if (p->channels == 2) { 1096 wcreg_tpl |= WAVCACHE_CHCTL_STEREO; 1097 aputype++; 1098 } 1099 if (p->precision == 8) { 1100 aputype += 2; 1101 switch (p->encoding) { 1102 case AUDIO_ENCODING_ULINEAR: 1103 case AUDIO_ENCODING_ULINEAR_BE: 1104 case AUDIO_ENCODING_ULINEAR_LE: 1105 wcreg_tpl |= WAVCACHE_CHCTL_U8; 1106 break; 1107 } 1108 } 1109 ch->wcreg_tpl = wcreg_tpl; 1110 ch->aputype = aputype; 1111 ch->sample_rate = p->sample_rate; 1112 1113 DPRINTF(ESM_DEBUG_PARAM, ("esmch_set_format: " 1114 "numch=%u, prec=%u, tpl=0x%x, aputype=%d, rate=%u\n", 1115 p->channels, p->precision, wcreg_tpl, aputype, p->sample_rate)); 1116 } 1117 1118 /* 1119 * Since we can't record in true stereo, this function combines 1120 * the separately recorded left and right channels into the final 1121 * buffer for the upper layer. 1122 */ 1123 static void 1124 esmch_combine_input(struct esm_softc *ess, struct esm_chinfo *ch) 1125 { 1126 u_int32_t *dst32s; 1127 size_t offset, resid, count; 1128 const u_int32_t *left32s, *right32s; 1129 u_int32_t left32, right32; 1130 1131 /* The current offset into the upper layer buffer. */ 1132 offset = ch->offset; 1133 1134 /* The number of bytes left to combine. */ 1135 resid = ch->blocksize; 1136 1137 while (resid > 0) { 1138 1139 /* The 32-bit words for the left channel. */ 1140 left32s = (const u_int32_t *)(ess->sc_dma.addr + 1141 MAESTRO_RECBUF_L_OFF + offset / 2); 1142 1143 /* The 32-bit words for the right channel. */ 1144 right32s = (const u_int32_t *)(ess->sc_dma.addr + 1145 MAESTRO_RECBUF_R_OFF + offset / 2); 1146 1147 /* The pointer to the 32-bit words we will write. */ 1148 dst32s = (u_int32_t *)(ch->buffer + offset); 1149 1150 /* Get the number of bytes we will combine now. */ 1151 count = ch->bufsize - offset; 1152 if (count > resid) 1153 count = resid; 1154 resid -= count; 1155 offset += count; 1156 if (offset == ch->bufsize) 1157 offset = 0; 1158 1159 /* Combine, writing two 32-bit words at a time. */ 1160 KASSERT((count & (sizeof(uint32_t) * 2 - 1)) == 0); 1161 count /= (sizeof(u_int32_t) * 2); 1162 while (count > 0) { 1163 left32 = *(left32s++); 1164 right32 = *(right32s++); 1165 /* XXX this endian handling is half-baked at best */ 1166 #if BYTE_ORDER == LITTLE_ENDIAN 1167 *(dst32s++) = (left32 & 0xFFFF) | (right32 << 16); 1168 *(dst32s++) = (left32 >> 16) | (right32 & 0xFFFF0000); 1169 #else /* BYTE_ORDER == BIG_ENDIAN */ 1170 *(dst32s++) = (left32 & 0xFFFF0000) | (right32 >> 16); 1171 *(dst32s++) = (left32 << 16) | (right32 & 0xFFFF); 1172 #endif /* BYTE_ORDER == BIG_ENDIAN */ 1173 count--; 1174 } 1175 } 1176 1177 /* Update the offset. */ 1178 ch->offset = offset; 1179 } 1180 1181 /* 1182 * Audio interface glue functions 1183 */ 1184 1185 int 1186 esm_getdev (void *sc, struct audio_device *adp) 1187 { 1188 *adp = esm_device; 1189 return 0; 1190 } 1191 1192 1193 int 1194 esm_round_blocksize(void *sc, int blk, int mode, const audio_params_t *param) 1195 { 1196 DPRINTF(ESM_DEBUG_PARAM, 1197 ("esm_round_blocksize(%p, 0x%x)", sc, blk)); 1198 1199 blk &= ~0x3f; /* keep good alignment */ 1200 1201 DPRINTF(ESM_DEBUG_PARAM, (" = 0x%x\n", blk)); 1202 1203 return blk; 1204 } 1205 1206 1207 int 1208 esm_query_encoding(void *sc, struct audio_encoding *fp) 1209 { 1210 DPRINTF(ESM_DEBUG_PARAM, 1211 ("esm_query_encoding(%p, %d)\n", sc, fp->index)); 1212 1213 if (fp->index < 0 || fp->index >= MAESTRO_NENCODINGS) 1214 return EINVAL; 1215 1216 *fp = esm_encoding[fp->index]; 1217 return 0; 1218 } 1219 1220 1221 int 1222 esm_set_params(void *sc, int setmode, int usemode, 1223 audio_params_t *play, audio_params_t *rec, 1224 stream_filter_list_t *pfil, stream_filter_list_t *rfil) 1225 { 1226 struct esm_softc *ess = sc; 1227 audio_params_t *p; 1228 const audio_params_t *hw_play, *hw_rec; 1229 stream_filter_list_t *fil; 1230 int mode, i; 1231 1232 DPRINTF(ESM_DEBUG_PARAM, 1233 ("esm_set_params(%p, 0x%x, 0x%x, %p, %p)\n", 1234 sc, setmode, usemode, play, rec)); 1235 1236 hw_play = NULL; 1237 hw_rec = NULL; 1238 for (mode = AUMODE_RECORD; mode != -1; 1239 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1240 if ((setmode & mode) == 0) 1241 continue; 1242 1243 p = mode == AUMODE_PLAY ? play : rec; 1244 1245 if (p->sample_rate < 4000 || p->sample_rate > 48000 || 1246 (p->precision != 8 && p->precision != 16) || 1247 (p->channels != 1 && p->channels != 2)) 1248 return EINVAL; 1249 1250 fil = mode == AUMODE_PLAY ? pfil : rfil; 1251 i = auconv_set_converter(esm_formats, ESM_NFORMATS, 1252 mode, p, FALSE, fil); 1253 if (i < 0) 1254 return EINVAL; 1255 if (fil->req_size > 0) 1256 p = &fil->filters[0].param; 1257 if (mode == AUMODE_PLAY) 1258 hw_play = p; 1259 else 1260 hw_rec = p; 1261 } 1262 1263 if (setmode & AUMODE_PLAY) 1264 esmch_set_format(&ess->pch, hw_play); 1265 1266 if (setmode & AUMODE_RECORD) 1267 esmch_set_format(&ess->rch, hw_rec); 1268 1269 return 0; 1270 } 1271 1272 1273 int 1274 esm_set_port(void *sc, mixer_ctrl_t *cp) 1275 { 1276 struct esm_softc *ess = sc; 1277 1278 return (ess->codec_if->vtbl->mixer_set_port(ess->codec_if, cp)); 1279 } 1280 1281 1282 int 1283 esm_get_port(void *sc, mixer_ctrl_t *cp) 1284 { 1285 struct esm_softc *ess = sc; 1286 1287 return (ess->codec_if->vtbl->mixer_get_port(ess->codec_if, cp)); 1288 } 1289 1290 1291 int 1292 esm_query_devinfo(void *sc, mixer_devinfo_t *dip) 1293 { 1294 struct esm_softc *ess = sc; 1295 1296 return (ess->codec_if->vtbl->query_devinfo(ess->codec_if, dip)); 1297 } 1298 1299 1300 void * 1301 esm_malloc(void *sc, int direction, size_t size, struct malloc_type *pool, 1302 int flags) 1303 { 1304 struct esm_softc *ess = sc; 1305 int off; 1306 1307 DPRINTF(ESM_DEBUG_DMA, 1308 ("esm_malloc(%p, %d, 0x%lx, %p, 0x%x)", 1309 sc, direction, (unsigned long int)size, pool, flags)); 1310 1311 /* 1312 * Each buffer can only be allocated once. 1313 */ 1314 if (ess->rings_alloced & direction) { 1315 DPRINTF(ESM_DEBUG_DMA, (" = 0 (ENOMEM)\n")); 1316 return 0; 1317 } 1318 1319 /* 1320 * Mark this buffer as allocated and return its 1321 * kernel virtual address. 1322 */ 1323 ess->rings_alloced |= direction; 1324 off = (direction == AUMODE_PLAY ? 1325 MAESTRO_PLAYBUF_OFF : MAESTRO_RECBUF_OFF); 1326 DPRINTF(ESM_DEBUG_DMA, (" = %p (DMAADDR 0x%x)\n", 1327 ess->sc_dma.addr + off, 1328 (int)DMAADDR(&ess->sc_dma) + off)); 1329 return (ess->sc_dma.addr + off); 1330 } 1331 1332 1333 void 1334 esm_free(void *sc, void *ptr, struct malloc_type *pool) 1335 { 1336 struct esm_softc *ess = sc; 1337 1338 DPRINTF(ESM_DEBUG_DMA, 1339 ("esm_free(%p, %p, %p)\n", 1340 sc, ptr, pool)); 1341 1342 if ((caddr_t)ptr == ess->sc_dma.addr + MAESTRO_PLAYBUF_OFF) 1343 ess->rings_alloced &= ~AUMODE_PLAY; 1344 else if ((caddr_t)ptr == ess->sc_dma.addr + MAESTRO_RECBUF_OFF) 1345 ess->rings_alloced &= ~AUMODE_RECORD; 1346 } 1347 1348 1349 size_t 1350 esm_round_buffersize(void *sc, int direction, size_t size) 1351 { 1352 if (size > MAESTRO_PLAYBUF_SZ) 1353 size = MAESTRO_PLAYBUF_SZ; 1354 if (size > MAESTRO_RECBUF_SZ) 1355 size = MAESTRO_RECBUF_SZ; 1356 return size; 1357 } 1358 1359 1360 paddr_t 1361 esm_mappage(void *sc, void *mem, off_t off, int prot) 1362 { 1363 struct esm_softc *ess = sc; 1364 1365 DPRINTF(ESM_DEBUG_DMA, 1366 ("esm_mappage(%p, %p, 0x%lx, 0x%x)\n", 1367 sc, mem, (unsigned long)off, prot)); 1368 1369 if (off < 0) 1370 return (-1); 1371 1372 if ((caddr_t)mem == ess->sc_dma.addr + MAESTRO_PLAYBUF_OFF) 1373 off += MAESTRO_PLAYBUF_OFF; 1374 else if ((caddr_t)mem == ess->sc_dma.addr + MAESTRO_RECBUF_OFF) 1375 off += MAESTRO_RECBUF_OFF; 1376 else 1377 return -1; 1378 return bus_dmamem_mmap(ess->dmat, ess->sc_dma.segs, ess->sc_dma.nsegs, 1379 off, prot, BUS_DMA_WAITOK); 1380 } 1381 1382 1383 int 1384 esm_get_props(void *sc) 1385 { 1386 return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1387 } 1388 1389 1390 /* ----------------------------- 1391 * Bus space. 1392 */ 1393 1394 int 1395 esm_intr(void *sc) 1396 { 1397 struct esm_softc *ess = sc; 1398 u_int16_t status; 1399 u_int16_t pos; 1400 int ret = 0; 1401 1402 status = bus_space_read_1(ess->st, ess->sh, PORT_HOSTINT_STAT); 1403 if (!status) 1404 return 0; 1405 1406 /* Acknowledge all. */ 1407 bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1); 1408 bus_space_write_1(ess->st, ess->sh, PORT_HOSTINT_STAT, 0); 1409 #if 0 /* XXX - HWVOL */ 1410 if (status & HOSTINT_STAT_HWVOL) { 1411 u_int delta; 1412 delta = bus_space_read_1(ess->st, ess->sh, PORT_HWVOL_MASTER) 1413 - 0x88; 1414 if (delta & 0x11) 1415 mixer_set(device_get_softc(ess->dev), 1416 SOUND_MIXER_VOLUME, 0); 1417 else { 1418 mixer_set(device_get_softc(ess->dev), 1419 SOUND_MIXER_VOLUME, 1420 mixer_get(device_get_softc(ess->dev), 1421 SOUND_MIXER_VOLUME) 1422 + ((delta >> 5) & 0x7) - 4 1423 + ((delta << 7) & 0x700) - 0x400); 1424 } 1425 bus_space_write_1(ess->st, ess->sh, PORT_HWVOL_MASTER, 0x88); 1426 ret++; 1427 } 1428 #endif /* XXX - HWVOL */ 1429 1430 if (ess->pactive) { 1431 pos = wp_rdapu(ess, ess->pch.num << 1, APUREG_CURPTR); 1432 1433 DPRINTF(ESM_DEBUG_IRQ, (" %4.4x/%4.4x ", pos, 1434 wp_rdapu(ess, (ess->pch.num<<1)+1, APUREG_CURPTR))); 1435 1436 pos -= ess->pch.apubase; 1437 if (pos >= ess->pch.nextirq && 1438 pos - ess->pch.nextirq < ess->pch.apubuf / 2) { 1439 ess->pch.nextirq += ess->pch.apublk; 1440 1441 if (ess->pch.nextirq >= ess->pch.apubuf) 1442 ess->pch.nextirq = 0; 1443 1444 if (ess->sc_pintr) { 1445 DPRINTF(ESM_DEBUG_IRQ, ("P\n")); 1446 ess->sc_pintr(ess->sc_parg); 1447 } 1448 1449 } 1450 ret++; 1451 } 1452 1453 if (ess->ractive) { 1454 pos = wp_rdapu(ess, ess->rch.num << 1, APUREG_CURPTR); 1455 1456 DPRINTF(ESM_DEBUG_IRQ, (" %4.4x/%4.4x ", pos, 1457 wp_rdapu(ess, (ess->rch.num<<1)+1, APUREG_CURPTR))); 1458 1459 pos -= ess->rch.apubase; 1460 if (pos >= ess->rch.nextirq && 1461 pos - ess->rch.nextirq < ess->rch.apubuf / 2) { 1462 ess->rch.nextirq += ess->rch.apublk; 1463 1464 if (ess->rch.nextirq >= ess->rch.apubuf) 1465 ess->rch.nextirq = 0; 1466 1467 if (ess->sc_rintr) { 1468 DPRINTF(ESM_DEBUG_IRQ, ("R\n")); 1469 switch(ess->rch.aputype) { 1470 case APUTYPE_16BITSTEREO: 1471 esmch_combine_input(ess, &ess->rch); 1472 break; 1473 } 1474 ess->sc_rintr(ess->sc_rarg); 1475 } 1476 1477 } 1478 ret++; 1479 } 1480 1481 return ret; 1482 } 1483 1484 1485 int 1486 esm_allocmem(struct esm_softc *sc, size_t size, size_t align, 1487 struct esm_dma *p) 1488 { 1489 int error; 1490 1491 p->size = size; 1492 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1493 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1494 &p->nsegs, BUS_DMA_NOWAIT); 1495 if (error) 1496 return error; 1497 1498 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1499 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1500 if (error) 1501 goto free; 1502 1503 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1504 0, BUS_DMA_NOWAIT, &p->map); 1505 if (error) 1506 goto unmap; 1507 1508 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1509 BUS_DMA_NOWAIT); 1510 if (error) 1511 goto destroy; 1512 1513 return 0; 1514 1515 destroy: 1516 bus_dmamap_destroy(sc->dmat, p->map); 1517 unmap: 1518 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1519 free: 1520 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1521 1522 return error; 1523 } 1524 1525 1526 int 1527 esm_match(struct device *dev, struct cfdata *match, void *aux) 1528 { 1529 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 1530 1531 switch (PCI_VENDOR(pa->pa_id)) { 1532 case PCI_VENDOR_ESSTECH: 1533 switch (PCI_PRODUCT(pa->pa_id)) { 1534 case PCI_PRODUCT_ESSTECH_MAESTRO1: 1535 case PCI_PRODUCT_ESSTECH_MAESTRO2: 1536 case PCI_PRODUCT_ESSTECH_MAESTRO2E: 1537 return 1; 1538 } 1539 1540 case PCI_VENDOR_ESSTECH2: 1541 switch (PCI_PRODUCT(pa->pa_id)) { 1542 case PCI_PRODUCT_ESSTECH2_MAESTRO1: 1543 return 1; 1544 } 1545 } 1546 return 0; 1547 } 1548 1549 void 1550 esm_attach(struct device *parent, struct device *self, void *aux) 1551 { 1552 struct esm_softc *ess = (struct esm_softc *)self; 1553 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 1554 pci_chipset_tag_t pc = pa->pa_pc; 1555 pcitag_t tag = pa->pa_tag; 1556 pci_intr_handle_t ih; 1557 pcireg_t csr, data; 1558 u_int16_t codec_data; 1559 u_int16_t pcmbar; 1560 const char *intrstr; 1561 int revision; 1562 char devinfo[256]; 1563 1564 aprint_naive(": Audio controller\n"); 1565 1566 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 1567 revision = PCI_REVISION(pa->pa_class); 1568 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, revision); 1569 1570 /* Enable the device. */ 1571 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 1572 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 1573 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE); 1574 1575 /* Map I/O register */ 1576 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 1577 &ess->st, &ess->sh, NULL, NULL)) { 1578 aprint_error("%s: can't map i/o space\n", ess->sc_dev.dv_xname); 1579 return; 1580 } 1581 1582 /* Initialize softc */ 1583 ess->pch.num = 0; 1584 ess->rch.num = 1; 1585 ess->dmat = pa->pa_dmat; 1586 ess->tag = tag; 1587 ess->pc = pc; 1588 ess->subid = pci_conf_read(pc, tag, PCI_SUBSYS_ID_REG); 1589 1590 DPRINTF(ESM_DEBUG_PCI, 1591 ("%s: sub-system vendor 0x%4.4x, product 0x%4.4x\n", 1592 ess->sc_dev.dv_xname, 1593 PCI_VENDOR(ess->subid), PCI_PRODUCT(ess->subid))); 1594 1595 /* Map and establish the interrupt. */ 1596 if (pci_intr_map(pa, &ih)) { 1597 aprint_error("%s: can't map interrupt\n", ess->sc_dev.dv_xname); 1598 return; 1599 } 1600 intrstr = pci_intr_string(pc, ih); 1601 ess->ih = pci_intr_establish(pc, ih, IPL_AUDIO, esm_intr, self); 1602 if (ess->ih == NULL) { 1603 aprint_error("%s: can't establish interrupt", 1604 ess->sc_dev.dv_xname); 1605 if (intrstr != NULL) 1606 aprint_normal(" at %s", intrstr); 1607 aprint_normal("\n"); 1608 return; 1609 } 1610 aprint_normal("%s: interrupting at %s\n", 1611 ess->sc_dev.dv_xname, intrstr); 1612 1613 /* 1614 * Setup PCI config registers 1615 */ 1616 1617 /* set to power state D0 */ 1618 esm_power(ess, PCI_PMCSR_STATE_D0); 1619 delay(100000); 1620 1621 /* Disable all legacy emulations. */ 1622 data = pci_conf_read(pc, tag, CONF_LEGACY); 1623 pci_conf_write(pc, tag, CONF_LEGACY, data | LEGACY_DISABLED); 1624 1625 /* Disconnect from CHI. (Makes Dell inspiron 7500 work?) 1626 * Enable posted write. 1627 * Prefer PCI timing rather than that of ISA. 1628 * Don't swap L/R. */ 1629 data = pci_conf_read(pc, tag, CONF_MAESTRO); 1630 data |= MAESTRO_CHIBUS | MAESTRO_POSTEDWRITE | MAESTRO_DMA_PCITIMING; 1631 data &= ~MAESTRO_SWAP_LR; 1632 pci_conf_write(pc, tag, CONF_MAESTRO, data); 1633 1634 /* initialize sound chip */ 1635 esm_init(ess); 1636 1637 esm_read_codec(ess, 0, &codec_data); 1638 if (codec_data == 0x80) { 1639 aprint_error("%s: PT101 codec detected!\n", 1640 ess->sc_dev.dv_xname); 1641 return; 1642 } 1643 1644 /* 1645 * Some cards and Notebooks appear to have left and right channels 1646 * reversed. Check if there is a corresponding quirk entry for 1647 * the subsystem vendor and product and if so, set the appropriate 1648 * codec flag. 1649 */ 1650 if (esm_get_quirks(ess->subid) & ESM_QUIRKF_SWAPPEDCH) { 1651 ess->codec_flags |= AC97_HOST_SWAPPED_CHANNELS; 1652 } 1653 ess->codec_flags |= AC97_HOST_DONT_READ; 1654 1655 /* initialize AC97 host interface */ 1656 ess->host_if.arg = self; 1657 ess->host_if.attach = esm_attach_codec; 1658 ess->host_if.read = esm_read_codec; 1659 ess->host_if.write = esm_write_codec; 1660 ess->host_if.reset = esm_reset_codec; 1661 ess->host_if.flags = esm_flags_codec; 1662 1663 if (ac97_attach(&ess->host_if, self) != 0) 1664 return; 1665 1666 /* allocate our DMA region */ 1667 if (esm_allocmem(ess, MAESTRO_DMA_SZ, MAESTRO_DMA_ALIGN, 1668 &ess->sc_dma)) { 1669 aprint_error("%s: couldn't allocate memory!\n", 1670 ess->sc_dev.dv_xname); 1671 return; 1672 } 1673 ess->rings_alloced = 0; 1674 1675 /* set DMA base address */ 1676 for (pcmbar = WAVCACHE_PCMBAR; pcmbar < WAVCACHE_PCMBAR + 4; pcmbar++) 1677 wc_wrreg(ess, pcmbar, 1678 DMAADDR(&ess->sc_dma) >> WAVCACHE_BASEADDR_SHIFT); 1679 1680 audio_attach_mi(&esm_hw_if, self, &ess->sc_dev); 1681 1682 ess->esm_suspend = PWR_RESUME; 1683 ess->esm_powerhook = powerhook_establish(esm_powerhook, ess); 1684 } 1685 1686 /* Power Hook */ 1687 void 1688 esm_powerhook(why, v) 1689 int why; 1690 void *v; 1691 { 1692 struct esm_softc *ess = (struct esm_softc *)v; 1693 1694 DPRINTF(ESM_DEBUG_PARAM, 1695 ("%s: ESS maestro 2E why=%d\n", ess->sc_dev.dv_xname, why)); 1696 switch (why) { 1697 case PWR_SUSPEND: 1698 case PWR_STANDBY: 1699 ess->esm_suspend = why; 1700 esm_suspend(ess); 1701 DPRINTF(ESM_DEBUG_RESUME, ("esm_suspend\n")); 1702 break; 1703 1704 case PWR_RESUME: 1705 ess->esm_suspend = why; 1706 esm_resume(ess); 1707 DPRINTF(ESM_DEBUG_RESUME, ("esm_resumed\n")); 1708 break; 1709 } 1710 } 1711 1712 int 1713 esm_suspend(struct esm_softc *ess) 1714 { 1715 int x; 1716 1717 x = splaudio(); 1718 wp_stoptimer(ess); 1719 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0); 1720 1721 esm_halt_output(ess); 1722 esm_halt_input(ess); 1723 splx(x); 1724 1725 /* Power down everything except clock. */ 1726 esm_write_codec(ess, AC97_REG_POWER, 0xdf00); 1727 delay(20); 1728 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0); 1729 delay(1); 1730 esm_power(ess, PCI_PMCSR_STATE_D3); 1731 1732 return 0; 1733 } 1734 1735 int 1736 esm_resume(struct esm_softc *ess) 1737 { 1738 int x; 1739 1740 esm_power(ess, PCI_PMCSR_STATE_D0); 1741 delay(100000); 1742 esm_init(ess); 1743 1744 (*ess->codec_if->vtbl->restore_ports)(ess->codec_if); 1745 #if 0 1746 if (mixer_reinit(dev)) { 1747 printf("%s: unable to reinitialize the mixer\n", 1748 ess->sc_dev.dv_xname); 1749 return ENXIO; 1750 } 1751 #endif 1752 1753 x = splaudio(); 1754 #if TODO 1755 if (ess->pactive) 1756 esm_start_output(ess); 1757 if (ess->ractive) 1758 esm_start_input(ess); 1759 #endif 1760 if (ess->pactive || ess->ractive) { 1761 set_timer(ess); 1762 wp_starttimer(ess); 1763 } 1764 splx(x); 1765 return 0; 1766 } 1767 1768 #if 0 1769 int 1770 esm_shutdown(struct esm_softc *ess) 1771 { 1772 int i; 1773 1774 wp_stoptimer(ess); 1775 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0); 1776 1777 esm_halt_output(ess); 1778 esm_halt_input(ess); 1779 1780 return 0; 1781 } 1782 #endif 1783
Indexes created Mon Sep 22 10:09:38 GMT 2025