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esm.c revision 1.61
      1 /*      $NetBSD: esm.c,v 1.61 2019/03/16 12:09:58 isaki Exp $      */
      2 
      3 /*-
      4  * Copyright (c) 2002, 2003 Matt Fredette
      5  * All rights reserved.
      6  *
      7  * Copyright (c) 2000, 2001 Rene Hexel <rh (at) NetBSD.org>
      8  * All rights reserved.
      9  *
     10  * Copyright (c) 2000 Taku YAMAMOTO <taku (at) cent.saitama-u.ac.jp>
     11  * All rights reserved.
     12  *
     13  * Redistribution and use in source and binary forms, with or without
     14  * modification, are permitted provided that the following conditions
     15  * are met:
     16  * 1. Redistributions of source code must retain the above copyright
     17  *    notice, this list of conditions and the following disclaimer.
     18  * 2. Redistributions in binary form must reproduce the above copyright
     19  *    notice, this list of conditions and the following disclaimer in the
     20  *    documentation and/or other materials provided with the distribution.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  * Taku Id: maestro.c,v 1.12 2000/09/06 03:32:34 taku Exp
     35  * FreeBSD: /c/ncvs/src/sys/dev/sound/pci/maestro.c,v 1.4 2000/12/18 01:36:35 cg Exp
     36  */
     37 
     38 /*
     39  * TODO:
     40  *	- hardware volume support
     41  *	- fix 16-bit stereo recording, add 8-bit recording
     42  *	- MIDI support
     43  *	- joystick support
     44  *
     45  *
     46  * Credits:
     47  *
     48  * This code is based on the FreeBSD driver written by Taku YAMAMOTO
     49  *
     50  *
     51  * Original credits from the FreeBSD driver:
     52  *
     53  * Part of this code (especially in many magic numbers) was heavily inspired
     54  * by the Linux driver originally written by
     55  * Alan Cox <alan.cox (at) linux.org>, modified heavily by
     56  * Zach Brown <zab (at) zabbo.net>.
     57  *
     58  * busdma()-ize and buffer size reduction were suggested by
     59  * Cameron Grant <gandalf (at) vilnya.demon.co.uk>.
     60  * Also he showed me the way to use busdma() suite.
     61  *
     62  * Internal speaker problems on NEC VersaPro's and Dell Inspiron 7500
     63  * were looked at by
     64  * Munehiro Matsuda <haro (at) tk.kubota.co.jp>,
     65  * who brought patches based on the Linux driver with some simplification.
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: esm.c,v 1.61 2019/03/16 12:09:58 isaki Exp $");
     70 
     71 #include <sys/param.h>
     72 #include <sys/systm.h>
     73 #include <sys/kernel.h>
     74 #include <sys/kmem.h>
     75 #include <sys/device.h>
     76 #include <sys/bus.h>
     77 #include <sys/audioio.h>
     78 
     79 #include <dev/audio_if.h>
     80 #include <dev/mulaw.h>
     81 #include <dev/auconv.h>
     82 
     83 #include <dev/ic/ac97var.h>
     84 #include <dev/ic/ac97reg.h>
     85 
     86 #include <dev/pci/pcidevs.h>
     87 #include <dev/pci/pcivar.h>
     88 #include <dev/pci/esmreg.h>
     89 #include <dev/pci/esmvar.h>
     90 
     91 #define	PCI_CBIO		0x10	/* Configuration Base I/O Address */
     92 
     93 /* Debug */
     94 #ifdef AUDIO_DEBUG
     95 #define DPRINTF(l,x)	do { if (esm_debug & (l)) printf x; } while(0)
     96 #define DUMPREG(x)	do { if (esm_debug & ESM_DEBUG_REG)	\
     97 				 esm_dump_regs(x); } while(0)
     98 int esm_debug = 0xfffc;
     99 #define ESM_DEBUG_CODECIO	0x0001
    100 #define ESM_DEBUG_IRQ		0x0002
    101 #define ESM_DEBUG_DMA		0x0004
    102 #define ESM_DEBUG_TIMER		0x0008
    103 #define ESM_DEBUG_REG		0x0010
    104 #define ESM_DEBUG_PARAM		0x0020
    105 #define ESM_DEBUG_APU		0x0040
    106 #define ESM_DEBUG_CODEC		0x0080
    107 #define ESM_DEBUG_PCI		0x0100
    108 #define ESM_DEBUG_RESUME	0x0200
    109 #else
    110 #define DPRINTF(x,y)	/* nothing */
    111 #define DUMPREG(x)	/* nothing */
    112 #endif
    113 
    114 #ifdef DIAGNOSTIC
    115 #define RANGE(n, l, h)	if ((n) < (l) || (n) >= (h))			\
    116 		printf (#n "=%d out of range (%d, %d) in "		\
    117 		__FILE__ ", line %d\n", (n), (l), (h), __LINE__)
    118 #else
    119 #define RANGE(x,y,z)	/* nothing */
    120 #endif
    121 
    122 #define inline inline
    123 
    124 static inline void	ringbus_setdest(struct esm_softc *, int, int);
    125 
    126 static inline uint16_t	wp_rdreg(struct esm_softc *, uint16_t);
    127 static inline void	wp_wrreg(struct esm_softc *, uint16_t, uint16_t);
    128 static inline uint16_t	wp_rdapu(struct esm_softc *, int, uint16_t);
    129 static inline void	wp_wrapu(struct esm_softc *, int, uint16_t,
    130 			    uint16_t);
    131 static inline void	wp_settimer(struct esm_softc *, u_int);
    132 static inline void	wp_starttimer(struct esm_softc *);
    133 static inline void	wp_stoptimer(struct esm_softc *);
    134 
    135 static inline void	wc_wrreg(struct esm_softc *, uint16_t, uint16_t);
    136 static inline void	wc_wrchctl(struct esm_softc *, int, uint16_t);
    137 
    138 static inline u_int	calc_timer_freq(struct esm_chinfo*);
    139 static void		set_timer(struct esm_softc *);
    140 
    141 static void		esmch_set_format(struct esm_chinfo *,
    142 			    const audio_params_t *);
    143 static void		esmch_combine_input(struct esm_softc *,
    144 			    struct esm_chinfo *);
    145 
    146 static bool		esm_suspend(device_t, const pmf_qual_t *);
    147 static bool		esm_resume(device_t, const pmf_qual_t *);
    148 static void		esm_childdet(device_t, device_t);
    149 static int		esm_match(device_t, cfdata_t, void *);
    150 static void		esm_attach(device_t, device_t, void *);
    151 static int		esm_detach(device_t, int);
    152 static int		esm_intr(void *);
    153 
    154 static void		esm_freemem(struct esm_softc *, struct esm_dma *);
    155 static int		esm_allocmem(struct esm_softc *, size_t, size_t,
    156 			             struct esm_dma *);
    157 
    158 
    159 CFATTACH_DECL2_NEW(esm, sizeof(struct esm_softc),
    160     esm_match, esm_attach, esm_detach, NULL, NULL, esm_childdet);
    161 
    162 const struct audio_hw_if esm_hw_if = {
    163 	.query_encoding		= esm_query_encoding,
    164 	.set_params		= esm_set_params,
    165 	.round_blocksize	= esm_round_blocksize,
    166 	.init_output		= esm_init_output,
    167 	.init_input		= esm_init_input,
    168 	.halt_output		= esm_halt_output,
    169 	.halt_input		= esm_halt_input,
    170 	.getdev			= esm_getdev,
    171 	.set_port		= esm_set_port,
    172 	.get_port		= esm_get_port,
    173 	.query_devinfo		= esm_query_devinfo,
    174 	.allocm			= esm_malloc,
    175 	.freem			= esm_free,
    176 	.round_buffersize	= esm_round_buffersize,
    177 	.mappage		= esm_mappage,
    178 	.get_props		= esm_get_props,
    179 	.trigger_output		= esm_trigger_output,
    180 	.trigger_input		= esm_trigger_input,
    181 	.get_locks		= esm_get_locks,
    182 };
    183 
    184 struct audio_device esm_device = {
    185 	"ESS Maestro",
    186 	"",
    187 	"esm"
    188 };
    189 
    190 #define MAESTRO_NENCODINGS 8
    191 static audio_encoding_t esm_encoding[MAESTRO_NENCODINGS] = {
    192 	{ 0, AudioEulinear, AUDIO_ENCODING_ULINEAR, 8, 0 },
    193 	{ 1, AudioEmulaw, AUDIO_ENCODING_ULAW, 8,
    194 		AUDIO_ENCODINGFLAG_EMULATED },
    195 	{ 2, AudioEalaw, AUDIO_ENCODING_ALAW, 8, AUDIO_ENCODINGFLAG_EMULATED },
    196 	{ 3, AudioEslinear, AUDIO_ENCODING_SLINEAR, 8, 0 },
    197 	{ 4, AudioEslinear_le, AUDIO_ENCODING_SLINEAR_LE, 16, 0 },
    198 	{ 5, AudioEulinear_le, AUDIO_ENCODING_ULINEAR_LE, 16,
    199 		AUDIO_ENCODINGFLAG_EMULATED },
    200 	{ 6, AudioEslinear_be, AUDIO_ENCODING_SLINEAR_BE, 16,
    201 		AUDIO_ENCODINGFLAG_EMULATED },
    202 	{ 7, AudioEulinear_be, AUDIO_ENCODING_ULINEAR_BE, 16,
    203 		AUDIO_ENCODINGFLAG_EMULATED },
    204 };
    205 
    206 #define ESM_NFORMATS	4
    207 static const struct audio_format esm_formats[ESM_NFORMATS] = {
    208 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    209 	 2, AUFMT_STEREO, 0, {4000, 48000}},
    210 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    211 	 1, AUFMT_MONAURAL, 0, {4000, 48000}},
    212 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    213 	 2, AUFMT_STEREO, 0, {4000, 48000}},
    214 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    215 	 1, AUFMT_MONAURAL, 0, {4000, 48000}},
    216 };
    217 
    218 static const struct esm_quirks esm_quirks[] = {
    219 	/* COMPAL 38W2 OEM Notebook, e.g. Dell INSPIRON 5000e */
    220 	{ PCI_VENDOR_COMPAL, PCI_PRODUCT_COMPAL_38W2, ESM_QUIRKF_SWAPPEDCH },
    221 
    222 	/* COMPAQ Armada M700 Notebook */
    223 	{ PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_M700, ESM_QUIRKF_SWAPPEDCH },
    224 
    225 	/* NEC Versa Pro LX VA26D */
    226 	{ PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VA26D, ESM_QUIRKF_GPIO },
    227 
    228 	/* NEC Versa LX */
    229 	{ PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VERSALX, ESM_QUIRKF_GPIO },
    230 
    231 	/* Toshiba Portege */
    232 	{ PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PORTEGE, ESM_QUIRKF_SWAPPEDCH }
    233 };
    234 
    235 enum esm_quirk_flags
    236 esm_get_quirks(pcireg_t subid)
    237 {
    238 	int i;
    239 
    240 	for (i = 0; i < __arraycount(esm_quirks); i++) {
    241 		if (PCI_VENDOR(subid) == esm_quirks[i].eq_vendor &&
    242 		    PCI_PRODUCT(subid) == esm_quirks[i].eq_product) {
    243 			return esm_quirks[i].eq_quirks;
    244 		}
    245 	}
    246 
    247 	return 0;
    248 }
    249 
    250 
    251 #ifdef AUDIO_DEBUG
    252 struct esm_reg_info {
    253 	int	offset;			/* register offset */
    254 	int	width;			/* 1/2/4 bytes */
    255 } dump_regs[] = {
    256 	{ PORT_WAVCACHE_CTRL,		2 },
    257 	{ PORT_HOSTINT_CTRL,		2 },
    258 	{ PORT_HOSTINT_STAT,		2 },
    259 	{ PORT_HWVOL_VOICE_SHADOW,	1 },
    260 	{ PORT_HWVOL_VOICE,		1 },
    261 	{ PORT_HWVOL_MASTER_SHADOW,	1 },
    262 	{ PORT_HWVOL_MASTER,		1 },
    263 	{ PORT_RINGBUS_CTRL,		4 },
    264 	{ PORT_GPIO_DATA,		2 },
    265 	{ PORT_GPIO_MASK,		2 },
    266 	{ PORT_GPIO_DIR,		2 },
    267 	{ PORT_ASSP_CTRL_A,		1 },
    268 	{ PORT_ASSP_CTRL_B,		1 },
    269 	{ PORT_ASSP_CTRL_C,		1 },
    270 	{ PORT_ASSP_INT_STAT,		1 }
    271 };
    272 
    273 static void
    274 esm_dump_regs(struct esm_softc *ess)
    275 {
    276 	int i;
    277 
    278 	printf("%s registers:", device_xname(ess->sc_dev));
    279 	for (i = 0; i < __arraycount(dump_regs); i++) {
    280 		if (i % 5 == 0)
    281 			printf("\n");
    282 		printf("0x%2.2x: ", dump_regs[i].offset);
    283 		switch(dump_regs[i].width) {
    284 		case 4:
    285 			printf("%8.8x, ", bus_space_read_4(ess->st, ess->sh,
    286 			    dump_regs[i].offset));
    287 			break;
    288 		case 2:
    289 			printf("%4.4x,     ", bus_space_read_2(ess->st, ess->sh,
    290 			    dump_regs[i].offset));
    291 			break;
    292 		default:
    293 			printf("%2.2x,       ",
    294 			    bus_space_read_1(ess->st, ess->sh,
    295 			    dump_regs[i].offset));
    296 		}
    297 	}
    298 	printf("\n");
    299 }
    300 #endif
    301 
    302 
    303 /* -----------------------------
    304  * Subsystems.
    305  */
    306 
    307 /* Codec/Ringbus */
    308 
    309 /* -------------------------------------------------------------------- */
    310 
    311 int
    312 esm_read_codec(void *sc, uint8_t regno, uint16_t *result)
    313 {
    314 	struct esm_softc *ess;
    315 	unsigned t;
    316 
    317 	ess = sc;
    318 	/* We have to wait for a SAFE time to write addr/data */
    319 	for (t = 0; t < 20; t++) {
    320 		if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    321 		    & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS)
    322 			break;
    323 		delay(2);	/* 20.8us / 13 */
    324 	}
    325 	if (t == 20)
    326 		printf("%s: esm_read_codec() PROGLESS timed out.\n",
    327 		    device_xname(ess->sc_dev));
    328 
    329 	bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD,
    330 	    CODEC_CMD_READ | regno);
    331 	delay(21);	/* AC97 cycle = 20.8usec */
    332 
    333 	/* Wait for data retrieve */
    334 	for (t = 0; t < 20; t++) {
    335 		if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    336 		    & CODEC_STAT_MASK) == CODEC_STAT_RW_DONE)
    337 			break;
    338 		delay(2);	/* 20.8us / 13 */
    339 	}
    340 	if (t == 20)
    341 		/* Timed out, but perform dummy read. */
    342 		printf("%s: esm_read_codec() RW_DONE timed out.\n",
    343 		    device_xname(ess->sc_dev));
    344 
    345 	*result = bus_space_read_2(ess->st, ess->sh, PORT_CODEC_REG);
    346 
    347 	return 0;
    348 }
    349 
    350 int
    351 esm_write_codec(void *sc, uint8_t regno, uint16_t data)
    352 {
    353 	struct esm_softc *ess;
    354 	unsigned t;
    355 
    356 	ess = sc;
    357 	/* We have to wait for a SAFE time to write addr/data */
    358 	for (t = 0; t < 20; t++) {
    359 		if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    360 		    & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS)
    361 			break;
    362 		delay(2);	/* 20.8us / 13 */
    363 	}
    364 	if (t == 20) {
    365 		/* Timed out. Abort writing. */
    366 		printf("%s: esm_write_codec() PROGLESS timed out.\n",
    367 		    device_xname(ess->sc_dev));
    368 		return -1;
    369 	}
    370 
    371 	bus_space_write_2(ess->st, ess->sh, PORT_CODEC_REG, data);
    372 	bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD,
    373 	    CODEC_CMD_WRITE | regno);
    374 
    375 	return 0;
    376 }
    377 
    378 /* -------------------------------------------------------------------- */
    379 
    380 static inline void
    381 ringbus_setdest(struct esm_softc *ess, int src, int dest)
    382 {
    383 	uint32_t data;
    384 
    385 	data = bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL);
    386 	data &= ~(0xfU << src);
    387 	data |= (0xfU & dest) << src;
    388 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, data);
    389 }
    390 
    391 /* Wave Processor */
    392 
    393 static inline uint16_t
    394 wp_rdreg(struct esm_softc *ess, uint16_t reg)
    395 {
    396 
    397 	bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg);
    398 	return bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA);
    399 }
    400 
    401 static inline void
    402 wp_wrreg(struct esm_softc *ess, uint16_t reg, uint16_t data)
    403 {
    404 
    405 	bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg);
    406 	bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data);
    407 }
    408 
    409 static inline void
    410 apu_setindex(struct esm_softc *ess, uint16_t reg)
    411 {
    412 	int t;
    413 
    414 	wp_wrreg(ess, WPREG_CRAM_PTR, reg);
    415 	/* Sometimes WP fails to set apu register index. */
    416 	for (t = 0; t < 1000; t++) {
    417 		if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == reg)
    418 			break;
    419 		bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, reg);
    420 	}
    421 	if (t == 1000)
    422 		printf("%s: apu_setindex() timed out.\n", device_xname(ess->sc_dev));
    423 }
    424 
    425 static inline uint16_t
    426 wp_rdapu(struct esm_softc *ess, int ch, uint16_t reg)
    427 {
    428 	uint16_t ret;
    429 
    430 	apu_setindex(ess, ((unsigned)ch << 4) + reg);
    431 	ret = wp_rdreg(ess, WPREG_DATA_PORT);
    432 	return ret;
    433 }
    434 
    435 static inline void
    436 wp_wrapu(struct esm_softc *ess, int ch, uint16_t reg, uint16_t data)
    437 {
    438 	int t;
    439 
    440 	DPRINTF(ESM_DEBUG_APU,
    441 	    ("wp_wrapu(%p, ch=%d, reg=0x%x, data=0x%04x)\n",
    442 	    ess, ch, reg, data));
    443 
    444 	apu_setindex(ess, ((unsigned)ch << 4) + reg);
    445 	wp_wrreg(ess, WPREG_DATA_PORT, data);
    446 	for (t = 0; t < 1000; t++) {
    447 		if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == data)
    448 			break;
    449 		bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data);
    450 	}
    451 	if (t == 1000)
    452 		printf("%s: wp_wrapu() timed out.\n", device_xname(ess->sc_dev));
    453 }
    454 
    455 static inline void
    456 wp_settimer(struct esm_softc *ess, u_int freq)
    457 {
    458 	u_int clock;
    459 	u_int prescale, divide;
    460 
    461 	clock = 48000 << 2;
    462 	prescale = 0;
    463 	divide = (freq != 0) ? (clock / freq) : ~0;
    464 	RANGE(divide, WPTIMER_MINDIV, WPTIMER_MAXDIV);
    465 
    466 	for (; divide > 32 << 1; divide >>= 1)
    467 		prescale++;
    468 	divide = (divide + 1) >> 1;
    469 
    470 	for (; prescale < 7 && divide > 2 && !(divide & 1); divide >>= 1)
    471 		prescale++;
    472 
    473 	DPRINTF(ESM_DEBUG_TIMER,
    474 	    ("wp_settimer(%p, %u): clock = %u, prescale = %u, divide = %u\n",
    475 	    ess, freq, clock, prescale, divide));
    476 
    477 	wp_wrreg(ess, WPREG_TIMER_ENABLE, 0);
    478 	wp_wrreg(ess, WPREG_TIMER_FREQ,
    479 	    (prescale << WP_TIMER_FREQ_PRESCALE_SHIFT) | (divide - 1));
    480 	wp_wrreg(ess, WPREG_TIMER_ENABLE, 1);
    481 }
    482 
    483 static inline void
    484 wp_starttimer(struct esm_softc *ess)
    485 {
    486 
    487 	wp_wrreg(ess, WPREG_TIMER_START, 1);
    488 }
    489 
    490 static inline void
    491 wp_stoptimer(struct esm_softc *ess)
    492 {
    493 
    494 	wp_wrreg(ess, WPREG_TIMER_START, 0);
    495 	bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1);
    496 }
    497 
    498 /* WaveCache */
    499 
    500 static inline void
    501 wc_wrreg(struct esm_softc *ess, uint16_t reg, uint16_t data)
    502 {
    503 
    504 	bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_INDEX, reg);
    505 	bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_DATA, data);
    506 }
    507 
    508 static inline void
    509 wc_wrchctl(struct esm_softc *ess, int ch, uint16_t data)
    510 {
    511 
    512 	wc_wrreg(ess, ch << 3, data);
    513 }
    514 
    515 /* -----------------------------
    516  * Controller.
    517  */
    518 
    519 int
    520 esm_attach_codec(void *sc, struct ac97_codec_if *codec_if)
    521 {
    522 	struct esm_softc *ess;
    523 
    524 	ess = sc;
    525 	ess->codec_if = codec_if;
    526 
    527 	return 0;
    528 }
    529 
    530 int
    531 esm_reset_codec(void *sc)
    532 {
    533 
    534 	return 0;
    535 }
    536 
    537 
    538 enum ac97_host_flags
    539 esm_flags_codec(void *sc)
    540 {
    541 	struct esm_softc *ess;
    542 
    543 	ess = sc;
    544 	return ess->codec_flags;
    545 }
    546 
    547 
    548 void
    549 esm_initcodec(struct esm_softc *ess)
    550 {
    551 	uint16_t data;
    552 
    553 	DPRINTF(ESM_DEBUG_CODEC, ("esm_initcodec(%p)\n", ess));
    554 
    555 	if (bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL)
    556 	    & RINGBUS_CTRL_ACLINK_ENABLED) {
    557 		bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
    558 		delay(104);	/* 20.8us * (4 + 1) */
    559 	}
    560 	/* XXX - 2nd codec should be looked at. */
    561 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    562 	    RINGBUS_CTRL_AC97_SWRESET);
    563 	delay(2);
    564 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    565 	    RINGBUS_CTRL_ACLINK_ENABLED);
    566 	delay(21);
    567 
    568 	esm_read_codec(ess, 0, &data);
    569 	if (bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
    570 	    & CODEC_STAT_MASK) {
    571 		bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
    572 		delay(21);
    573 
    574 		/* Try cold reset. */
    575 		printf("%s: will perform cold reset.\n", device_xname(ess->sc_dev));
    576 		data = bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR);
    577 		if (pci_conf_read(ess->pc, ess->tag, 0x58) & 1)
    578 			data |= 0x10;
    579 		data |= 0x009 &
    580 		    ~bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DATA);
    581 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, 0xff6);
    582 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR,
    583 		    data | 0x009);
    584 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x000);
    585 		delay(2);
    586 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x001);
    587 		delay(1);
    588 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x009);
    589 		delay(500000);
    590 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, data);
    591 		delay(84);	/* 20.8us * 4 */
    592 		bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    593 		    RINGBUS_CTRL_ACLINK_ENABLED);
    594 		delay(21);
    595 	}
    596 }
    597 
    598 void
    599 esm_init(struct esm_softc *ess)
    600 {
    601 
    602 	/* Reset direct sound. */
    603 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL,
    604 	    HOSTINT_CTRL_DSOUND_RESET);
    605 	delay(10000);
    606 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0);
    607 	delay(10000);
    608 
    609 	/* Enable direct sound interruption. */
    610 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL,
    611 	    HOSTINT_CTRL_DSOUND_INT_ENABLED);
    612 
    613 	/* Setup Wave Processor. */
    614 
    615 	/* Enable WaveCache */
    616 	wp_wrreg(ess, WPREG_WAVE_ROMRAM,
    617 	    WP_WAVE_VIRTUAL_ENABLED | WP_WAVE_DRAM_ENABLED);
    618 	bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_CTRL,
    619 	    WAVCACHE_ENABLED | WAVCACHE_WTSIZE_4MB);
    620 
    621 	/* Setup Codec/Ringbus. */
    622 	esm_initcodec(ess);
    623 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
    624 	    RINGBUS_CTRL_RINGBUS_ENABLED | RINGBUS_CTRL_ACLINK_ENABLED);
    625 
    626 	/* Undocumented registers from the Linux driver. */
    627 	wp_wrreg(ess, 0x8, 0xB004);
    628 	wp_wrreg(ess, 0x9, 0x001B);
    629 	wp_wrreg(ess, 0xA, 0x8000);
    630 	wp_wrreg(ess, 0xB, 0x3F37);
    631 	wp_wrreg(ess, 0xD, 0x7632);
    632 
    633 	wp_wrreg(ess, WPREG_BASE, 0x8598);	/* Parallel I/O */
    634 	ringbus_setdest(ess, RINGBUS_SRC_ADC,
    635 	    RINGBUS_DEST_STEREO | RINGBUS_DEST_DSOUND_IN);
    636 	ringbus_setdest(ess, RINGBUS_SRC_DSOUND,
    637 	    RINGBUS_DEST_STEREO | RINGBUS_DEST_DAC);
    638 
    639 	/* Setup ASSP. Needed for Dell Inspiron 7500? */
    640 	bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_B, 0x00);
    641 	bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_A, 0x03);
    642 	bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_C, 0x00);
    643 
    644 	/*
    645 	 * Setup GPIO.
    646 	 * There seems to be speciality with NEC systems.
    647 	 */
    648 	if (esm_get_quirks(ess->subid) & ESM_QUIRKF_GPIO) {
    649 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK,
    650 		    0x9ff);
    651 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR,
    652 		    bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR) |
    653 			0x600);
    654 		bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA,
    655 		    0x200);
    656 	}
    657 
    658 	DUMPREG(ess);
    659 }
    660 
    661 /* Channel controller. */
    662 
    663 int
    664 esm_init_output (void *sc, void *start, int size)
    665 {
    666 	struct esm_softc *ess;
    667 	struct esm_dma *p;
    668 
    669 	ess = sc;
    670 	p = &ess->sc_dma;
    671 	if ((char *)start != (char *)p->addr + MAESTRO_PLAYBUF_OFF) {
    672 		printf("%s: esm_init_output: bad addr %p\n",
    673 		    device_xname(ess->sc_dev), start);
    674 		return EINVAL;
    675 	}
    676 
    677 	ess->pch.base = DMAADDR(p) + MAESTRO_PLAYBUF_OFF;
    678 
    679 	DPRINTF(ESM_DEBUG_DMA, ("%s: pch.base = 0x%x\n",
    680 		device_xname(ess->sc_dev), ess->pch.base));
    681 
    682 	return 0;
    683 }
    684 
    685 int
    686 esm_init_input (void *sc, void *start, int size)
    687 {
    688 	struct esm_softc *ess;
    689 	struct esm_dma *p;
    690 
    691 	ess = sc;
    692 	p = &ess->sc_dma;
    693 	if ((char *)start != (char *)p->addr + MAESTRO_RECBUF_OFF) {
    694 		printf("%s: esm_init_input: bad addr %p\n",
    695 		    device_xname(ess->sc_dev), start);
    696 		return EINVAL;
    697 	}
    698 
    699 	switch (ess->rch.aputype) {
    700 	case APUTYPE_16BITSTEREO:
    701 		ess->rch.base = DMAADDR(p) + MAESTRO_RECBUF_L_OFF;
    702 		break;
    703 	default:
    704 		ess->rch.base = DMAADDR(p) + MAESTRO_RECBUF_OFF;
    705 		break;
    706 	}
    707 
    708 	DPRINTF(ESM_DEBUG_DMA, ("%s: rch.base = 0x%x\n",
    709 		device_xname(ess->sc_dev), ess->rch.base));
    710 
    711 	return 0;
    712 }
    713 
    714 int
    715 esm_trigger_output(void *sc, void *start, void *end, int blksize,
    716     void (*intr)(void *), void *arg, const audio_params_t *param)
    717 {
    718 	size_t size;
    719 	struct esm_softc *ess;
    720 	struct esm_chinfo *ch;
    721 	struct esm_dma *p;
    722 	int pan, choffset;
    723 	int i, nch;
    724 	unsigned speed, offset, wpwa, dv;
    725 	uint16_t apuch;
    726 
    727 	DPRINTF(ESM_DEBUG_DMA,
    728 	    ("esm_trigger_output(%p, %p, %p, 0x%x, %p, %p, %p)\n",
    729 	    sc, start, end, blksize, intr, arg, param));
    730 	ess = sc;
    731 	ch = &ess->pch;
    732 	pan = 0;
    733 	nch = 1;
    734 	speed = ch->sample_rate;
    735 	apuch = ch->num << 1;
    736 
    737 #ifdef DIAGNOSTIC
    738 	if (ess->pactive) {
    739 		printf("%s: esm_trigger_output: already running",
    740 		    device_xname(ess->sc_dev));
    741 		return EINVAL;
    742 	}
    743 #endif
    744 
    745 	ess->sc_pintr = intr;
    746 	ess->sc_parg = arg;
    747 	p = &ess->sc_dma;
    748 	if ((char *)start != (char *)p->addr + MAESTRO_PLAYBUF_OFF) {
    749 		printf("%s: esm_trigger_output: bad addr %p\n",
    750 		    device_xname(ess->sc_dev), start);
    751 		return EINVAL;
    752 	}
    753 
    754 	ess->pch.blocksize = blksize;
    755 	ess->pch.apublk = blksize >> 1;
    756 	ess->pactive = 1;
    757 
    758 	size = (size_t)(((char *)end - (char *)start) >> 1);
    759 	choffset = MAESTRO_PLAYBUF_OFF;
    760 	offset = choffset >> 1;
    761 	wpwa = APU_USE_SYSMEM | ((offset >> 8) & APU_64KPAGE_MASK);
    762 
    763 	DPRINTF(ESM_DEBUG_DMA,
    764 	    ("choffs=0x%x, wpwa=0x%x, size=0x%lx words\n",
    765 	    choffset, wpwa, (unsigned long int)size));
    766 
    767 	switch (ch->aputype) {
    768 	case APUTYPE_16BITSTEREO:
    769 		ess->pch.apublk >>= 1;
    770 		wpwa >>= 1;
    771 		size >>= 1;
    772 		offset >>= 1;
    773 		/* FALLTHROUGH */
    774 	case APUTYPE_8BITSTEREO:
    775 		if (ess->codec_flags & AC97_HOST_SWAPPED_CHANNELS)
    776 			pan = 8;
    777 		else
    778 			pan = -8;
    779 		nch++;
    780 		break;
    781 	case APUTYPE_8BITLINEAR:
    782 		ess->pch.apublk <<= 1;
    783 		speed >>= 1;
    784 		break;
    785 	}
    786 
    787 	ess->pch.apubase = offset;
    788 	ess->pch.apubuf = size;
    789 	ess->pch.nextirq = ess->pch.apublk;
    790 
    791 	set_timer(ess);
    792 	wp_starttimer(ess);
    793 
    794 	dv = (((speed % 48000) << 16) + 24000) / 48000
    795 	    + ((speed / 48000) << 16);
    796 
    797 	for (i = nch-1; i >= 0; i--) {
    798 		wp_wrapu(ess, apuch + i, APUREG_WAVESPACE, wpwa & 0xff00);
    799 		wp_wrapu(ess, apuch + i, APUREG_CURPTR, offset);
    800 		wp_wrapu(ess, apuch + i, APUREG_ENDPTR, offset + size);
    801 		wp_wrapu(ess, apuch + i, APUREG_LOOPLEN, size - 1);
    802 		wp_wrapu(ess, apuch + i, APUREG_AMPLITUDE, 0xe800);
    803 		wp_wrapu(ess, apuch + i, APUREG_POSITION, 0x8f00
    804 		    | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT)
    805 		    | ((PAN_FRONT + pan) << APU_PAN_SHIFT));
    806 		wp_wrapu(ess, apuch + i, APUREG_FREQ_LOBYTE, APU_plus6dB
    807 		    | ((dv & 0xff) << APU_FREQ_LOBYTE_SHIFT));
    808 		wp_wrapu(ess, apuch + i, APUREG_FREQ_HIWORD, dv >> 8);
    809 
    810 		if (ch->aputype == APUTYPE_16BITSTEREO)
    811 			wpwa |= APU_STEREO >> 1;
    812 		pan = -pan;
    813 	}
    814 
    815 	wc_wrchctl(ess, apuch, ch->wcreg_tpl);
    816 	if (nch > 1)
    817 		wc_wrchctl(ess, apuch + 1, ch->wcreg_tpl);
    818 
    819 	wp_wrapu(ess, apuch, APUREG_APUTYPE,
    820 	    (ch->aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf);
    821 	if (ch->wcreg_tpl & WAVCACHE_CHCTL_STEREO)
    822 		wp_wrapu(ess, apuch + 1, APUREG_APUTYPE,
    823 		    (ch->aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf);
    824 
    825 	return 0;
    826 }
    827 
    828 int
    829 esm_trigger_input(void *sc, void *start, void *end, int blksize,
    830     void (*intr)(void *), void *arg, const audio_params_t *param)
    831 {
    832 	size_t size;
    833 	size_t mixsize;
    834 	struct esm_softc *ess;
    835 	struct esm_chinfo *ch;
    836 	struct esm_dma *p;
    837 	uint32_t chctl, choffset;
    838 	uint32_t speed, offset, wpwa, dv;
    839 	uint32_t mixoffset, mixdv;
    840 	int i, nch;
    841 	uint16_t apuch;
    842 	uint16_t reg;
    843 
    844 	DPRINTF(ESM_DEBUG_DMA,
    845 	    ("esm_trigger_input(%p, %p, %p, 0x%x, %p, %p, %p)\n",
    846 	    sc, start, end, blksize, intr, arg, param));
    847 	ess = sc;
    848 	ch = &ess->rch;
    849 	nch = 1;
    850 	speed = ch->sample_rate;
    851 	apuch = ch->num << 1;
    852 
    853 #ifdef DIAGNOSTIC
    854 	if (ess->ractive) {
    855 		printf("%s: esm_trigger_input: already running",
    856 		    device_xname(ess->sc_dev));
    857 		return EINVAL;
    858 	}
    859 #endif
    860 
    861 	ess->sc_rintr = intr;
    862 	ess->sc_rarg = arg;
    863 	p = &ess->sc_dma;
    864 	if ((char *)start != (char *)p->addr + MAESTRO_RECBUF_OFF) {
    865 		printf("%s: esm_trigger_input: bad addr %p\n",
    866 		    device_xname(ess->sc_dev), start);
    867 		return EINVAL;
    868 	}
    869 
    870 	ess->rch.buffer = (void *)start;
    871 	ess->rch.offset = 0;
    872 	ess->rch.blocksize = blksize;
    873 	ess->rch.bufsize = ((char *)end - (char *)start);
    874 	ess->rch.apublk = blksize >> 1;
    875 	ess->ractive = 1;
    876 
    877 	size = (size_t)(((char *)end - (char *)start) >> 1);
    878 	choffset = MAESTRO_RECBUF_OFF;
    879 	switch (ch->aputype) {
    880 	case APUTYPE_16BITSTEREO:
    881 		size >>= 1;
    882 		choffset = MAESTRO_RECBUF_L_OFF;
    883 		ess->rch.apublk >>= 1;
    884 		nch++;
    885 		break;
    886 	case APUTYPE_16BITLINEAR:
    887 		break;
    888 	default:
    889 		ess->ractive = 0;
    890 		return EINVAL;
    891 	}
    892 
    893 	mixsize = (MAESTRO_MIXBUF_SZ >> 1) >> 1;
    894 	mixoffset = MAESTRO_MIXBUF_OFF;
    895 
    896 	ess->rch.apubase = (choffset >> 1);
    897 	ess->rch.apubuf = size;
    898 	ess->rch.nextirq = ess->rch.apublk;
    899 
    900 	set_timer(ess);
    901 	wp_starttimer(ess);
    902 
    903 	if (speed > 47999) speed = 47999;
    904 	if (speed < 4000) speed = 4000;
    905 	dv = (((speed % 48000) << 16) + 24000) / 48000
    906 	    + ((speed / 48000) << 16);
    907 	mixdv = 65536;	/* 48 kHz */
    908 
    909 	for (i = 0; i < nch; i++) {
    910 
    911 		/* Clear all rate conversion WP channel registers first. */
    912 		for (reg = 0; reg < 15; reg++)
    913 			wp_wrapu(ess, apuch + i, reg, 0);
    914 
    915 		/* Program the WaveCache for the rate conversion WP channel. */
    916 		chctl = (DMAADDR(p) + choffset - 0x10) &
    917 		    WAVCACHE_CHCTL_ADDRTAG_MASK;
    918 		wc_wrchctl(ess, apuch + i, chctl);
    919 
    920 		/* Program the rate conversion WP channel. */
    921 		wp_wrapu(ess, apuch + i, APUREG_FREQ_LOBYTE, APU_plus6dB
    922 		    | ((dv & 0xff) << APU_FREQ_LOBYTE_SHIFT) | 0x08);
    923 		wp_wrapu(ess, apuch + i, APUREG_FREQ_HIWORD, dv >> 8);
    924 		offset = choffset >> 1;
    925 		wpwa = APU_USE_SYSMEM | ((offset >> 8) & APU_64KPAGE_MASK);
    926 		wp_wrapu(ess, apuch + i, APUREG_WAVESPACE, wpwa);
    927 		wp_wrapu(ess, apuch + i, APUREG_CURPTR, offset);
    928 		wp_wrapu(ess, apuch + i, APUREG_ENDPTR, offset + size);
    929 		wp_wrapu(ess, apuch + i, APUREG_LOOPLEN, size - 1);
    930 		wp_wrapu(ess, apuch + i, APUREG_EFFECTS_ENV, 0x00f0);
    931 		wp_wrapu(ess, apuch + i, APUREG_AMPLITUDE, 0xe800);
    932 		wp_wrapu(ess, apuch + i, APUREG_POSITION, 0x8f00
    933 		    | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT)
    934 		    | (PAN_FRONT << APU_PAN_SHIFT));
    935 		wp_wrapu(ess, apuch + i, APUREG_ROUTE, apuch + 2 + i);
    936 
    937 		DPRINTF(ESM_DEBUG_DMA,
    938 		    ("choffs=0x%x, wpwa=0x%x, offset=0x%x words, size=0x%lx words\n",
    939 		    choffset, wpwa, offset, (unsigned long int)size));
    940 
    941 		/* Clear all mixer WP channel registers first. */
    942 		for (reg = 0; reg < 15; reg++)
    943 			wp_wrapu(ess, apuch + 2 + i, reg, 0);
    944 
    945 		/* Program the WaveCache for the mixer WP channel. */
    946 		chctl = (ess->rch.base + mixoffset - 0x10) &
    947 		    WAVCACHE_CHCTL_ADDRTAG_MASK;
    948 		wc_wrchctl(ess, apuch + 2 + i, chctl);
    949 
    950 		/* Program the mixer WP channel. */
    951 		wp_wrapu(ess, apuch + 2 + i, APUREG_FREQ_LOBYTE, APU_plus6dB
    952 		    | ((mixdv & 0xff) << APU_FREQ_LOBYTE_SHIFT) | 0x08);
    953 		wp_wrapu(ess, apuch + 2 + i, APUREG_FREQ_HIWORD, mixdv >> 8);
    954 		offset = mixoffset >> 1;
    955 		wpwa = APU_USE_SYSMEM | ((offset >> 8) & APU_64KPAGE_MASK);
    956 		wp_wrapu(ess, apuch + 2 + i, APUREG_WAVESPACE, wpwa);
    957 		wp_wrapu(ess, apuch + 2 + i, APUREG_CURPTR, offset);
    958 		wp_wrapu(ess, apuch + 2 + i, APUREG_ENDPTR,
    959 		    offset + mixsize);
    960 		wp_wrapu(ess, apuch + 2 + i, APUREG_LOOPLEN, mixsize);
    961 		wp_wrapu(ess, apuch + 2 + i, APUREG_EFFECTS_ENV, 0x00f0);
    962 		wp_wrapu(ess, apuch + 2 + i, APUREG_AMPLITUDE, 0xe800);
    963 		wp_wrapu(ess, apuch + 2 + i, APUREG_POSITION, 0x8f00
    964 		    | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT)
    965 		    | (PAN_FRONT << APU_PAN_SHIFT));
    966 		wp_wrapu(ess, apuch + 2 + i, APUREG_ROUTE,
    967 		    ROUTE_PARALLEL + i);
    968 
    969 		DPRINTF(ESM_DEBUG_DMA,
    970 		    ("mixoffs=0x%x, wpwa=0x%x, offset=0x%x words, size=0x%lx words\n",
    971 		    mixoffset, wpwa, offset, (unsigned long int)mixsize));
    972 
    973 		/* Assume we're going to loop to do the right channel. */
    974 		choffset += MAESTRO_RECBUF_L_SZ;
    975 		mixoffset += MAESTRO_MIXBUF_SZ >> 1;
    976 	}
    977 
    978 	wp_wrapu(ess, apuch, APUREG_APUTYPE,
    979 	    (APUTYPE_RATECONV << APU_APUTYPE_SHIFT) |
    980 	    APU_DMA_ENABLED | 0xf);
    981 	if (nch > 1)
    982 		wp_wrapu(ess, apuch + 1, APUREG_APUTYPE,
    983 		    (APUTYPE_RATECONV << APU_APUTYPE_SHIFT) |
    984 		    APU_DMA_ENABLED | 0xf);
    985 	wp_wrapu(ess, apuch + 2, APUREG_APUTYPE,
    986 	    (APUTYPE_INPUTMIXER << APU_APUTYPE_SHIFT) |
    987 	    APU_DMA_ENABLED | 0xf);
    988 	if (nch > 1)
    989 		wp_wrapu(ess, apuch + 3, APUREG_APUTYPE,
    990 		    (APUTYPE_RATECONV << APU_APUTYPE_SHIFT) |
    991 		    APU_DMA_ENABLED | 0xf);
    992 
    993 	return 0;
    994 }
    995 
    996 int
    997 esm_halt_output(void *sc)
    998 {
    999 	struct esm_softc *ess;
   1000 	struct esm_chinfo *ch;
   1001 
   1002 	DPRINTF(ESM_DEBUG_PARAM, ("esm_halt_output(%p)\n", sc));
   1003 	ess = sc;
   1004 	ch = &ess->pch;
   1005 
   1006 	wp_wrapu(ess, (ch->num << 1), APUREG_APUTYPE,
   1007 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
   1008 	wp_wrapu(ess, (ch->num << 1) + 1, APUREG_APUTYPE,
   1009 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
   1010 
   1011 	ess->pactive = 0;
   1012 	if (!ess->ractive)
   1013 		wp_stoptimer(ess);
   1014 
   1015 	return 0;
   1016 }
   1017 
   1018 int
   1019 esm_halt_input(void *sc)
   1020 {
   1021 	struct esm_softc *ess;
   1022 	struct esm_chinfo *ch;
   1023 
   1024 	DPRINTF(ESM_DEBUG_PARAM, ("esm_halt_input(%p)\n", sc));
   1025 	ess = sc;
   1026 	ch = &ess->rch;
   1027 
   1028 	wp_wrapu(ess, (ch->num << 1), APUREG_APUTYPE,
   1029 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
   1030 	wp_wrapu(ess, (ch->num << 1) + 1, APUREG_APUTYPE,
   1031 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
   1032 	wp_wrapu(ess, (ch->num << 1) + 2, APUREG_APUTYPE,
   1033 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
   1034 	wp_wrapu(ess, (ch->num << 1) + 3, APUREG_APUTYPE,
   1035 	    APUTYPE_INACTIVE << APU_APUTYPE_SHIFT);
   1036 
   1037 	ess->ractive = 0;
   1038 	if (!ess->pactive)
   1039 		wp_stoptimer(ess);
   1040 
   1041 	return 0;
   1042 }
   1043 
   1044 static inline u_int
   1045 calc_timer_freq(struct esm_chinfo *ch)
   1046 {
   1047 	u_int freq;
   1048 
   1049 	freq = (ch->sample_rate + ch->apublk - 1) / ch->apublk;
   1050 
   1051 	DPRINTF(ESM_DEBUG_TIMER,
   1052 	    ("calc_timer_freq(%p): rate = %u, blk = 0x%x (0x%x): freq = %u\n",
   1053 	    ch, ch->sample_rate, ch->apublk, ch->blocksize, freq));
   1054 
   1055 	return freq;
   1056 }
   1057 
   1058 static void
   1059 set_timer(struct esm_softc *ess)
   1060 {
   1061 	unsigned freq, freq2;
   1062 
   1063 	freq = 0;
   1064 	if (ess->pactive)
   1065 		freq = calc_timer_freq(&ess->pch);
   1066 
   1067 	if (ess->ractive) {
   1068 		freq2 = calc_timer_freq(&ess->rch);
   1069 		if (freq2 > freq)
   1070 			freq = freq2;
   1071 	}
   1072 
   1073 	KASSERT(freq != 0);
   1074 
   1075 	for (; freq < MAESTRO_MINFREQ; freq <<= 1)
   1076 		continue;
   1077 
   1078 	if (freq > 0)
   1079 		wp_settimer(ess, freq);
   1080 }
   1081 
   1082 static void
   1083 esmch_set_format(struct esm_chinfo *ch, const audio_params_t *p)
   1084 {
   1085 	uint16_t wcreg_tpl;
   1086 	uint16_t aputype;
   1087 
   1088 	wcreg_tpl = (ch->base - 16) & WAVCACHE_CHCTL_ADDRTAG_MASK;
   1089 	aputype = APUTYPE_16BITLINEAR;
   1090 	if (p->channels == 2) {
   1091 		wcreg_tpl |= WAVCACHE_CHCTL_STEREO;
   1092 		aputype++;
   1093 	}
   1094 	if (p->precision == 8) {
   1095 		aputype += 2;
   1096 		switch (p->encoding) {
   1097 		case AUDIO_ENCODING_ULINEAR:
   1098 		case AUDIO_ENCODING_ULINEAR_BE:
   1099 		case AUDIO_ENCODING_ULINEAR_LE:
   1100 			wcreg_tpl |= WAVCACHE_CHCTL_U8;
   1101 			break;
   1102 		}
   1103 	}
   1104 	ch->wcreg_tpl = wcreg_tpl;
   1105 	ch->aputype = aputype;
   1106 	ch->sample_rate = p->sample_rate;
   1107 
   1108 	DPRINTF(ESM_DEBUG_PARAM, ("esmch_set_format: "
   1109 	    "numch=%u, prec=%u, tpl=0x%x, aputype=%d, rate=%u\n",
   1110 	    p->channels, p->precision, wcreg_tpl, aputype, p->sample_rate));
   1111 }
   1112 
   1113 /*
   1114  * Since we can't record in true stereo, this function combines
   1115  * the separately recorded left and right channels into the final
   1116  * buffer for the upper layer.
   1117  */
   1118 static void
   1119 esmch_combine_input(struct esm_softc *ess, struct esm_chinfo *ch)
   1120 {
   1121 	size_t offset, resid, count;
   1122 	uint32_t *dst32s;
   1123 	const uint32_t *left32s, *right32s;
   1124 	uint32_t left32, right32;
   1125 
   1126 	/* The current offset into the upper layer buffer. */
   1127 	offset = ch->offset;
   1128 
   1129 	/* The number of bytes left to combine. */
   1130 	resid = ch->blocksize;
   1131 
   1132 	while (resid > 0) {
   1133 
   1134 		/* The 32-bit words for the left channel. */
   1135 		left32s = (const uint32_t *)((char *)ess->sc_dma.addr +
   1136 		    MAESTRO_RECBUF_L_OFF + offset / 2);
   1137 
   1138 		/* The 32-bit words for the right channel. */
   1139 		right32s = (const uint32_t *)((char *)ess->sc_dma.addr +
   1140 		    MAESTRO_RECBUF_R_OFF + offset / 2);
   1141 
   1142 		/* The pointer to the 32-bit words we will write. */
   1143 		dst32s = (uint32_t *)((char *)ch->buffer + offset);
   1144 
   1145 		/* Get the number of bytes we will combine now. */
   1146 		count = ch->bufsize - offset;
   1147 		if (count > resid)
   1148 			count = resid;
   1149 		resid -= count;
   1150 		offset += count;
   1151 		if (offset == ch->bufsize)
   1152 			offset = 0;
   1153 
   1154 		/* Combine, writing two 32-bit words at a time. */
   1155 		KASSERT((count & (sizeof(uint32_t) * 2 - 1)) == 0);
   1156 		count /= (sizeof(uint32_t) * 2);
   1157 		while (count > 0) {
   1158 			left32 = *(left32s++);
   1159 			right32 = *(right32s++);
   1160 			/* XXX this endian handling is half-baked at best */
   1161 #if BYTE_ORDER == LITTLE_ENDIAN
   1162 			*(dst32s++) = (left32 & 0xFFFF) | (right32 << 16);
   1163 			*(dst32s++) = (left32 >> 16) | (right32 & 0xFFFF0000);
   1164 #else  /* BYTE_ORDER == BIG_ENDIAN */
   1165 			*(dst32s++) = (left32 & 0xFFFF0000) | (right32 >> 16);
   1166 			*(dst32s++) = (left32 << 16) | (right32 & 0xFFFF);
   1167 #endif /* BYTE_ORDER == BIG_ENDIAN */
   1168 			count--;
   1169 		}
   1170 	}
   1171 
   1172 	/* Update the offset. */
   1173 	ch->offset = offset;
   1174 }
   1175 
   1176 /*
   1177  * Audio interface glue functions
   1178  */
   1179 
   1180 int
   1181 esm_getdev (void *sc, struct audio_device *adp)
   1182 {
   1183 
   1184 	*adp = esm_device;
   1185 	return 0;
   1186 }
   1187 
   1188 int
   1189 esm_round_blocksize(void *sc, int blk, int mode,
   1190     const audio_params_t *param)
   1191 {
   1192 
   1193 	DPRINTF(ESM_DEBUG_PARAM,
   1194 	    ("esm_round_blocksize(%p, 0x%x)", sc, blk));
   1195 
   1196 	blk &= ~0x3f;		/* keep good alignment */
   1197 
   1198 	DPRINTF(ESM_DEBUG_PARAM, (" = 0x%x\n", blk));
   1199 
   1200 	return blk;
   1201 }
   1202 
   1203 int
   1204 esm_query_encoding(void *sc, struct audio_encoding *fp)
   1205 {
   1206 
   1207 	DPRINTF(ESM_DEBUG_PARAM,
   1208 	    ("esm_query_encoding(%p, %d)\n", sc, fp->index));
   1209 
   1210 	if (fp->index < 0 || fp->index >= MAESTRO_NENCODINGS)
   1211 		return EINVAL;
   1212 
   1213 	*fp = esm_encoding[fp->index];
   1214 	return 0;
   1215 }
   1216 
   1217 int
   1218 esm_set_params(void *sc, int setmode, int usemode,
   1219 	audio_params_t *play, audio_params_t *rec,
   1220 	stream_filter_list_t *pfil, stream_filter_list_t *rfil)
   1221 {
   1222 	struct esm_softc *ess;
   1223 	audio_params_t *p;
   1224 	const audio_params_t *hw_play, *hw_rec;
   1225 	stream_filter_list_t *fil;
   1226 	int mode, i;
   1227 
   1228 	DPRINTF(ESM_DEBUG_PARAM,
   1229 	    ("esm_set_params(%p, 0x%x, 0x%x, %p, %p)\n",
   1230 	    sc, setmode, usemode, play, rec));
   1231 	ess = sc;
   1232 	hw_play = NULL;
   1233 	hw_rec = NULL;
   1234 	for (mode = AUMODE_RECORD; mode != -1;
   1235 	     mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
   1236 		if ((setmode & mode) == 0)
   1237 			continue;
   1238 
   1239 		p = mode == AUMODE_PLAY ? play : rec;
   1240 
   1241 		if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
   1242 		    (p->precision != 8 && p->precision != 16) ||
   1243 		    (p->channels != 1 && p->channels != 2))
   1244 			return EINVAL;
   1245 
   1246 		fil = mode == AUMODE_PLAY ? pfil : rfil;
   1247 		i = auconv_set_converter(esm_formats, ESM_NFORMATS,
   1248 					 mode, p, FALSE, fil);
   1249 		if (i < 0)
   1250 			return EINVAL;
   1251 		if (fil->req_size > 0)
   1252 			p = &fil->filters[0].param;
   1253 		if (mode == AUMODE_PLAY)
   1254 			hw_play = p;
   1255 		else
   1256 			hw_rec = p;
   1257 	}
   1258 
   1259 	if (hw_play)
   1260 		esmch_set_format(&ess->pch, hw_play);
   1261 
   1262 	if (hw_rec)
   1263 		esmch_set_format(&ess->rch, hw_rec);
   1264 
   1265 	return 0;
   1266 }
   1267 
   1268 int
   1269 esm_set_port(void *sc, mixer_ctrl_t *cp)
   1270 {
   1271 	struct esm_softc *ess;
   1272 
   1273 	ess = sc;
   1274 	return ess->codec_if->vtbl->mixer_set_port(ess->codec_if, cp);
   1275 }
   1276 
   1277 int
   1278 esm_get_port(void *sc, mixer_ctrl_t *cp)
   1279 {
   1280 	struct esm_softc *ess;
   1281 
   1282 	ess = sc;
   1283 	return ess->codec_if->vtbl->mixer_get_port(ess->codec_if, cp);
   1284 }
   1285 
   1286 int
   1287 esm_query_devinfo(void *sc, mixer_devinfo_t *dip)
   1288 {
   1289 	struct esm_softc *ess;
   1290 
   1291 	ess = sc;
   1292 	return ess->codec_if->vtbl->query_devinfo(ess->codec_if, dip);
   1293 }
   1294 
   1295 void *
   1296 esm_malloc(void *sc, int direction, size_t size)
   1297 {
   1298 	struct esm_softc *ess;
   1299 	int off;
   1300 
   1301 	DPRINTF(ESM_DEBUG_DMA,
   1302 	    ("esm_malloc(%p, %d, 0x%zd)", sc, direction, size));
   1303 	ess = sc;
   1304 	/*
   1305 	 * Each buffer can only be allocated once.
   1306 	 */
   1307 	if (ess->rings_alloced & direction) {
   1308 		DPRINTF(ESM_DEBUG_DMA, (" = 0 (ENOMEM)\n"));
   1309 		return 0;
   1310 	}
   1311 
   1312 	/*
   1313 	 * Mark this buffer as allocated and return its
   1314 	 * kernel virtual address.
   1315 	 */
   1316 	ess->rings_alloced |= direction;
   1317 	off = (direction == AUMODE_PLAY ?
   1318 		MAESTRO_PLAYBUF_OFF : MAESTRO_RECBUF_OFF);
   1319 	DPRINTF(ESM_DEBUG_DMA, (" = %p (DMAADDR 0x%x)\n",
   1320 				(char *)ess->sc_dma.addr + off,
   1321 				(int)DMAADDR(&ess->sc_dma) + off));
   1322 	return (char *)ess->sc_dma.addr + off;
   1323 }
   1324 
   1325 void
   1326 esm_free(void *sc, void *ptr, size_t size)
   1327 {
   1328 	struct esm_softc *ess;
   1329 
   1330 	DPRINTF(ESM_DEBUG_DMA, ("esm_free(%p, %p, %zd)\n", sc, ptr, size));
   1331 	ess = sc;
   1332 	if ((char *)ptr == (char *)ess->sc_dma.addr + MAESTRO_PLAYBUF_OFF)
   1333 		ess->rings_alloced &= ~AUMODE_PLAY;
   1334 	else if ((char *)ptr == (char *)ess->sc_dma.addr + MAESTRO_RECBUF_OFF)
   1335 		ess->rings_alloced &= ~AUMODE_RECORD;
   1336 }
   1337 
   1338 size_t
   1339 esm_round_buffersize(void *sc, int direction, size_t size)
   1340 {
   1341 
   1342 	if (size > MAESTRO_PLAYBUF_SZ)
   1343 		size = MAESTRO_PLAYBUF_SZ;
   1344 	if (size > MAESTRO_RECBUF_SZ)
   1345 		size = MAESTRO_RECBUF_SZ;
   1346 	return size;
   1347 }
   1348 
   1349 paddr_t
   1350 esm_mappage(void *sc, void *mem, off_t off, int prot)
   1351 {
   1352 	struct esm_softc *ess;
   1353 
   1354 	DPRINTF(ESM_DEBUG_DMA,
   1355 	    ("esm_mappage(%p, %p, 0x%lx, 0x%x)\n",
   1356 	    sc, mem, (unsigned long)off, prot));
   1357 	ess = sc;
   1358 	if (off < 0)
   1359 		return -1;
   1360 
   1361 	if ((char *)mem == (char *)ess->sc_dma.addr + MAESTRO_PLAYBUF_OFF)
   1362 		off += MAESTRO_PLAYBUF_OFF;
   1363 	else if ((char *)mem == (char *)ess->sc_dma.addr + MAESTRO_RECBUF_OFF)
   1364 		off += MAESTRO_RECBUF_OFF;
   1365 	else
   1366 		return -1;
   1367 	return bus_dmamem_mmap(ess->dmat, ess->sc_dma.segs, ess->sc_dma.nsegs,
   1368 	    off, prot, BUS_DMA_WAITOK);
   1369 }
   1370 
   1371 int
   1372 esm_get_props(void *sc)
   1373 {
   1374 
   1375 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
   1376 }
   1377 
   1378 
   1379 /* -----------------------------
   1380  * Bus space.
   1381  */
   1382 
   1383 static int
   1384 esm_intr(void *sc)
   1385 {
   1386 	struct esm_softc *ess;
   1387 	uint16_t status;
   1388 	uint16_t pos;
   1389 	int ret;
   1390 
   1391 	ess = sc;
   1392 	ret = 0;
   1393 
   1394 	mutex_spin_enter(&ess->sc_intr_lock);
   1395 	status = bus_space_read_1(ess->st, ess->sh, PORT_HOSTINT_STAT);
   1396 	if (!status) {
   1397 		mutex_spin_exit(&ess->sc_intr_lock);
   1398 		return 0;
   1399 	}
   1400 
   1401 	/* Acknowledge all. */
   1402 	bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1);
   1403 	bus_space_write_1(ess->st, ess->sh, PORT_HOSTINT_STAT, 0);
   1404 #if 0	/* XXX - HWVOL */
   1405 	if (status & HOSTINT_STAT_HWVOL) {
   1406 		u_int delta;
   1407 		delta = bus_space_read_1(ess->st, ess->sh, PORT_HWVOL_MASTER)
   1408 		    - 0x88;
   1409 		if (delta & 0x11)
   1410 			mixer_set(device_get_softc(ess->dev),
   1411 			    SOUND_MIXER_VOLUME, 0);
   1412 		else {
   1413 			mixer_set(device_get_softc(ess->dev),
   1414 			    SOUND_MIXER_VOLUME,
   1415 			    mixer_get(device_get_softc(ess->dev),
   1416 				SOUND_MIXER_VOLUME)
   1417 			    + ((delta >> 5) & 0x7) - 4
   1418 			    + ((delta << 7) & 0x700) - 0x400);
   1419 		}
   1420 		bus_space_write_1(ess->st, ess->sh, PORT_HWVOL_MASTER, 0x88);
   1421 		ret++;
   1422 	}
   1423 #endif	/* XXX - HWVOL */
   1424 
   1425 	if (ess->pactive) {
   1426 		pos = wp_rdapu(ess, ess->pch.num << 1, APUREG_CURPTR);
   1427 
   1428 		DPRINTF(ESM_DEBUG_IRQ, (" %4.4x/%4.4x ", pos,
   1429 		    wp_rdapu(ess, (ess->pch.num<<1)+1, APUREG_CURPTR)));
   1430 
   1431 		pos -= ess->pch.apubase;
   1432 		if (pos >= ess->pch.nextirq &&
   1433 		    pos - ess->pch.nextirq < ess->pch.apubuf / 2) {
   1434 			ess->pch.nextirq += ess->pch.apublk;
   1435 
   1436 			if (ess->pch.nextirq >= ess->pch.apubuf)
   1437 				ess->pch.nextirq = 0;
   1438 
   1439 			if (ess->sc_pintr) {
   1440 				DPRINTF(ESM_DEBUG_IRQ, ("P\n"));
   1441 				ess->sc_pintr(ess->sc_parg);
   1442 			}
   1443 
   1444 		}
   1445 		ret++;
   1446 	}
   1447 
   1448 	if (ess->ractive) {
   1449 		pos = wp_rdapu(ess, ess->rch.num << 1, APUREG_CURPTR);
   1450 
   1451 		DPRINTF(ESM_DEBUG_IRQ, (" %4.4x/%4.4x ", pos,
   1452 		    wp_rdapu(ess, (ess->rch.num<<1)+1, APUREG_CURPTR)));
   1453 
   1454 		pos -= ess->rch.apubase;
   1455 		if (pos >= ess->rch.nextirq &&
   1456 		    pos - ess->rch.nextirq < ess->rch.apubuf / 2) {
   1457 			ess->rch.nextirq += ess->rch.apublk;
   1458 
   1459 			if (ess->rch.nextirq >= ess->rch.apubuf)
   1460 				ess->rch.nextirq = 0;
   1461 
   1462 			if (ess->sc_rintr) {
   1463 				DPRINTF(ESM_DEBUG_IRQ, ("R\n"));
   1464 				switch(ess->rch.aputype) {
   1465 				case APUTYPE_16BITSTEREO:
   1466 					esmch_combine_input(ess, &ess->rch);
   1467 					break;
   1468 				}
   1469 				ess->sc_rintr(ess->sc_rarg);
   1470 			}
   1471 
   1472 		}
   1473 		ret++;
   1474 	}
   1475 	mutex_spin_exit(&ess->sc_intr_lock);
   1476 
   1477 	return ret;
   1478 }
   1479 
   1480 static void
   1481 esm_freemem(struct esm_softc *sc, struct esm_dma *p)
   1482 {
   1483 	if (p->size == 0)
   1484 		return;
   1485 
   1486 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
   1487 
   1488 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
   1489 
   1490 	bus_dmamap_destroy(sc->dmat, p->map);
   1491 
   1492 	bus_dmamap_unload(sc->dmat, p->map);
   1493 
   1494 	p->size = 0;
   1495 }
   1496 
   1497 static int
   1498 esm_allocmem(struct esm_softc *sc, size_t size, size_t align,
   1499     struct esm_dma *p)
   1500 {
   1501 	int error;
   1502 
   1503 	p->size = size;
   1504 	error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
   1505 				 p->segs, __arraycount(p->segs),
   1506 				 &p->nsegs, BUS_DMA_WAITOK);
   1507 	if (error)
   1508 		return error;
   1509 
   1510 	error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
   1511 			       &p->addr, BUS_DMA_WAITOK|BUS_DMA_COHERENT);
   1512 	if (error)
   1513 		goto free;
   1514 
   1515 	error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
   1516 				  0, BUS_DMA_WAITOK, &p->map);
   1517 	if (error)
   1518 		goto unmap;
   1519 
   1520 	error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
   1521 				BUS_DMA_WAITOK);
   1522 	if (error)
   1523 		goto destroy;
   1524 
   1525 	return 0;
   1526 
   1527  destroy:
   1528 	bus_dmamap_destroy(sc->dmat, p->map);
   1529  unmap:
   1530 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
   1531  free:
   1532 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
   1533 
   1534 	p->size = 0;
   1535 	return error;
   1536 }
   1537 
   1538 static int
   1539 esm_match(device_t dev, cfdata_t match, void *aux)
   1540 {
   1541 	struct pci_attach_args *pa;
   1542 
   1543 	pa = (struct pci_attach_args *)aux;
   1544 	switch (PCI_VENDOR(pa->pa_id)) {
   1545 	case PCI_VENDOR_ESSTECH:
   1546 		switch (PCI_PRODUCT(pa->pa_id)) {
   1547 		case PCI_PRODUCT_ESSTECH_MAESTRO1:
   1548 		case PCI_PRODUCT_ESSTECH_MAESTRO2:
   1549 		case PCI_PRODUCT_ESSTECH_MAESTRO2E:
   1550 			return 1;
   1551 		}
   1552 
   1553 	case PCI_VENDOR_ESSTECH2:
   1554 		switch (PCI_PRODUCT(pa->pa_id)) {
   1555 		case PCI_PRODUCT_ESSTECH2_MAESTRO1:
   1556 			return 1;
   1557 		}
   1558 	}
   1559 	return 0;
   1560 }
   1561 
   1562 static void
   1563 esm_attach(device_t parent, device_t self, void *aux)
   1564 {
   1565 	struct esm_softc *ess;
   1566 	struct pci_attach_args *pa;
   1567 	const char *intrstr;
   1568 	pci_chipset_tag_t pc;
   1569 	pcitag_t tag;
   1570 	pci_intr_handle_t ih;
   1571 	pcireg_t csr, data;
   1572 	uint16_t codec_data;
   1573 	uint16_t pcmbar;
   1574 	int error;
   1575 	char intrbuf[PCI_INTRSTR_LEN];
   1576 
   1577 	ess = device_private(self);
   1578 	ess->sc_dev = self;
   1579 	pa = (struct pci_attach_args *)aux;
   1580 	pc = pa->pa_pc;
   1581 	tag = pa->pa_tag;
   1582 
   1583 	pci_aprint_devinfo(pa, "Audio controller");
   1584 
   1585 	mutex_init(&ess->sc_lock, MUTEX_DEFAULT, IPL_NONE);
   1586 	mutex_init(&ess->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
   1587 
   1588 	/* Enable the device. */
   1589 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
   1590 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
   1591 	    csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
   1592 
   1593 	/* Map I/O register */
   1594 	if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
   1595 	    &ess->st, &ess->sh, NULL, &ess->sz)) {
   1596 		aprint_error_dev(ess->sc_dev, "can't map i/o space\n");
   1597 		mutex_destroy(&ess->sc_lock);
   1598 		mutex_destroy(&ess->sc_intr_lock);
   1599 		return;
   1600 	}
   1601 
   1602 	/* Initialize softc */
   1603 	ess->pch.num = 0;
   1604 	ess->rch.num = 1;
   1605 	ess->dmat = pa->pa_dmat;
   1606 	ess->tag = tag;
   1607 	ess->pc = pc;
   1608 	ess->subid = pci_conf_read(pc, tag, PCI_SUBSYS_ID_REG);
   1609 
   1610 	DPRINTF(ESM_DEBUG_PCI,
   1611 	    ("%s: sub-system vendor 0x%4.4x, product 0x%4.4x\n",
   1612 	    device_xname(ess->sc_dev),
   1613 	    PCI_VENDOR(ess->subid), PCI_PRODUCT(ess->subid)));
   1614 
   1615 	/* Map and establish the interrupt. */
   1616 	if (pci_intr_map(pa, &ih)) {
   1617 		aprint_error_dev(ess->sc_dev, "can't map interrupt\n");
   1618 		mutex_destroy(&ess->sc_lock);
   1619 		mutex_destroy(&ess->sc_intr_lock);
   1620 		return;
   1621 	}
   1622 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
   1623 	ess->ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, esm_intr, self,
   1624 	    device_xname(self));
   1625 	if (ess->ih == NULL) {
   1626 		aprint_error_dev(ess->sc_dev, "can't establish interrupt");
   1627 		if (intrstr != NULL)
   1628 			aprint_error(" at %s", intrstr);
   1629 		aprint_error("\n");
   1630 		mutex_destroy(&ess->sc_lock);
   1631 		mutex_destroy(&ess->sc_intr_lock);
   1632 		return;
   1633 	}
   1634 	aprint_normal_dev(ess->sc_dev, "interrupting at %s\n", intrstr);
   1635 
   1636 	/*
   1637 	 * Setup PCI config registers
   1638 	 */
   1639 
   1640 	/* power up chip */
   1641 	if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self,
   1642 	    pci_activate_null)) && error != EOPNOTSUPP) {
   1643 		aprint_error_dev(ess->sc_dev, "cannot activate %d\n", error);
   1644 		mutex_destroy(&ess->sc_lock);
   1645 		mutex_destroy(&ess->sc_intr_lock);
   1646 		return;
   1647 	}
   1648 	delay(100000);
   1649 
   1650 	/* Disable all legacy emulations. */
   1651 	data = pci_conf_read(pc, tag, CONF_LEGACY);
   1652 	pci_conf_write(pc, tag, CONF_LEGACY, data | LEGACY_DISABLED);
   1653 
   1654 	/* Disconnect from CHI. (Makes Dell inspiron 7500 work?)
   1655 	 * Enable posted write.
   1656 	 * Prefer PCI timing rather than that of ISA.
   1657 	 * Don't swap L/R. */
   1658 	data = pci_conf_read(pc, tag, CONF_MAESTRO);
   1659 	data |= MAESTRO_CHIBUS | MAESTRO_POSTEDWRITE | MAESTRO_DMA_PCITIMING;
   1660 	data &= ~MAESTRO_SWAP_LR;
   1661 	pci_conf_write(pc, tag, CONF_MAESTRO, data);
   1662 
   1663 	/* initialize sound chip */
   1664 	esm_init(ess);
   1665 
   1666 	esm_read_codec(ess, 0, &codec_data);
   1667 	if (codec_data == 0x80) {
   1668 		aprint_error_dev(ess->sc_dev, "PT101 codec detected!\n");
   1669 		mutex_destroy(&ess->sc_lock);
   1670 		mutex_destroy(&ess->sc_intr_lock);
   1671 		return;
   1672 	}
   1673 
   1674 	/*
   1675 	 * Some cards and Notebooks appear to have left and right channels
   1676 	 * reversed.  Check if there is a corresponding quirk entry for
   1677 	 * the subsystem vendor and product and if so, set the appropriate
   1678 	 * codec flag.
   1679 	 */
   1680 	if (esm_get_quirks(ess->subid) & ESM_QUIRKF_SWAPPEDCH) {
   1681 		ess->codec_flags |= AC97_HOST_SWAPPED_CHANNELS;
   1682 	}
   1683 	ess->codec_flags |= AC97_HOST_DONT_READ;
   1684 
   1685 	/* initialize AC97 host interface */
   1686 	ess->host_if.arg = self;
   1687 	ess->host_if.attach = esm_attach_codec;
   1688 	ess->host_if.read = esm_read_codec;
   1689 	ess->host_if.write = esm_write_codec;
   1690 	ess->host_if.reset = esm_reset_codec;
   1691 	ess->host_if.flags = esm_flags_codec;
   1692 
   1693 	if (ac97_attach(&ess->host_if, self, &ess->sc_lock) != 0) {
   1694 		mutex_destroy(&ess->sc_lock);
   1695 		mutex_destroy(&ess->sc_intr_lock);
   1696 		return;
   1697 	}
   1698 
   1699 	/* allocate our DMA region */
   1700 	if (esm_allocmem(ess, MAESTRO_DMA_SZ, MAESTRO_DMA_ALIGN,
   1701 		&ess->sc_dma)) {
   1702 		aprint_error_dev(ess->sc_dev, "couldn't allocate memory!\n");
   1703 		mutex_destroy(&ess->sc_lock);
   1704 		mutex_destroy(&ess->sc_intr_lock);
   1705 		return;
   1706 	}
   1707 	ess->rings_alloced = 0;
   1708 
   1709 	/* set DMA base address */
   1710 	for (pcmbar = WAVCACHE_PCMBAR; pcmbar < WAVCACHE_PCMBAR + 4; pcmbar++)
   1711 		wc_wrreg(ess, pcmbar,
   1712 		    DMAADDR(&ess->sc_dma) >> WAVCACHE_BASEADDR_SHIFT);
   1713 
   1714 	audio_attach_mi(&esm_hw_if, self, ess->sc_dev);
   1715 
   1716 	if (!pmf_device_register(self, esm_suspend, esm_resume))
   1717 		aprint_error_dev(self, "couldn't establish power handler\n");
   1718 }
   1719 
   1720 static void
   1721 esm_childdet(device_t self, device_t child)
   1722 {
   1723 	/* we hold no child references, so do nothing */
   1724 }
   1725 
   1726 static int
   1727 esm_detach(device_t self, int flags)
   1728 {
   1729 	int rc;
   1730 	struct esm_softc *ess = device_private(self);
   1731 
   1732 	if ((rc = config_detach_children(self, flags)) != 0)
   1733 		return rc;
   1734 	pmf_device_deregister(self);
   1735 
   1736 	/* free our DMA region */
   1737 	esm_freemem(ess, &ess->sc_dma);
   1738 
   1739 	if (ess->codec_if != NULL) {
   1740 		mutex_enter(&ess->sc_lock);
   1741 		ess->codec_if->vtbl->detach(ess->codec_if);
   1742 		mutex_exit(&ess->sc_lock);
   1743 	}
   1744 
   1745 	/* XXX Restore CONF_MAESTRO? */
   1746 	/* XXX Restore legacy emulations? */
   1747 	/* XXX Restore PCI config registers? */
   1748 
   1749 	if (ess->ih != NULL)
   1750 		pci_intr_disestablish(ess->pc, ess->ih);
   1751 
   1752 	bus_space_unmap(ess->st, ess->sh, ess->sz);
   1753 	mutex_destroy(&ess->sc_lock);
   1754 	mutex_destroy(&ess->sc_intr_lock);
   1755 
   1756 	return 0;
   1757 }
   1758 
   1759 static bool
   1760 esm_suspend(device_t dv, const pmf_qual_t *qual)
   1761 {
   1762 	struct esm_softc *ess = device_private(dv);
   1763 
   1764 	mutex_enter(&ess->sc_lock);
   1765 	mutex_spin_enter(&ess->sc_intr_lock);
   1766 	wp_stoptimer(ess);
   1767 	bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0);
   1768 	esm_halt_output(ess);
   1769 	esm_halt_input(ess);
   1770 	mutex_spin_exit(&ess->sc_intr_lock);
   1771 
   1772 	/* Power down everything except clock. */
   1773 	esm_write_codec(ess, AC97_REG_POWER, 0xdf00);
   1774 	delay(20);
   1775 	bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
   1776 	delay(1);
   1777 	mutex_exit(&ess->sc_lock);
   1778 
   1779 	return true;
   1780 }
   1781 
   1782 static bool
   1783 esm_resume(device_t dv, const pmf_qual_t *qual)
   1784 {
   1785 	struct esm_softc *ess = device_private(dv);
   1786 	uint16_t pcmbar;
   1787 
   1788 	delay(100000);
   1789 
   1790 	mutex_enter(&ess->sc_lock);
   1791 	mutex_spin_enter(&ess->sc_intr_lock);
   1792 	esm_init(ess);
   1793 
   1794 	/* set DMA base address */
   1795 	for (pcmbar = WAVCACHE_PCMBAR; pcmbar < WAVCACHE_PCMBAR + 4; pcmbar++)
   1796 		wc_wrreg(ess, pcmbar,
   1797 		    DMAADDR(&ess->sc_dma) >> WAVCACHE_BASEADDR_SHIFT);
   1798 	mutex_spin_exit(&ess->sc_intr_lock);
   1799 	ess->codec_if->vtbl->restore_ports(ess->codec_if);
   1800 	mutex_spin_enter(&ess->sc_intr_lock);
   1801 #if 0
   1802 	if (mixer_reinit(dev)) {
   1803 		printf("%s: unable to reinitialize the mixer\n",
   1804 		    device_xname(ess->sc_dev));
   1805 		return ENXIO;
   1806 	}
   1807 #endif
   1808 
   1809 #if TODO
   1810 	if (ess->pactive)
   1811 		esm_start_output(ess);
   1812 	if (ess->ractive)
   1813 		esm_start_input(ess);
   1814 #endif
   1815 	if (ess->pactive || ess->ractive) {
   1816 		set_timer(ess);
   1817 		wp_starttimer(ess);
   1818 	}
   1819 	mutex_spin_exit(&ess->sc_intr_lock);
   1820 	mutex_exit(&ess->sc_lock);
   1821 
   1822 	return true;
   1823 }
   1824 
   1825 void
   1826 esm_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc)
   1827 {
   1828 	struct esm_softc *esm;
   1829 
   1830 	esm = addr;
   1831 	*intr = &esm->sc_intr_lock;
   1832 	*proc = &esm->sc_lock;
   1833 }
   1834