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fwohci_pci.c revision 1.28.10.1
      1  1.28.10.1       mjf /*	$NetBSD: fwohci_pci.c,v 1.28.10.1 2008/04/03 12:42:50 mjf Exp $	*/
      2        1.5     enami 
      3        1.1      matt /*-
      4        1.1      matt  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5        1.1      matt  * All rights reserved.
      6        1.1      matt  *
      7        1.1      matt  * This code is derived from software contributed to The NetBSD Foundation
      8        1.1      matt  * by Matt Thomas of 3am Software Foundry.
      9        1.1      matt  *
     10        1.1      matt  * Redistribution and use in source and binary forms, with or without
     11        1.1      matt  * modification, are permitted provided that the following conditions
     12        1.1      matt  * are met:
     13        1.1      matt  * 1. Redistributions of source code must retain the above copyright
     14        1.1      matt  *    notice, this list of conditions and the following disclaimer.
     15        1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     16        1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     17        1.1      matt  *    documentation and/or other materials provided with the distribution.
     18        1.1      matt  * 3. All advertising materials mentioning features or use of this software
     19        1.1      matt  *    must display the following acknowledgement:
     20        1.1      matt  *        This product includes software developed by the NetBSD
     21        1.1      matt  *        Foundation, Inc. and its contributors.
     22        1.1      matt  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23        1.1      matt  *    contributors may be used to endorse or promote products derived
     24        1.1      matt  *    from this software without specific prior written permission.
     25        1.1      matt  *
     26        1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27        1.1      matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28        1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29        1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30        1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31        1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32        1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33        1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34        1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35        1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36        1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     37        1.1      matt  */
     38       1.11     lukem 
     39       1.11     lukem #include <sys/cdefs.h>
     40  1.28.10.1       mjf __KERNEL_RCSID(0, "$NetBSD: fwohci_pci.c,v 1.28.10.1 2008/04/03 12:42:50 mjf Exp $");
     41        1.1      matt 
     42        1.1      matt #include <sys/param.h>
     43        1.2  augustss #include <sys/systm.h>
     44        1.1      matt #include <sys/socket.h>
     45        1.1      matt #include <sys/device.h>
     46       1.17      haya #include <sys/select.h>
     47        1.1      matt 
     48       1.26        ad #include <sys/bus.h>
     49       1.26        ad #include <sys/intr.h>
     50        1.1      matt 
     51        1.1      matt #include <dev/pci/pcireg.h>
     52        1.1      matt #include <dev/pci/pcivar.h>
     53       1.22  kiyohara #include <dev/ieee1394/fw_port.h>
     54       1.22  kiyohara #include <dev/ieee1394/firewire.h>
     55       1.22  kiyohara #include <dev/ieee1394/firewirereg.h>
     56       1.22  kiyohara #include <dev/ieee1394/fwdma.h>
     57        1.1      matt #include <dev/ieee1394/fwohcireg.h>
     58        1.1      matt #include <dev/ieee1394/fwohcivar.h>
     59        1.1      matt 
     60        1.1      matt struct fwohci_pci_softc {
     61        1.1      matt 	struct fwohci_softc psc_sc;
     62       1.27  kiyohara 
     63        1.1      matt 	pci_chipset_tag_t psc_pc;
     64       1.27  kiyohara 	pcitag_t psc_tag;
     65       1.27  kiyohara 
     66        1.1      matt 	void *psc_ih;
     67        1.1      matt };
     68        1.1      matt 
     69  1.28.10.1       mjf static int fwohci_pci_match(device_t, struct cfdata *, void *);
     70  1.28.10.1       mjf static void fwohci_pci_attach(device_t, device_t, void *);
     71       1.28  jmcneill 
     72  1.28.10.1       mjf static bool fwohci_pci_suspend(device_t PMF_FN_PROTO);
     73  1.28.10.1       mjf static bool fwohci_pci_resume(device_t PMF_FN_PROTO);
     74        1.1      matt 
     75  1.28.10.1       mjf CFATTACH_DECL_NEW(fwohci_pci, sizeof(struct fwohci_pci_softc),
     76       1.16   thorpej     fwohci_pci_match, fwohci_pci_attach, NULL, NULL);
     77        1.1      matt 
     78        1.1      matt static int
     79  1.28.10.1       mjf fwohci_pci_match(device_t parent, struct cfdata *match,
     80       1.24  christos     void *aux)
     81        1.1      matt {
     82        1.7     enami 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     83        1.1      matt 
     84        1.7     enami 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
     85        1.7     enami 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_FIREWIRE &&
     86        1.7     enami 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI)
     87        1.7     enami 		return 1;
     88       1.21     perry 
     89        1.7     enami 	return 0;
     90        1.1      matt }
     91        1.1      matt 
     92        1.1      matt static void
     93  1.28.10.1       mjf fwohci_pci_attach(device_t parent, device_t self, void *aux)
     94        1.1      matt {
     95        1.7     enami 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     96  1.28.10.1       mjf 	struct fwohci_pci_softc *psc = device_private(self);
     97        1.7     enami 	char devinfo[256];
     98        1.1      matt 	char const *intrstr;
     99        1.1      matt 	pci_intr_handle_t ih;
    100        1.1      matt 	u_int32_t csr;
    101        1.1      matt 
    102       1.18   thorpej 	aprint_naive(": IEEE 1394 Controller\n");
    103       1.18   thorpej 
    104       1.19    itojun 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    105       1.18   thorpej 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    106       1.18   thorpej 	    PCI_REVISION(pa->pa_class));
    107        1.1      matt 
    108  1.28.10.1       mjf 	psc->psc_sc.fc.dev = self;
    109       1.22  kiyohara 	psc->psc_sc.fc.dmat = pa->pa_dmat;
    110        1.1      matt 	psc->psc_pc = pa->pa_pc;
    111       1.27  kiyohara 	psc->psc_tag = pa->pa_tag;
    112        1.1      matt 
    113        1.7     enami 	/* Map I/O registers */
    114        1.7     enami 	if (pci_mapreg_map(pa, PCI_OHCI_MAP_REGISTER, PCI_MAPREG_TYPE_MEM, 0,
    115       1.22  kiyohara 	    &psc->psc_sc.bst, &psc->psc_sc.bsh,
    116       1.22  kiyohara 	    NULL, &psc->psc_sc.bssize)) {
    117  1.28.10.1       mjf 		aprint_error_dev(self, "can't map OHCI register space\n");
    118       1.28  jmcneill 		goto fail;
    119        1.7     enami 	}
    120        1.7     enami 
    121        1.7     enami 	/* Disable interrupts, so we don't get any spurious ones. */
    122       1.22  kiyohara 	OHCI_CSR_WRITE(&psc->psc_sc, FWOHCI_INTMASKCLR, OHCI_INT_EN);
    123        1.7     enami 
    124        1.7     enami 	/* Enable the device. */
    125        1.7     enami 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    126        1.7     enami 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    127        1.7     enami 	    csr | PCI_COMMAND_MASTER_ENABLE);
    128        1.8     enami 
    129        1.1      matt 	/* Map and establish the interrupt. */
    130        1.6  sommerfe 	if (pci_intr_map(pa, &ih)) {
    131  1.28.10.1       mjf 		aprint_error_dev(self, "couldn't map interrupt\n");
    132       1.28  jmcneill 		goto fail;
    133        1.1      matt 	}
    134        1.1      matt 	intrstr = pci_intr_string(pa->pa_pc, ih);
    135       1.27  kiyohara 	psc->psc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, fwohci_filt,
    136        1.7     enami 	    &psc->psc_sc);
    137        1.1      matt 	if (psc->psc_ih == NULL) {
    138  1.28.10.1       mjf 		aprint_error_dev(self, "couldn't establish interrupt");
    139        1.1      matt 		if (intrstr != NULL)
    140  1.28.10.1       mjf 			aprint_error(" at %s", intrstr);
    141  1.28.10.1       mjf 		aprint_error("\n");
    142       1.28  jmcneill 		goto fail;
    143        1.1      matt 	}
    144  1.28.10.1       mjf 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
    145        1.1      matt 
    146       1.28  jmcneill 	if (!pmf_device_register(self, fwohci_pci_suspend, fwohci_pci_resume))
    147       1.28  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    148       1.27  kiyohara 
    149  1.28.10.1       mjf 	if (fwohci_init(&(psc->psc_sc), psc->psc_sc.fc.dev) != 0) {
    150        1.3      onoe 		pci_intr_disestablish(pa->pa_pc, psc->psc_ih);
    151       1.22  kiyohara 		bus_space_unmap(psc->psc_sc.bst, psc->psc_sc.bsh,
    152       1.22  kiyohara 		    psc->psc_sc.bssize);
    153        1.3      onoe 	}
    154       1.28  jmcneill 
    155       1.28  jmcneill 	return;
    156       1.28  jmcneill 
    157       1.28  jmcneill fail:
    158       1.28  jmcneill 	/* In the event that we fail to attach, register a null pnp handler */
    159       1.28  jmcneill 	if (!pmf_device_register(self, NULL, NULL))
    160       1.28  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    161       1.28  jmcneill 
    162       1.28  jmcneill 	return;
    163        1.1      matt }
    164       1.27  kiyohara 
    165       1.28  jmcneill static bool
    166  1.28.10.1       mjf fwohci_pci_suspend(device_t dv PMF_FN_ARGS)
    167       1.27  kiyohara {
    168       1.28  jmcneill 	struct fwohci_pci_softc *psc = device_private(dv);
    169       1.28  jmcneill 	int s;
    170       1.27  kiyohara 
    171       1.28  jmcneill 	s = splbio();
    172       1.27  kiyohara 	fwohci_stop(&psc->psc_sc, psc->psc_sc.fc.dev);
    173       1.28  jmcneill 	splx(s);
    174       1.28  jmcneill 
    175       1.28  jmcneill 	return true;
    176       1.27  kiyohara }
    177       1.27  kiyohara 
    178       1.28  jmcneill static bool
    179  1.28.10.1       mjf fwohci_pci_resume(device_t dv PMF_FN_ARGS)
    180       1.27  kiyohara {
    181       1.28  jmcneill 	struct fwohci_pci_softc *psc = device_private(dv);
    182       1.27  kiyohara 	int s;
    183       1.27  kiyohara 
    184       1.27  kiyohara 	s = splbio();
    185       1.28  jmcneill 	fwohci_resume(&psc->psc_sc, psc->psc_sc.fc.dev);
    186       1.27  kiyohara 	splx(s);
    187       1.28  jmcneill 
    188       1.28  jmcneill 	return true;
    189       1.27  kiyohara }
    190