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fwohci_pci.c revision 1.6.2.2
      1  1.6.2.2   nathanw /*	$NetBSD: fwohci_pci.c,v 1.6.2.2 2001/06/21 20:04:36 nathanw Exp $	*/
      2      1.5     enami 
      3      1.1      matt /*-
      4      1.1      matt  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5      1.1      matt  * All rights reserved.
      6      1.1      matt  *
      7      1.1      matt  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1      matt  * by Matt Thomas of 3am Software Foundry.
      9      1.1      matt  *
     10      1.1      matt  * Redistribution and use in source and binary forms, with or without
     11      1.1      matt  * modification, are permitted provided that the following conditions
     12      1.1      matt  * are met:
     13      1.1      matt  * 1. Redistributions of source code must retain the above copyright
     14      1.1      matt  *    notice, this list of conditions and the following disclaimer.
     15      1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     17      1.1      matt  *    documentation and/or other materials provided with the distribution.
     18      1.1      matt  * 3. All advertising materials mentioning features or use of this software
     19      1.1      matt  *    must display the following acknowledgement:
     20      1.1      matt  *        This product includes software developed by the NetBSD
     21      1.1      matt  *        Foundation, Inc. and its contributors.
     22      1.1      matt  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.1      matt  *    contributors may be used to endorse or promote products derived
     24      1.1      matt  *    from this software without specific prior written permission.
     25      1.1      matt  *
     26      1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27      1.1      matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28      1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29      1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30      1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31      1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32      1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33      1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34      1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35      1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36      1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     37      1.1      matt  */
     38      1.1      matt 
     39      1.1      matt #include <sys/param.h>
     40      1.2  augustss #include <sys/systm.h>
     41      1.1      matt #include <sys/types.h>
     42      1.1      matt #include <sys/socket.h>
     43      1.1      matt #include <sys/device.h>
     44      1.1      matt 
     45      1.1      matt #include <machine/bus.h>
     46      1.1      matt #include <machine/intr.h>
     47      1.1      matt 
     48      1.1      matt #include <dev/pci/pcireg.h>
     49      1.1      matt #include <dev/pci/pcivar.h>
     50      1.1      matt #include <dev/ieee1394/ieee1394reg.h>
     51      1.1      matt #include <dev/ieee1394/ieee1394var.h>
     52      1.1      matt #include <dev/ieee1394/fwohcireg.h>
     53      1.1      matt #include <dev/ieee1394/fwohcivar.h>
     54      1.1      matt 
     55      1.1      matt struct fwohci_pci_softc {
     56      1.1      matt 	struct fwohci_softc psc_sc;
     57      1.1      matt 	pci_chipset_tag_t psc_pc;
     58      1.1      matt 	void *psc_ih;
     59      1.1      matt };
     60      1.1      matt 
     61      1.1      matt static int fwohci_pci_match __P((struct device *, struct cfdata *, void *));
     62      1.1      matt static void fwohci_pci_attach __P((struct device *, struct device *, void *));
     63      1.1      matt 
     64      1.1      matt struct cfattach fwohci_pci_ca = {
     65      1.1      matt 	sizeof(struct fwohci_pci_softc), fwohci_pci_match, fwohci_pci_attach,
     66      1.1      matt #if 0
     67      1.1      matt 	fwohci_pci_detach, fwohci_activate
     68      1.1      matt #endif
     69      1.1      matt };
     70      1.1      matt 
     71      1.1      matt static int
     72      1.1      matt fwohci_pci_match(struct device *parent, struct cfdata *match, void *aux)
     73      1.1      matt {
     74  1.6.2.1   nathanw 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     75      1.1      matt 
     76  1.6.2.1   nathanw 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
     77  1.6.2.1   nathanw 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_FIREWIRE &&
     78  1.6.2.1   nathanw 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI)
     79  1.6.2.1   nathanw 		return 1;
     80      1.1      matt 
     81  1.6.2.1   nathanw 	return 0;
     82      1.1      matt }
     83      1.1      matt 
     84      1.1      matt static void
     85      1.1      matt fwohci_pci_attach(struct device *parent, struct device *self, void *aux)
     86      1.1      matt {
     87  1.6.2.1   nathanw 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     88      1.1      matt 	struct fwohci_pci_softc *psc = (struct fwohci_pci_softc *) self;
     89  1.6.2.1   nathanw 	char devinfo[256];
     90      1.1      matt 	char const *intrstr;
     91      1.1      matt 	pci_intr_handle_t ih;
     92      1.1      matt 	u_int32_t csr;
     93      1.1      matt 
     94  1.6.2.1   nathanw 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
     95  1.6.2.1   nathanw 	printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
     96      1.1      matt 
     97      1.1      matt 	psc->psc_sc.sc_dmat = pa->pa_dmat;
     98      1.1      matt 	psc->psc_pc = pa->pa_pc;
     99      1.1      matt 
    100  1.6.2.1   nathanw 	/* Map I/O registers */
    101  1.6.2.1   nathanw 	if (pci_mapreg_map(pa, PCI_OHCI_MAP_REGISTER, PCI_MAPREG_TYPE_MEM, 0,
    102  1.6.2.1   nathanw 	    &psc->psc_sc.sc_memt, &psc->psc_sc.sc_memh,
    103  1.6.2.1   nathanw 	    NULL, &psc->psc_sc.sc_memsize)) {
    104  1.6.2.1   nathanw 		printf("%s: can't map OCHI register space\n", self->dv_xname);
    105  1.6.2.1   nathanw 		return;
    106  1.6.2.1   nathanw 	}
    107  1.6.2.1   nathanw 
    108  1.6.2.1   nathanw 	/* Disable interrupts, so we don't get any spurious ones. */
    109  1.6.2.1   nathanw 	OHCI_CSR_WRITE(&psc->psc_sc, OHCI_REG_IntMaskClear,
    110  1.6.2.1   nathanw 	    OHCI_Int_MasterEnable);
    111  1.6.2.1   nathanw 
    112  1.6.2.1   nathanw 	/* Enable the device. */
    113  1.6.2.1   nathanw 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    114  1.6.2.1   nathanw 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    115  1.6.2.1   nathanw 	    csr | PCI_COMMAND_MASTER_ENABLE);
    116  1.6.2.1   nathanw 
    117  1.6.2.1   nathanw #if BYTE_ORDER == BIG_ENDIAN
    118  1.6.2.1   nathanw 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_OHCI_CONTROL_REGISTER);
    119  1.6.2.1   nathanw 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_OHCI_CONTROL_REGISTER,
    120  1.6.2.1   nathanw 	    csr | PCI_GLOBAL_SWAP_BE);
    121  1.6.2.1   nathanw #endif
    122      1.1      matt 
    123      1.1      matt 	/* Map and establish the interrupt. */
    124      1.6  sommerfe 	if (pci_intr_map(pa, &ih)) {
    125  1.6.2.1   nathanw 		printf("%s: couldn't map interrupt\n", self->dv_xname);
    126      1.1      matt 		return;
    127      1.1      matt 	}
    128      1.1      matt 	intrstr = pci_intr_string(pa->pa_pc, ih);
    129  1.6.2.1   nathanw 	psc->psc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, fwohci_intr,
    130  1.6.2.1   nathanw 	    &psc->psc_sc);
    131      1.1      matt 	if (psc->psc_ih == NULL) {
    132      1.1      matt 		printf("%s: couldn't establish interrupt", self->dv_xname);
    133      1.1      matt 		if (intrstr != NULL)
    134      1.1      matt 			printf(" at %s", intrstr);
    135      1.1      matt 		printf("\n");
    136      1.1      matt 		return;
    137      1.1      matt 	}
    138      1.1      matt 	printf("%s: interrupting at %s\n", self->dv_xname, intrstr);
    139      1.1      matt 
    140      1.4      matt 	if (fwohci_init(&psc->psc_sc, pci_intr_evcnt(pa->pa_pc, ih)) != 0) {
    141      1.3      onoe 		pci_intr_disestablish(pa->pa_pc, psc->psc_ih);
    142      1.3      onoe 		bus_space_unmap(psc->psc_sc.sc_memt, psc->psc_sc.sc_memh,
    143      1.3      onoe 		    psc->psc_sc.sc_memsize);
    144      1.3      onoe 	}
    145      1.1      matt }
    146