fwohci_pci.c revision 1.22
1 /* $NetBSD: fwohci_pci.c,v 1.22 2005/07/11 15:37:04 kiyohara Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: fwohci_pci.c,v 1.22 2005/07/11 15:37:04 kiyohara Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/socket.h> 45 #include <sys/device.h> 46 #include <sys/select.h> 47 48 #include <machine/bus.h> 49 #include <machine/intr.h> 50 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/ieee1394/fw_port.h> 54 #include <dev/ieee1394/firewire.h> 55 #include <dev/ieee1394/firewirereg.h> 56 #include <dev/ieee1394/fwdma.h> 57 #include <dev/ieee1394/fwohcireg.h> 58 #include <dev/ieee1394/fwohcivar.h> 59 60 struct fwohci_pci_softc { 61 struct fwohci_softc psc_sc; 62 pci_chipset_tag_t psc_pc; 63 void *psc_ih; 64 }; 65 66 static int fwohci_pci_match(struct device *, struct cfdata *, void *); 67 static void fwohci_pci_attach(struct device *, struct device *, void *); 68 69 CFATTACH_DECL(fwohci_pci, sizeof(struct fwohci_pci_softc), 70 fwohci_pci_match, fwohci_pci_attach, NULL, NULL); 71 72 static int 73 fwohci_pci_match(struct device *parent, struct cfdata *match, void *aux) 74 { 75 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 76 77 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 78 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_FIREWIRE && 79 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI) 80 return 1; 81 82 return 0; 83 } 84 85 static void 86 fwohci_pci_attach(struct device *parent, struct device *self, void *aux) 87 { 88 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 89 struct fwohci_pci_softc *psc = (struct fwohci_pci_softc *) self; 90 char devinfo[256]; 91 char const *intrstr; 92 pci_intr_handle_t ih; 93 u_int32_t csr; 94 95 aprint_naive(": IEEE 1394 Controller\n"); 96 97 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 98 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 99 PCI_REVISION(pa->pa_class)); 100 101 psc->psc_sc.fc.dmat = pa->pa_dmat; 102 psc->psc_pc = pa->pa_pc; 103 104 /* Map I/O registers */ 105 if (pci_mapreg_map(pa, PCI_OHCI_MAP_REGISTER, PCI_MAPREG_TYPE_MEM, 0, 106 &psc->psc_sc.bst, &psc->psc_sc.bsh, 107 NULL, &psc->psc_sc.bssize)) { 108 aprint_error("%s: can't map OHCI register space\n", 109 self->dv_xname); 110 return; 111 } 112 113 /* Disable interrupts, so we don't get any spurious ones. */ 114 OHCI_CSR_WRITE(&psc->psc_sc, FWOHCI_INTMASKCLR, OHCI_INT_EN); 115 116 /* Enable the device. */ 117 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 118 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 119 csr | PCI_COMMAND_MASTER_ENABLE); 120 121 /* Map and establish the interrupt. */ 122 if (pci_intr_map(pa, &ih)) { 123 aprint_error("%s: couldn't map interrupt\n", self->dv_xname); 124 return; 125 } 126 intrstr = pci_intr_string(pa->pa_pc, ih); 127 psc->psc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, fwohci_intr, 128 &psc->psc_sc); 129 if (psc->psc_ih == NULL) { 130 aprint_error("%s: couldn't establish interrupt", 131 self->dv_xname); 132 if (intrstr != NULL) 133 aprint_normal(" at %s", intrstr); 134 aprint_normal("\n"); 135 return; 136 } 137 aprint_normal("%s: interrupting at %s\n", self->dv_xname, intrstr); 138 139 if (fwohci_init(&(psc->psc_sc), &(psc->psc_sc.fc._dev)) != 0) { 140 pci_intr_disestablish(pa->pa_pc, psc->psc_ih); 141 bus_space_unmap(psc->psc_sc.bst, psc->psc_sc.bsh, 142 psc->psc_sc.bssize); 143 } 144 } 145
Indexes created Mon Sep 29 18:09:42 GMT 2025