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fwohci_pci.c revision 1.32.10.1
      1 /*	$NetBSD: fwohci_pci.c,v 1.32.10.1 2010/11/21 23:34:56 riz Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Matt Thomas of 3am Software Foundry.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: fwohci_pci.c,v 1.32.10.1 2010/11/21 23:34:56 riz Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 #include <sys/socket.h>
     38 #include <sys/device.h>
     39 #include <sys/select.h>
     40 
     41 #include <sys/bus.h>
     42 #include <sys/intr.h>
     43 
     44 #include <dev/pci/pcireg.h>
     45 #include <dev/pci/pcivar.h>
     46 #include <dev/pci/pcidevs.h>
     47 #include <dev/ieee1394/fw_port.h>
     48 #include <dev/ieee1394/firewire.h>
     49 #include <dev/ieee1394/firewirereg.h>
     50 #include <dev/ieee1394/fwdma.h>
     51 #include <dev/ieee1394/fwohcireg.h>
     52 #include <dev/ieee1394/fwohcivar.h>
     53 
     54 struct fwohci_pci_softc {
     55 	struct fwohci_softc psc_sc;
     56 
     57 	pci_chipset_tag_t psc_pc;
     58 	pcitag_t psc_tag;
     59 
     60 	void *psc_ih;
     61 };
     62 
     63 static int fwohci_pci_match(device_t, struct cfdata *, void *);
     64 static void fwohci_pci_attach(device_t, device_t, void *);
     65 
     66 static bool fwohci_pci_suspend(device_t PMF_FN_PROTO);
     67 static bool fwohci_pci_resume(device_t PMF_FN_PROTO);
     68 
     69 CFATTACH_DECL_NEW(fwohci_pci, sizeof(struct fwohci_pci_softc),
     70     fwohci_pci_match, fwohci_pci_attach, NULL, NULL);
     71 
     72 static int
     73 fwohci_pci_match(device_t parent, struct cfdata *match,
     74     void *aux)
     75 {
     76 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     77 
     78 	/*
     79 	 * XXX
     80 	 * Firewire controllers used in some G3 PowerBooks hang the system
     81 	 * when trying to discover devices - don't attach to those for now
     82 	 * until someone with the right hardware can investigate
     83 	 */
     84 	if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) &&
     85 	    (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_PBG3_FW))
     86 	    return 0;
     87 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
     88 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_FIREWIRE &&
     89 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI)
     90 		return 1;
     91 
     92 	return 0;
     93 }
     94 
     95 static void
     96 fwohci_pci_attach(device_t parent, device_t self, void *aux)
     97 {
     98 	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
     99 	struct fwohci_pci_softc *psc = device_private(self);
    100 	char devinfo[256];
    101 	char const *intrstr;
    102 	pci_intr_handle_t ih;
    103 	u_int32_t csr;
    104 
    105 	aprint_naive(": IEEE 1394 Controller\n");
    106 
    107 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    108 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    109 	    PCI_REVISION(pa->pa_class));
    110 
    111 	psc->psc_sc.fc.dev = self;
    112 	psc->psc_sc.fc.dmat = pa->pa_dmat;
    113 	psc->psc_pc = pa->pa_pc;
    114 	psc->psc_tag = pa->pa_tag;
    115 
    116 	/* Map I/O registers */
    117 	if (pci_mapreg_map(pa, PCI_OHCI_MAP_REGISTER, PCI_MAPREG_TYPE_MEM, 0,
    118 	    &psc->psc_sc.bst, &psc->psc_sc.bsh,
    119 	    NULL, &psc->psc_sc.bssize)) {
    120 		aprint_error_dev(self, "can't map OHCI register space\n");
    121 		goto fail;
    122 	}
    123 
    124 	/* Disable interrupts, so we don't get any spurious ones. */
    125 	OHCI_CSR_WRITE(&psc->psc_sc, FWOHCI_INTMASKCLR, OHCI_INT_EN);
    126 
    127 	/* Enable the device. */
    128 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    129 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    130 	    csr | PCI_COMMAND_MASTER_ENABLE);
    131 
    132 	/* Map and establish the interrupt. */
    133 	if (pci_intr_map(pa, &ih)) {
    134 		aprint_error_dev(self, "couldn't map interrupt\n");
    135 		goto fail;
    136 	}
    137 	intrstr = pci_intr_string(pa->pa_pc, ih);
    138 	psc->psc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, fwohci_filt,
    139 	    &psc->psc_sc);
    140 	if (psc->psc_ih == NULL) {
    141 		aprint_error_dev(self, "couldn't establish interrupt");
    142 		if (intrstr != NULL)
    143 			aprint_error(" at %s", intrstr);
    144 		aprint_error("\n");
    145 		goto fail;
    146 	}
    147 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
    148 
    149 	if (!pmf_device_register(self, fwohci_pci_suspend, fwohci_pci_resume))
    150 		aprint_error_dev(self, "couldn't establish power handler\n");
    151 
    152 	if (fwohci_init(&(psc->psc_sc), psc->psc_sc.fc.dev) != 0) {
    153 		pci_intr_disestablish(pa->pa_pc, psc->psc_ih);
    154 		bus_space_unmap(psc->psc_sc.bst, psc->psc_sc.bsh,
    155 		    psc->psc_sc.bssize);
    156 	}
    157 
    158 	return;
    159 
    160 fail:
    161 	/* In the event that we fail to attach, register a null pnp handler */
    162 	if (!pmf_device_register(self, NULL, NULL))
    163 		aprint_error_dev(self, "couldn't establish power handler\n");
    164 
    165 	return;
    166 }
    167 
    168 static bool
    169 fwohci_pci_suspend(device_t dv PMF_FN_ARGS)
    170 {
    171 	struct fwohci_pci_softc *psc = device_private(dv);
    172 	int s;
    173 
    174 	s = splbio();
    175 	fwohci_stop(&psc->psc_sc, psc->psc_sc.fc.dev);
    176 	splx(s);
    177 
    178 	return true;
    179 }
    180 
    181 static bool
    182 fwohci_pci_resume(device_t dv PMF_FN_ARGS)
    183 {
    184 	struct fwohci_pci_softc *psc = device_private(dv);
    185 	int s;
    186 
    187 	s = splbio();
    188 	fwohci_resume(&psc->psc_sc, psc->psc_sc.fc.dev);
    189 	splx(s);
    190 
    191 	return true;
    192 }
    193