geodeide.c revision 1.1.2.3.2.1
1 1.1.2.3.2.1 riz /* $NetBSD: geodeide.c,v 1.1.2.3.2.1 2005/07/18 03:57:33 riz Exp $ */ 2 1.1.2.2 tron 3 1.1.2.2 tron /* 4 1.1.2.2 tron * Copyright (c) 2004 Manuel Bouyer. 5 1.1.2.2 tron * 6 1.1.2.2 tron * Redistribution and use in source and binary forms, with or without 7 1.1.2.2 tron * modification, are permitted provided that the following conditions 8 1.1.2.2 tron * are met: 9 1.1.2.2 tron * 1. Redistributions of source code must retain the above copyright 10 1.1.2.2 tron * notice, this list of conditions and the following disclaimer. 11 1.1.2.2 tron * 2. Redistributions in binary form must reproduce the above copyright 12 1.1.2.2 tron * notice, this list of conditions and the following disclaimer in the 13 1.1.2.2 tron * documentation and/or other materials provided with the distribution. 14 1.1.2.2 tron * 3. All advertising materials mentioning features or use of this software 15 1.1.2.2 tron * must display the following acknowledgement: 16 1.1.2.2 tron * This product includes software developed by Manuel Bouyer. 17 1.1.2.2 tron * 4. The name of the author may not be used to endorse or promote products 18 1.1.2.2 tron * derived from this software without specific prior written permission. 19 1.1.2.2 tron * 20 1.1.2.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.1.2.2 tron * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.1.2.2 tron * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.1.2.2 tron * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.1.2.2 tron * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.1.2.2 tron * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.1.2.2 tron * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.1.2.2 tron * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.1.2.2 tron * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.1.2.2 tron * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.1.2.2 tron * 31 1.1.2.2 tron */ 32 1.1.2.2 tron 33 1.1.2.2 tron /* 34 1.1.2.3 tron * Driver for the IDE part of the AMD Geode CS5530A companion chip 35 1.1.2.3 tron * and AMD Geode SC1100. 36 1.1.2.2 tron * Docs available from AMD's web site 37 1.1.2.2 tron */ 38 1.1.2.2 tron 39 1.1.2.2 tron #include <sys/cdefs.h> 40 1.1.2.3.2.1 riz __KERNEL_RCSID(0, "$NetBSD: geodeide.c,v 1.1.2.3.2.1 2005/07/18 03:57:33 riz Exp $"); 41 1.1.2.2 tron 42 1.1.2.2 tron #include <sys/param.h> 43 1.1.2.2 tron #include <sys/systm.h> 44 1.1.2.2 tron 45 1.1.2.3 tron #include <uvm/uvm_extern.h> 46 1.1.2.3 tron 47 1.1.2.2 tron #include <dev/pci/pcivar.h> 48 1.1.2.2 tron #include <dev/pci/pcidevs.h> 49 1.1.2.2 tron #include <dev/pci/pciidereg.h> 50 1.1.2.2 tron #include <dev/pci/pciidevar.h> 51 1.1.2.2 tron 52 1.1.2.2 tron #include <dev/pci/pciide_geode_reg.h> 53 1.1.2.2 tron 54 1.1.2.2 tron static void geodeide_chip_map(struct pciide_softc *, 55 1.1.2.2 tron struct pci_attach_args *); 56 1.1.2.2 tron static void geodeide_setup_channel(struct wdc_channel *); 57 1.1.2.3.2.1 riz static int geodeide_dma_init(void *, int, int, void *, size_t, int); 58 1.1.2.2 tron 59 1.1.2.2 tron static int geodeide_match(struct device *, struct cfdata *, void *); 60 1.1.2.2 tron static void geodeide_attach(struct device *, struct device *, void *); 61 1.1.2.2 tron 62 1.1.2.2 tron CFATTACH_DECL(geodeide, sizeof(struct pciide_softc), 63 1.1.2.2 tron geodeide_match, geodeide_attach, NULL, NULL); 64 1.1.2.2 tron 65 1.1.2.2 tron static const struct pciide_product_desc pciide_geode_products[] = { 66 1.1.2.2 tron { PCI_PRODUCT_CYRIX_CX5530_IDE, 67 1.1.2.2 tron 0, 68 1.1.2.2 tron "AMD Geode CX5530 IDE controller", 69 1.1.2.2 tron geodeide_chip_map, 70 1.1.2.2 tron }, 71 1.1.2.3 tron { PCI_PRODUCT_NS_SC1100_IDE, 72 1.1.2.3 tron 0, 73 1.1.2.3 tron "AMD Geode SC1100 IDE controller", 74 1.1.2.3 tron geodeide_chip_map, 75 1.1.2.3 tron }, 76 1.1.2.2 tron { 0, 77 1.1.2.2 tron 0, 78 1.1.2.2 tron NULL, 79 1.1.2.2 tron NULL, 80 1.1.2.2 tron }, 81 1.1.2.2 tron }; 82 1.1.2.2 tron 83 1.1.2.2 tron static int 84 1.1.2.2 tron geodeide_match(struct device *parent, struct cfdata *match, void *aux) 85 1.1.2.2 tron { 86 1.1.2.2 tron struct pci_attach_args *pa = aux; 87 1.1.2.2 tron 88 1.1.2.3 tron if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CYRIX || 89 1.1.2.3 tron PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS) && 90 1.1.2.3 tron PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE && 91 1.1.2.3 tron PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE && 92 1.1.2.3 tron pciide_lookup_product(pa->pa_id, pciide_geode_products)) 93 1.1.2.2 tron return(2); 94 1.1.2.2 tron return (0); 95 1.1.2.2 tron } 96 1.1.2.2 tron 97 1.1.2.2 tron static void 98 1.1.2.2 tron geodeide_attach(struct device *parent, struct device *self, void *aux) 99 1.1.2.2 tron { 100 1.1.2.2 tron struct pci_attach_args *pa = aux; 101 1.1.2.2 tron struct pciide_softc *sc = (void *)self; 102 1.1.2.2 tron 103 1.1.2.2 tron pciide_common_attach(sc, pa, 104 1.1.2.2 tron pciide_lookup_product(pa->pa_id, pciide_geode_products)); 105 1.1.2.2 tron } 106 1.1.2.2 tron 107 1.1.2.2 tron static void 108 1.1.2.2 tron geodeide_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 109 1.1.2.2 tron { 110 1.1.2.2 tron struct pciide_channel *cp; 111 1.1.2.2 tron int channel; 112 1.1.2.2 tron bus_size_t cmdsize, ctlsize; 113 1.1.2.2 tron 114 1.1.2.2 tron if (pciide_chipen(sc, pa) == 0) 115 1.1.2.2 tron return; 116 1.1.2.2 tron 117 1.1.2.2 tron aprint_normal("%s: bus-master DMA support present", 118 1.1.2.2 tron sc->sc_wdcdev.sc_dev.dv_xname); 119 1.1.2.2 tron pciide_mapreg_dma(sc, pa); 120 1.1.2.2 tron aprint_normal("\n"); 121 1.1.2.2 tron if (sc->sc_dma_ok) { 122 1.1.2.2 tron sc->sc_wdcdev.cap = WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA | 123 1.1.2.2 tron WDC_CAPABILITY_IRQACK; 124 1.1.2.2 tron sc->sc_wdcdev.irqack = pciide_irqack; 125 1.1.2.3.2.1 riz /* 126 1.1.2.3.2.1 riz * XXXJRT What chip revisions actually need the DMA 127 1.1.2.3.2.1 riz * alignment work-around? 128 1.1.2.3.2.1 riz */ 129 1.1.2.3.2.1 riz sc->sc_wdcdev.dma_init = geodeide_dma_init; 130 1.1.2.2 tron } 131 1.1.2.2 tron sc->sc_wdcdev.PIO_cap = 4; 132 1.1.2.2 tron sc->sc_wdcdev.DMA_cap = 2; 133 1.1.2.2 tron sc->sc_wdcdev.UDMA_cap = 2; 134 1.1.2.2 tron sc->sc_wdcdev.set_modes = geodeide_setup_channel; 135 1.1.2.2 tron sc->sc_wdcdev.channels = sc->wdc_chanarray; 136 1.1.2.2 tron sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS; 137 1.1.2.2 tron sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 | 138 1.1.2.2 tron WDC_CAPABILITY_MODE; 139 1.1.2.2 tron 140 1.1.2.3 tron /* 141 1.1.2.3 tron * Soekris Engineering Issue #0003: 142 1.1.2.3 tron * "The SC1100 built in busmaster IDE controller is pretty 143 1.1.2.3 tron * standard, but have two bugs: data transfers need to be 144 1.1.2.3 tron * dword aligned and it cannot do an exact 64Kbyte data 145 1.1.2.3 tron * transfer." 146 1.1.2.3 tron */ 147 1.1.2.3 tron if (sc->sc_pp->ide_product == PCI_PRODUCT_NS_SC1100_IDE) { 148 1.1.2.3 tron if (sc->sc_dma_boundary == 0x10000) 149 1.1.2.3 tron sc->sc_dma_boundary -= PAGE_SIZE; 150 1.1.2.3 tron 151 1.1.2.3 tron if (sc->sc_dma_maxsegsz == 0x10000) 152 1.1.2.3 tron sc->sc_dma_maxsegsz -= PAGE_SIZE; 153 1.1.2.3 tron } 154 1.1.2.3 tron 155 1.1.2.2 tron for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) { 156 1.1.2.2 tron cp = &sc->pciide_channels[channel]; 157 1.1.2.2 tron /* controller is compat-only */ 158 1.1.2.2 tron if (pciide_chansetup(sc, channel, 0) == 0) 159 1.1.2.2 tron continue; 160 1.1.2.2 tron pciide_mapchan(pa, cp, 0, &cmdsize, &ctlsize, pciide_pci_intr); 161 1.1.2.2 tron } 162 1.1.2.2 tron } 163 1.1.2.2 tron 164 1.1.2.2 tron static void 165 1.1.2.2 tron geodeide_setup_channel(struct wdc_channel *chp) 166 1.1.2.2 tron { 167 1.1.2.2 tron struct ata_drive_datas *drvp; 168 1.1.2.2 tron struct pciide_channel *cp = (struct pciide_channel*)chp; 169 1.1.2.2 tron struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.ch_wdc; 170 1.1.2.2 tron int channel = chp->ch_channel; 171 1.1.2.2 tron int drive; 172 1.1.2.2 tron u_int32_t dma_timing; 173 1.1.2.2 tron u_int8_t idedma_ctl; 174 1.1.2.3 tron const int32_t *geode_pio; 175 1.1.2.3 tron const int32_t *geode_dma; 176 1.1.2.3 tron const int32_t *geode_udma; 177 1.1.2.3 tron bus_size_t dmaoff, piooff; 178 1.1.2.3 tron 179 1.1.2.3 tron switch (sc->sc_pp->ide_product) { 180 1.1.2.3 tron case PCI_PRODUCT_CYRIX_CX5530_IDE: 181 1.1.2.3 tron geode_pio = geode_cs5530_pio; 182 1.1.2.3 tron geode_dma = geode_cs5530_dma; 183 1.1.2.3 tron geode_udma = geode_cs5530_udma; 184 1.1.2.3 tron break; 185 1.1.2.3 tron 186 1.1.2.3 tron case PCI_PRODUCT_NS_SC1100_IDE: 187 1.1.2.3 tron default: /* XXX gcc */ 188 1.1.2.3 tron geode_pio = geode_sc1100_pio; 189 1.1.2.3 tron geode_dma = geode_sc1100_dma; 190 1.1.2.3 tron geode_udma = geode_sc1100_udma; 191 1.1.2.3 tron break; 192 1.1.2.3 tron } 193 1.1.2.2 tron 194 1.1.2.2 tron /* setup DMA if needed */ 195 1.1.2.2 tron pciide_channel_dma_setup(cp); 196 1.1.2.2 tron 197 1.1.2.2 tron idedma_ctl = 0; 198 1.1.2.2 tron 199 1.1.2.2 tron /* Per drive settings */ 200 1.1.2.2 tron for (drive = 0; drive < 2; drive++) { 201 1.1.2.2 tron drvp = &chp->ch_drive[drive]; 202 1.1.2.2 tron /* If no drive, skip */ 203 1.1.2.2 tron if ((drvp->drive_flags & DRIVE) == 0) 204 1.1.2.2 tron continue; 205 1.1.2.3 tron 206 1.1.2.3 tron switch (sc->sc_pp->ide_product) { 207 1.1.2.3 tron case PCI_PRODUCT_CYRIX_CX5530_IDE: 208 1.1.2.3 tron dmaoff = CS5530_DMA_REG(channel, drive); 209 1.1.2.3 tron piooff = CS5530_PIO_REG(channel, drive); 210 1.1.2.3 tron dma_timing = CS5530_DMA_REG_PIO_FORMAT; 211 1.1.2.3 tron break; 212 1.1.2.3 tron 213 1.1.2.3 tron case PCI_PRODUCT_NS_SC1100_IDE: 214 1.1.2.3 tron default: /* XXX gcc */ 215 1.1.2.3 tron dmaoff = SC1100_DMA_REG(channel, drive); 216 1.1.2.3 tron piooff = SC1100_PIO_REG(channel, drive); 217 1.1.2.3 tron dma_timing = 0; 218 1.1.2.3 tron break; 219 1.1.2.3 tron } 220 1.1.2.3 tron 221 1.1.2.2 tron /* add timing values, setup DMA if needed */ 222 1.1.2.2 tron if (drvp->drive_flags & DRIVE_UDMA) { 223 1.1.2.2 tron /* Use Ultra-DMA */ 224 1.1.2.2 tron dma_timing |= geode_udma[drvp->UDMA_mode]; 225 1.1.2.2 tron idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 226 1.1.2.2 tron } else if (drvp->drive_flags & DRIVE_DMA) { 227 1.1.2.2 tron /* use Multiword DMA */ 228 1.1.2.2 tron dma_timing |= geode_dma[drvp->DMA_mode]; 229 1.1.2.2 tron idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 230 1.1.2.2 tron } else { 231 1.1.2.2 tron /* PIO only */ 232 1.1.2.2 tron drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA); 233 1.1.2.2 tron } 234 1.1.2.3 tron 235 1.1.2.3 tron switch (sc->sc_pp->ide_product) { 236 1.1.2.3 tron case PCI_PRODUCT_CYRIX_CX5530_IDE: 237 1.1.2.3 tron bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh, 238 1.1.2.3 tron dmaoff, dma_timing); 239 1.1.2.3 tron bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh, 240 1.1.2.3 tron piooff, geode_pio[drvp->PIO_mode]); 241 1.1.2.3 tron break; 242 1.1.2.3 tron 243 1.1.2.3 tron case PCI_PRODUCT_NS_SC1100_IDE: 244 1.1.2.3 tron pci_conf_write(sc->sc_pc, sc->sc_tag, dmaoff, 245 1.1.2.3 tron dma_timing); 246 1.1.2.3 tron pci_conf_write(sc->sc_pc, sc->sc_tag, piooff, 247 1.1.2.3 tron geode_pio[drvp->PIO_mode]); 248 1.1.2.3 tron break; 249 1.1.2.3 tron } 250 1.1.2.2 tron } 251 1.1.2.2 tron 252 1.1.2.2 tron if (idedma_ctl != 0) { 253 1.1.2.2 tron /* Add software bits in status register */ 254 1.1.2.2 tron bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0, 255 1.1.2.2 tron idedma_ctl); 256 1.1.2.2 tron } 257 1.1.2.2 tron } 258 1.1.2.3.2.1 riz 259 1.1.2.3.2.1 riz static int 260 1.1.2.3.2.1 riz geodeide_dma_init(void *v, int channel, int drive, void *databuf, 261 1.1.2.3.2.1 riz size_t datalen, int flags) 262 1.1.2.3.2.1 riz { 263 1.1.2.3.2.1 riz 264 1.1.2.3.2.1 riz /* 265 1.1.2.3.2.1 riz * If the buffer is not properly aligned, we can't allow DMA 266 1.1.2.3.2.1 riz * and need to fall back to PIO. 267 1.1.2.3.2.1 riz */ 268 1.1.2.3.2.1 riz if (((uintptr_t)databuf) & 0xf) 269 1.1.2.3.2.1 riz return (EINVAL); 270 1.1.2.3.2.1 riz 271 1.1.2.3.2.1 riz return (pciide_dma_init(v, channel, drive, databuf, datalen, flags)); 272 1.1.2.3.2.1 riz } 273
Indexes created Fri Oct 03 02:09:57 GMT 2025