geodeide.c revision 1.2.2.2
1 1.2.2.2 skrll /* $NetBSD: geodeide.c,v 1.2.2.2 2004/08/03 10:49:07 skrll Exp $ */ 2 1.2.2.2 skrll 3 1.2.2.2 skrll /* 4 1.2.2.2 skrll * Copyright (c) 2004 Manuel Bouyer. 5 1.2.2.2 skrll * 6 1.2.2.2 skrll * Redistribution and use in source and binary forms, with or without 7 1.2.2.2 skrll * modification, are permitted provided that the following conditions 8 1.2.2.2 skrll * are met: 9 1.2.2.2 skrll * 1. Redistributions of source code must retain the above copyright 10 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer. 11 1.2.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer in the 13 1.2.2.2 skrll * documentation and/or other materials provided with the distribution. 14 1.2.2.2 skrll * 3. All advertising materials mentioning features or use of this software 15 1.2.2.2 skrll * must display the following acknowledgement: 16 1.2.2.2 skrll * This product includes software developed by Manuel Bouyer. 17 1.2.2.2 skrll * 4. The name of the author may not be used to endorse or promote products 18 1.2.2.2 skrll * derived from this software without specific prior written permission. 19 1.2.2.2 skrll * 20 1.2.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.2.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.2.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.2.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.2.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.2.2.2 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.2.2.2 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.2.2.2 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.2.2.2 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.2.2.2 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.2.2.2 skrll * 31 1.2.2.2 skrll */ 32 1.2.2.2 skrll 33 1.2.2.2 skrll /* 34 1.2.2.2 skrll * Driver for the IDE part of the AMD Geode CS5530A compagnion chip 35 1.2.2.2 skrll * Docs available from AMD's web site 36 1.2.2.2 skrll */ 37 1.2.2.2 skrll 38 1.2.2.2 skrll #include <sys/cdefs.h> 39 1.2.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: geodeide.c,v 1.2.2.2 2004/08/03 10:49:07 skrll Exp $"); 40 1.2.2.2 skrll 41 1.2.2.2 skrll #include <sys/param.h> 42 1.2.2.2 skrll #include <sys/systm.h> 43 1.2.2.2 skrll 44 1.2.2.2 skrll #include <dev/pci/pcivar.h> 45 1.2.2.2 skrll #include <dev/pci/pcidevs.h> 46 1.2.2.2 skrll #include <dev/pci/pciidereg.h> 47 1.2.2.2 skrll #include <dev/pci/pciidevar.h> 48 1.2.2.2 skrll 49 1.2.2.2 skrll #include <dev/pci/pciide_geode_reg.h> 50 1.2.2.2 skrll 51 1.2.2.2 skrll static void geodeide_chip_map(struct pciide_softc *, 52 1.2.2.2 skrll struct pci_attach_args *); 53 1.2.2.2 skrll static void geodeide_setup_channel(struct wdc_channel *); 54 1.2.2.2 skrll 55 1.2.2.2 skrll static int geodeide_match(struct device *, struct cfdata *, void *); 56 1.2.2.2 skrll static void geodeide_attach(struct device *, struct device *, void *); 57 1.2.2.2 skrll 58 1.2.2.2 skrll CFATTACH_DECL(geodeide, sizeof(struct pciide_softc), 59 1.2.2.2 skrll geodeide_match, geodeide_attach, NULL, NULL); 60 1.2.2.2 skrll 61 1.2.2.2 skrll static const struct pciide_product_desc pciide_geode_products[] = { 62 1.2.2.2 skrll { PCI_PRODUCT_CYRIX_CX5530_IDE, 63 1.2.2.2 skrll 0, 64 1.2.2.2 skrll "AMD Geode CX5530 IDE controller", 65 1.2.2.2 skrll geodeide_chip_map, 66 1.2.2.2 skrll }, 67 1.2.2.2 skrll { 0, 68 1.2.2.2 skrll 0, 69 1.2.2.2 skrll NULL, 70 1.2.2.2 skrll NULL, 71 1.2.2.2 skrll }, 72 1.2.2.2 skrll }; 73 1.2.2.2 skrll 74 1.2.2.2 skrll static int 75 1.2.2.2 skrll geodeide_match(struct device *parent, struct cfdata *match, void *aux) 76 1.2.2.2 skrll { 77 1.2.2.2 skrll struct pci_attach_args *pa = aux; 78 1.2.2.2 skrll 79 1.2.2.2 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CYRIX && 80 1.2.2.2 skrll PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE && 81 1.2.2.2 skrll PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE && 82 1.2.2.2 skrll pciide_lookup_product(pa->pa_id, pciide_geode_products)) 83 1.2.2.2 skrll return(2); 84 1.2.2.2 skrll return (0); 85 1.2.2.2 skrll } 86 1.2.2.2 skrll 87 1.2.2.2 skrll static void 88 1.2.2.2 skrll geodeide_attach(struct device *parent, struct device *self, void *aux) 89 1.2.2.2 skrll { 90 1.2.2.2 skrll struct pci_attach_args *pa = aux; 91 1.2.2.2 skrll struct pciide_softc *sc = (void *)self; 92 1.2.2.2 skrll 93 1.2.2.2 skrll pciide_common_attach(sc, pa, 94 1.2.2.2 skrll pciide_lookup_product(pa->pa_id, pciide_geode_products)); 95 1.2.2.2 skrll } 96 1.2.2.2 skrll 97 1.2.2.2 skrll static void 98 1.2.2.2 skrll geodeide_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 99 1.2.2.2 skrll { 100 1.2.2.2 skrll struct pciide_channel *cp; 101 1.2.2.2 skrll int channel; 102 1.2.2.2 skrll bus_size_t cmdsize, ctlsize; 103 1.2.2.2 skrll 104 1.2.2.2 skrll if (pciide_chipen(sc, pa) == 0) 105 1.2.2.2 skrll return; 106 1.2.2.2 skrll 107 1.2.2.2 skrll aprint_normal("%s: bus-master DMA support present", 108 1.2.2.2 skrll sc->sc_wdcdev.sc_dev.dv_xname); 109 1.2.2.2 skrll pciide_mapreg_dma(sc, pa); 110 1.2.2.2 skrll aprint_normal("\n"); 111 1.2.2.2 skrll if (sc->sc_dma_ok) { 112 1.2.2.2 skrll sc->sc_wdcdev.cap = WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA | 113 1.2.2.2 skrll WDC_CAPABILITY_IRQACK; 114 1.2.2.2 skrll sc->sc_wdcdev.irqack = pciide_irqack; 115 1.2.2.2 skrll } 116 1.2.2.2 skrll sc->sc_wdcdev.PIO_cap = 4; 117 1.2.2.2 skrll sc->sc_wdcdev.DMA_cap = 2; 118 1.2.2.2 skrll sc->sc_wdcdev.UDMA_cap = 2; 119 1.2.2.2 skrll sc->sc_wdcdev.set_modes = geodeide_setup_channel; 120 1.2.2.2 skrll sc->sc_wdcdev.channels = sc->wdc_chanarray; 121 1.2.2.2 skrll sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS; 122 1.2.2.2 skrll sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 | 123 1.2.2.2 skrll WDC_CAPABILITY_MODE; 124 1.2.2.2 skrll 125 1.2.2.2 skrll for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) { 126 1.2.2.2 skrll cp = &sc->pciide_channels[channel]; 127 1.2.2.2 skrll /* controller is compat-only */ 128 1.2.2.2 skrll if (pciide_chansetup(sc, channel, 0) == 0) 129 1.2.2.2 skrll continue; 130 1.2.2.2 skrll pciide_mapchan(pa, cp, 0, &cmdsize, &ctlsize, pciide_pci_intr); 131 1.2.2.2 skrll } 132 1.2.2.2 skrll } 133 1.2.2.2 skrll 134 1.2.2.2 skrll static void 135 1.2.2.2 skrll geodeide_setup_channel(struct wdc_channel *chp) 136 1.2.2.2 skrll { 137 1.2.2.2 skrll struct ata_drive_datas *drvp; 138 1.2.2.2 skrll struct pciide_channel *cp = (struct pciide_channel*)chp; 139 1.2.2.2 skrll struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.ch_wdc; 140 1.2.2.2 skrll int channel = chp->ch_channel; 141 1.2.2.2 skrll int drive; 142 1.2.2.2 skrll u_int32_t dma_timing; 143 1.2.2.2 skrll u_int8_t idedma_ctl; 144 1.2.2.2 skrll 145 1.2.2.2 skrll /* setup DMA if needed */ 146 1.2.2.2 skrll pciide_channel_dma_setup(cp); 147 1.2.2.2 skrll 148 1.2.2.2 skrll idedma_ctl = 0; 149 1.2.2.2 skrll 150 1.2.2.2 skrll /* Per drive settings */ 151 1.2.2.2 skrll for (drive = 0; drive < 2; drive++) { 152 1.2.2.2 skrll drvp = &chp->ch_drive[drive]; 153 1.2.2.2 skrll /* If no drive, skip */ 154 1.2.2.2 skrll if ((drvp->drive_flags & DRIVE) == 0) 155 1.2.2.2 skrll continue; 156 1.2.2.2 skrll dma_timing = DMA_REG_PIO_FORMAT; 157 1.2.2.2 skrll /* add timing values, setup DMA if needed */ 158 1.2.2.2 skrll if (drvp->drive_flags & DRIVE_UDMA) { 159 1.2.2.2 skrll /* Use Ultra-DMA */ 160 1.2.2.2 skrll dma_timing |= geode_udma[drvp->UDMA_mode]; 161 1.2.2.2 skrll idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 162 1.2.2.2 skrll } else if (drvp->drive_flags & DRIVE_DMA) { 163 1.2.2.2 skrll /* use Multiword DMA */ 164 1.2.2.2 skrll dma_timing |= geode_dma[drvp->DMA_mode]; 165 1.2.2.2 skrll idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 166 1.2.2.2 skrll } else { 167 1.2.2.2 skrll /* PIO only */ 168 1.2.2.2 skrll drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA); 169 1.2.2.2 skrll } 170 1.2.2.2 skrll bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh, 171 1.2.2.2 skrll DMA_REG(channel, drive), dma_timing); 172 1.2.2.2 skrll bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh, 173 1.2.2.2 skrll PIO_REG(channel, drive), geode_pio[drvp->PIO_mode]); 174 1.2.2.2 skrll } 175 1.2.2.2 skrll 176 1.2.2.2 skrll if (idedma_ctl != 0) { 177 1.2.2.2 skrll /* Add software bits in status register */ 178 1.2.2.2 skrll bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0, 179 1.2.2.2 skrll idedma_ctl); 180 1.2.2.2 skrll } 181 1.2.2.2 skrll } 182
Indexes created Fri Oct 03 02:09:57 GMT 2025