geodeide.c revision 1.2.2.8
1 1.2.2.8 skrll /* $NetBSD: geodeide.c,v 1.2.2.8 2005/11/10 14:06:01 skrll Exp $ */ 2 1.2.2.2 skrll 3 1.2.2.2 skrll /* 4 1.2.2.2 skrll * Copyright (c) 2004 Manuel Bouyer. 5 1.2.2.2 skrll * 6 1.2.2.2 skrll * Redistribution and use in source and binary forms, with or without 7 1.2.2.2 skrll * modification, are permitted provided that the following conditions 8 1.2.2.2 skrll * are met: 9 1.2.2.2 skrll * 1. Redistributions of source code must retain the above copyright 10 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer. 11 1.2.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer in the 13 1.2.2.2 skrll * documentation and/or other materials provided with the distribution. 14 1.2.2.2 skrll * 3. All advertising materials mentioning features or use of this software 15 1.2.2.2 skrll * must display the following acknowledgement: 16 1.2.2.2 skrll * This product includes software developed by Manuel Bouyer. 17 1.2.2.2 skrll * 4. The name of the author may not be used to endorse or promote products 18 1.2.2.2 skrll * derived from this software without specific prior written permission. 19 1.2.2.2 skrll * 20 1.2.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.2.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.2.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.2.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.2.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.2.2.2 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.2.2.2 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.2.2.2 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.2.2.2 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.2.2.2 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.2.2.2 skrll * 31 1.2.2.2 skrll */ 32 1.2.2.2 skrll 33 1.2.2.2 skrll /* 34 1.2.2.3 skrll * Driver for the IDE part of the AMD Geode CS5530A companion chip 35 1.2.2.3 skrll * and AMD Geode SC1100. 36 1.2.2.2 skrll * Docs available from AMD's web site 37 1.2.2.2 skrll */ 38 1.2.2.2 skrll 39 1.2.2.2 skrll #include <sys/cdefs.h> 40 1.2.2.8 skrll __KERNEL_RCSID(0, "$NetBSD: geodeide.c,v 1.2.2.8 2005/11/10 14:06:01 skrll Exp $"); 41 1.2.2.2 skrll 42 1.2.2.2 skrll #include <sys/param.h> 43 1.2.2.2 skrll #include <sys/systm.h> 44 1.2.2.2 skrll 45 1.2.2.3 skrll #include <uvm/uvm_extern.h> 46 1.2.2.3 skrll 47 1.2.2.2 skrll #include <dev/pci/pcivar.h> 48 1.2.2.2 skrll #include <dev/pci/pcidevs.h> 49 1.2.2.2 skrll #include <dev/pci/pciidereg.h> 50 1.2.2.2 skrll #include <dev/pci/pciidevar.h> 51 1.2.2.2 skrll 52 1.2.2.2 skrll #include <dev/pci/pciide_geode_reg.h> 53 1.2.2.2 skrll 54 1.2.2.2 skrll static void geodeide_chip_map(struct pciide_softc *, 55 1.2.2.2 skrll struct pci_attach_args *); 56 1.2.2.4 skrll static void geodeide_setup_channel(struct ata_channel *); 57 1.2.2.8 skrll static int geodeide_dma_init(void *, int, int, void *, size_t, int); 58 1.2.2.2 skrll 59 1.2.2.2 skrll static int geodeide_match(struct device *, struct cfdata *, void *); 60 1.2.2.2 skrll static void geodeide_attach(struct device *, struct device *, void *); 61 1.2.2.2 skrll 62 1.2.2.2 skrll CFATTACH_DECL(geodeide, sizeof(struct pciide_softc), 63 1.2.2.2 skrll geodeide_match, geodeide_attach, NULL, NULL); 64 1.2.2.2 skrll 65 1.2.2.2 skrll static const struct pciide_product_desc pciide_geode_products[] = { 66 1.2.2.2 skrll { PCI_PRODUCT_CYRIX_CX5530_IDE, 67 1.2.2.2 skrll 0, 68 1.2.2.2 skrll "AMD Geode CX5530 IDE controller", 69 1.2.2.2 skrll geodeide_chip_map, 70 1.2.2.2 skrll }, 71 1.2.2.3 skrll { PCI_PRODUCT_NS_SC1100_IDE, 72 1.2.2.3 skrll 0, 73 1.2.2.3 skrll "AMD Geode SC1100 IDE controller", 74 1.2.2.3 skrll geodeide_chip_map, 75 1.2.2.3 skrll }, 76 1.2.2.2 skrll { 0, 77 1.2.2.2 skrll 0, 78 1.2.2.2 skrll NULL, 79 1.2.2.2 skrll NULL, 80 1.2.2.2 skrll }, 81 1.2.2.2 skrll }; 82 1.2.2.2 skrll 83 1.2.2.2 skrll static int 84 1.2.2.2 skrll geodeide_match(struct device *parent, struct cfdata *match, void *aux) 85 1.2.2.2 skrll { 86 1.2.2.2 skrll struct pci_attach_args *pa = aux; 87 1.2.2.2 skrll 88 1.2.2.3 skrll if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CYRIX || 89 1.2.2.3 skrll PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS) && 90 1.2.2.3 skrll PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE && 91 1.2.2.3 skrll PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE && 92 1.2.2.7 skrll pciide_lookup_product(pa->pa_id, pciide_geode_products)) 93 1.2.2.2 skrll return(2); 94 1.2.2.2 skrll return (0); 95 1.2.2.2 skrll } 96 1.2.2.2 skrll 97 1.2.2.2 skrll static void 98 1.2.2.2 skrll geodeide_attach(struct device *parent, struct device *self, void *aux) 99 1.2.2.2 skrll { 100 1.2.2.2 skrll struct pci_attach_args *pa = aux; 101 1.2.2.2 skrll struct pciide_softc *sc = (void *)self; 102 1.2.2.2 skrll 103 1.2.2.2 skrll pciide_common_attach(sc, pa, 104 1.2.2.2 skrll pciide_lookup_product(pa->pa_id, pciide_geode_products)); 105 1.2.2.2 skrll } 106 1.2.2.2 skrll 107 1.2.2.2 skrll static void 108 1.2.2.2 skrll geodeide_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 109 1.2.2.2 skrll { 110 1.2.2.2 skrll struct pciide_channel *cp; 111 1.2.2.2 skrll int channel; 112 1.2.2.2 skrll bus_size_t cmdsize, ctlsize; 113 1.2.2.2 skrll 114 1.2.2.2 skrll if (pciide_chipen(sc, pa) == 0) 115 1.2.2.2 skrll return; 116 1.2.2.2 skrll 117 1.2.2.2 skrll aprint_normal("%s: bus-master DMA support present", 118 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 119 1.2.2.2 skrll pciide_mapreg_dma(sc, pa); 120 1.2.2.2 skrll aprint_normal("\n"); 121 1.2.2.2 skrll if (sc->sc_dma_ok) { 122 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA; 123 1.2.2.2 skrll sc->sc_wdcdev.irqack = pciide_irqack; 124 1.2.2.8 skrll /* 125 1.2.2.8 skrll * XXXJRT What chip revisions actually need the DMA 126 1.2.2.8 skrll * alignment work-around? 127 1.2.2.8 skrll */ 128 1.2.2.8 skrll sc->sc_wdcdev.dma_init = geodeide_dma_init; 129 1.2.2.2 skrll } 130 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 131 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 132 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; 133 1.2.2.8 skrll /* 134 1.2.2.8 skrll * The 5530 is utterly swamped by UDMA mode 2, so limit to mode 1 135 1.2.2.8 skrll * so that the chip is able to perform the other functions it has 136 1.2.2.8 skrll * while IDE UDMA is going on. 137 1.2.2.8 skrll */ 138 1.2.2.8 skrll if (sc->sc_pp->ide_product == PCI_PRODUCT_CYRIX_CX5530_IDE) { 139 1.2.2.8 skrll sc->sc_wdcdev.sc_atac.atac_udma_cap = 1; 140 1.2.2.8 skrll } 141 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_set_modes = geodeide_setup_channel; 142 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 143 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 144 1.2.2.4 skrll sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 145 1.2.2.2 skrll 146 1.2.2.3 skrll /* 147 1.2.2.3 skrll * Soekris Engineering Issue #0003: 148 1.2.2.3 skrll * "The SC1100 built in busmaster IDE controller is pretty 149 1.2.2.3 skrll * standard, but have two bugs: data transfers need to be 150 1.2.2.3 skrll * dword aligned and it cannot do an exact 64Kbyte data 151 1.2.2.3 skrll * transfer." 152 1.2.2.3 skrll */ 153 1.2.2.3 skrll if (sc->sc_pp->ide_product == PCI_PRODUCT_NS_SC1100_IDE) { 154 1.2.2.3 skrll if (sc->sc_dma_boundary == 0x10000) 155 1.2.2.3 skrll sc->sc_dma_boundary -= PAGE_SIZE; 156 1.2.2.3 skrll 157 1.2.2.3 skrll if (sc->sc_dma_maxsegsz == 0x10000) 158 1.2.2.3 skrll sc->sc_dma_maxsegsz -= PAGE_SIZE; 159 1.2.2.3 skrll } 160 1.2.2.3 skrll 161 1.2.2.4 skrll wdc_allocate_regs(&sc->sc_wdcdev); 162 1.2.2.4 skrll 163 1.2.2.4 skrll for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 164 1.2.2.4 skrll channel++) { 165 1.2.2.2 skrll cp = &sc->pciide_channels[channel]; 166 1.2.2.2 skrll /* controller is compat-only */ 167 1.2.2.2 skrll if (pciide_chansetup(sc, channel, 0) == 0) 168 1.2.2.2 skrll continue; 169 1.2.2.2 skrll pciide_mapchan(pa, cp, 0, &cmdsize, &ctlsize, pciide_pci_intr); 170 1.2.2.2 skrll } 171 1.2.2.2 skrll } 172 1.2.2.2 skrll 173 1.2.2.2 skrll static void 174 1.2.2.4 skrll geodeide_setup_channel(struct ata_channel *chp) 175 1.2.2.2 skrll { 176 1.2.2.2 skrll struct ata_drive_datas *drvp; 177 1.2.2.4 skrll struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 178 1.2.2.4 skrll struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 179 1.2.2.2 skrll int channel = chp->ch_channel; 180 1.2.2.4 skrll int drive, s; 181 1.2.2.2 skrll u_int32_t dma_timing; 182 1.2.2.2 skrll u_int8_t idedma_ctl; 183 1.2.2.3 skrll const int32_t *geode_pio; 184 1.2.2.3 skrll const int32_t *geode_dma; 185 1.2.2.3 skrll const int32_t *geode_udma; 186 1.2.2.3 skrll bus_size_t dmaoff, piooff; 187 1.2.2.3 skrll 188 1.2.2.3 skrll switch (sc->sc_pp->ide_product) { 189 1.2.2.3 skrll case PCI_PRODUCT_CYRIX_CX5530_IDE: 190 1.2.2.3 skrll geode_pio = geode_cs5530_pio; 191 1.2.2.3 skrll geode_dma = geode_cs5530_dma; 192 1.2.2.3 skrll geode_udma = geode_cs5530_udma; 193 1.2.2.3 skrll break; 194 1.2.2.3 skrll 195 1.2.2.3 skrll case PCI_PRODUCT_NS_SC1100_IDE: 196 1.2.2.3 skrll default: /* XXX gcc */ 197 1.2.2.3 skrll geode_pio = geode_sc1100_pio; 198 1.2.2.3 skrll geode_dma = geode_sc1100_dma; 199 1.2.2.3 skrll geode_udma = geode_sc1100_udma; 200 1.2.2.3 skrll break; 201 1.2.2.3 skrll } 202 1.2.2.2 skrll 203 1.2.2.2 skrll /* setup DMA if needed */ 204 1.2.2.2 skrll pciide_channel_dma_setup(cp); 205 1.2.2.2 skrll 206 1.2.2.2 skrll idedma_ctl = 0; 207 1.2.2.2 skrll 208 1.2.2.2 skrll /* Per drive settings */ 209 1.2.2.2 skrll for (drive = 0; drive < 2; drive++) { 210 1.2.2.2 skrll drvp = &chp->ch_drive[drive]; 211 1.2.2.2 skrll /* If no drive, skip */ 212 1.2.2.2 skrll if ((drvp->drive_flags & DRIVE) == 0) 213 1.2.2.2 skrll continue; 214 1.2.2.3 skrll 215 1.2.2.3 skrll switch (sc->sc_pp->ide_product) { 216 1.2.2.3 skrll case PCI_PRODUCT_CYRIX_CX5530_IDE: 217 1.2.2.3 skrll dmaoff = CS5530_DMA_REG(channel, drive); 218 1.2.2.3 skrll piooff = CS5530_PIO_REG(channel, drive); 219 1.2.2.3 skrll dma_timing = CS5530_DMA_REG_PIO_FORMAT; 220 1.2.2.3 skrll break; 221 1.2.2.3 skrll 222 1.2.2.3 skrll case PCI_PRODUCT_NS_SC1100_IDE: 223 1.2.2.3 skrll default: /* XXX gcc */ 224 1.2.2.3 skrll dmaoff = SC1100_DMA_REG(channel, drive); 225 1.2.2.3 skrll piooff = SC1100_PIO_REG(channel, drive); 226 1.2.2.3 skrll dma_timing = 0; 227 1.2.2.3 skrll break; 228 1.2.2.3 skrll } 229 1.2.2.3 skrll 230 1.2.2.2 skrll /* add timing values, setup DMA if needed */ 231 1.2.2.2 skrll if (drvp->drive_flags & DRIVE_UDMA) { 232 1.2.2.2 skrll /* Use Ultra-DMA */ 233 1.2.2.2 skrll dma_timing |= geode_udma[drvp->UDMA_mode]; 234 1.2.2.2 skrll idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 235 1.2.2.2 skrll } else if (drvp->drive_flags & DRIVE_DMA) { 236 1.2.2.2 skrll /* use Multiword DMA */ 237 1.2.2.2 skrll dma_timing |= geode_dma[drvp->DMA_mode]; 238 1.2.2.2 skrll idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 239 1.2.2.2 skrll } else { 240 1.2.2.2 skrll /* PIO only */ 241 1.2.2.4 skrll s = splbio(); 242 1.2.2.2 skrll drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA); 243 1.2.2.4 skrll splx(s); 244 1.2.2.2 skrll } 245 1.2.2.3 skrll 246 1.2.2.3 skrll switch (sc->sc_pp->ide_product) { 247 1.2.2.3 skrll case PCI_PRODUCT_CYRIX_CX5530_IDE: 248 1.2.2.3 skrll bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh, 249 1.2.2.3 skrll dmaoff, dma_timing); 250 1.2.2.3 skrll bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh, 251 1.2.2.3 skrll piooff, geode_pio[drvp->PIO_mode]); 252 1.2.2.3 skrll break; 253 1.2.2.3 skrll 254 1.2.2.3 skrll case PCI_PRODUCT_NS_SC1100_IDE: 255 1.2.2.3 skrll pci_conf_write(sc->sc_pc, sc->sc_tag, dmaoff, 256 1.2.2.3 skrll dma_timing); 257 1.2.2.3 skrll pci_conf_write(sc->sc_pc, sc->sc_tag, piooff, 258 1.2.2.3 skrll geode_pio[drvp->PIO_mode]); 259 1.2.2.3 skrll break; 260 1.2.2.3 skrll } 261 1.2.2.2 skrll } 262 1.2.2.2 skrll 263 1.2.2.2 skrll if (idedma_ctl != 0) { 264 1.2.2.2 skrll /* Add software bits in status register */ 265 1.2.2.2 skrll bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0, 266 1.2.2.2 skrll idedma_ctl); 267 1.2.2.2 skrll } 268 1.2.2.2 skrll } 269 1.2.2.8 skrll 270 1.2.2.8 skrll static int 271 1.2.2.8 skrll geodeide_dma_init(void *v, int channel, int drive, void *databuf, 272 1.2.2.8 skrll size_t datalen, int flags) 273 1.2.2.8 skrll { 274 1.2.2.8 skrll 275 1.2.2.8 skrll /* 276 1.2.2.8 skrll * If the buffer is not properly aligned, we can't allow DMA 277 1.2.2.8 skrll * and need to fall back to PIO. 278 1.2.2.8 skrll */ 279 1.2.2.8 skrll if (((uintptr_t)databuf) & 0xf) 280 1.2.2.8 skrll return (EINVAL); 281 1.2.2.8 skrll 282 1.2.2.8 skrll return (pciide_dma_init(v, channel, drive, databuf, datalen, flags)); 283 1.2.2.8 skrll } 284
Indexes created Fri Oct 03 02:09:57 GMT 2025