gffb.c revision 1.12
1 /* $NetBSD: gffb.c,v 1.12 2017/01/20 12:25:07 maya Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far, should work on other hardware as long as 31 * something sets up a usable graphics mode and sets the right device properties 32 * This driver should work with all NV1x hardware but so far it's been tested 33 * only on NV11 / GeForce2 MX. Needs testing with more hardware and if 34 * successful, PCI IDs need to be added to gffb_match() 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.12 2017/01/20 12:25:07 maya Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/malloc.h> 45 #include <sys/lwp.h> 46 #include <sys/kauth.h> 47 #include <sys/atomic.h> 48 49 #include <dev/videomode/videomode.h> 50 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pcireg.h> 53 #include <dev/pci/pcidevs.h> 54 #include <dev/pci/pciio.h> 55 #include <dev/pci/gffbreg.h> 56 57 #include <dev/wscons/wsdisplayvar.h> 58 #include <dev/wscons/wsconsio.h> 59 #include <dev/wsfont/wsfont.h> 60 #include <dev/rasops/rasops.h> 61 #include <dev/wscons/wsdisplay_vconsvar.h> 62 #include <dev/pci/wsdisplay_pci.h> 63 #include <dev/wscons/wsdisplay_glyphcachevar.h> 64 65 #include <dev/i2c/i2cvar.h> 66 67 #include "opt_gffb.h" 68 #include "opt_vcons.h" 69 70 #ifdef GFFB_DEBUG 71 #define DPRINTF printf 72 #else 73 #define DPRINTF while(0) printf 74 #endif 75 76 struct gffb_softc { 77 device_t sc_dev; 78 79 pci_chipset_tag_t sc_pc; 80 pcitag_t sc_pcitag; 81 82 bus_space_tag_t sc_memt; 83 bus_space_tag_t sc_iot; 84 85 bus_space_handle_t sc_regh, sc_fbh; 86 bus_addr_t sc_fb, sc_reg; 87 bus_size_t sc_fbsize, sc_regsize; 88 uint8_t *sc_fbaddr; 89 size_t sc_vramsize; 90 91 int sc_width, sc_height, sc_depth, sc_stride; 92 int sc_locked; 93 struct vcons_screen sc_console_screen; 94 struct wsscreen_descr sc_defaultscreen_descr; 95 const struct wsscreen_descr *sc_screens[1]; 96 struct wsscreen_list sc_screenlist; 97 struct vcons_data vd; 98 int sc_mode; 99 u_char sc_cmap_red[256]; 100 u_char sc_cmap_green[256]; 101 u_char sc_cmap_blue[256]; 102 int sc_put, sc_current, sc_free; 103 uint32_t sc_rop; 104 void (*sc_putchar)(void *, int, int, u_int, long); 105 kmutex_t sc_lock; 106 glyphcache sc_gc; 107 }; 108 109 static int gffb_match(device_t, cfdata_t, void *); 110 static void gffb_attach(device_t, device_t, void *); 111 112 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 113 gffb_match, gffb_attach, NULL, NULL); 114 115 static int gffb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 116 static paddr_t gffb_mmap(void *, void *, off_t, int); 117 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 118 119 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 120 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 121 static void gffb_restore_palette(struct gffb_softc *); 122 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 123 uint8_t, uint8_t); 124 125 static void gffb_init(struct gffb_softc *); 126 127 static void gffb_make_room(struct gffb_softc *, int); 128 static void gffb_sync(struct gffb_softc *); 129 130 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 131 uint32_t); 132 static void gffb_bitblt(void *, int, int, int, int, int, int, int); 133 static void gffb_rop(struct gffb_softc *, int); 134 135 static void gffb_cursor(void *, int, int, int); 136 static void gffb_putchar(void *, int, int, u_int, long); 137 static void gffb_copycols(void *, int, int, int, int); 138 static void gffb_erasecols(void *, int, int, int, long); 139 static void gffb_copyrows(void *, int, int, int); 140 static void gffb_eraserows(void *, int, int, long); 141 142 #define GFFB_READ_4(o) bus_space_read_4(sc->sc_memt, sc->sc_regh, (o)) 143 #define GFFB_WRITE_4(o, v) bus_space_write_4(sc->sc_memt, sc->sc_regh, (o), (v)) 144 145 struct wsdisplay_accessops gffb_accessops = { 146 gffb_ioctl, 147 gffb_mmap, 148 NULL, /* alloc_screen */ 149 NULL, /* free_screen */ 150 NULL, /* show_screen */ 151 NULL, /* load_font */ 152 NULL, /* pollc */ 153 NULL /* scroll */ 154 }; 155 156 static int 157 gffb_match(device_t parent, cfdata_t match, void *aux) 158 { 159 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 160 161 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 162 return 0; 163 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 164 return 0; 165 166 /* only card tested on so far - likely need a list */ 167 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 168 return 100; 169 return (0); 170 } 171 172 static void 173 gffb_attach(device_t parent, device_t self, void *aux) 174 { 175 struct gffb_softc *sc = device_private(self); 176 struct pci_attach_args *pa = aux; 177 struct rasops_info *ri; 178 bus_space_tag_t tag; 179 struct wsemuldisplaydev_attach_args aa; 180 prop_dictionary_t dict; 181 unsigned long defattr; 182 bool is_console = FALSE; 183 int i, j, f; 184 uint8_t cmap[768]; 185 186 sc->sc_pc = pa->pa_pc; 187 sc->sc_pcitag = pa->pa_tag; 188 sc->sc_memt = pa->pa_memt; 189 sc->sc_iot = pa->pa_iot; 190 sc->sc_dev = self; 191 192 pci_aprint_devinfo(pa, NULL); 193 194 /* fill in parameters from properties */ 195 dict = device_properties(self); 196 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 197 aprint_error("%s: no width property\n", device_xname(self)); 198 return; 199 } 200 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 201 aprint_error("%s: no height property\n", device_xname(self)); 202 return; 203 } 204 205 #ifdef GLYPHCACHE_DEBUG 206 /* leave some visible VRAM unused so we can see the glyph cache */ 207 sc->sc_height -= 300; 208 #endif 209 210 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 211 aprint_error("%s: no depth property\n", device_xname(self)); 212 return; 213 } 214 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 215 aprint_error("%s: no linebytes property\n", 216 device_xname(self)); 217 return; 218 } 219 220 prop_dictionary_get_bool(dict, "is_console", &is_console); 221 222 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 223 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 224 aprint_error("%s: failed to map registers.\n", 225 device_xname(sc->sc_dev)); 226 } 227 sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000; 228 229 /* don't map more VRAM than we actually have */ 230 if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, 231 0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) { 232 aprint_error("%s: can't find the framebuffer?!\n", 233 device_xname(sc->sc_dev)); 234 } 235 236 if (bus_space_map(sc->sc_memt, sc->sc_fb, sc->sc_vramsize, 237 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 238 &sc->sc_fbh)) { 239 aprint_error("%s: failed to map the framebuffer.\n", 240 device_xname(sc->sc_dev)); 241 } 242 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 243 244 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 245 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 246 aprint_normal_dev(sc->sc_dev, "%d MB video memory\n", 247 (int)(sc->sc_vramsize >> 20)); 248 249 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 250 "default", 251 0, 0, 252 NULL, 253 8, 16, 254 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 255 NULL 256 }; 257 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 258 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 259 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 260 sc->sc_locked = 0; 261 262 #ifdef GFFB_DEBUG 263 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 264 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 265 #endif 266 267 /* 268 * we don't have hardware synchronization so we need a lock to serialize 269 * access to the DMA buffer between normal and kernel output 270 * actually it might be enough to use atomic ops on sc_current, sc_free 271 * etc. but for now we'll play it safe 272 * XXX we will probably deadlock if we take an interrupt while sc_lock 273 * is held and then try to printf() 274 */ 275 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 276 277 /* init engine here */ 278 gffb_init(sc); 279 280 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 281 &gffb_accessops); 282 sc->vd.init_screen = gffb_init_screen; 283 284 285 ri = &sc->sc_console_screen.scr_ri; 286 287 sc->sc_gc.gc_bitblt = gffb_bitblt; 288 sc->sc_gc.gc_blitcookie = sc; 289 sc->sc_gc.gc_rop = 0xcc; 290 291 if (is_console) { 292 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 293 &defattr); 294 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 295 296 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 297 ri->ri_devcmap[(defattr >> 16) & 0xf]); 298 299 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 300 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 301 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 302 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 303 304 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 305 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 306 sc->sc_width, 307 ri->ri_font->fontwidth, 308 ri->ri_font->fontheight, 309 defattr); 310 311 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 312 defattr); 313 vcons_replay_msgbuf(&sc->sc_console_screen); 314 } else { 315 /* 316 * since we're not the console we can postpone the rest 317 * until someone actually allocates a screen for us 318 */ 319 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 320 /* do some minimal setup to avoid weirdnesses later */ 321 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 322 &defattr); 323 } else 324 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 325 326 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 327 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 328 sc->sc_width, 329 ri->ri_font->fontwidth, 330 ri->ri_font->fontheight, 331 defattr); 332 } 333 334 j = 0; 335 rasops_get_cmap(ri, cmap, sizeof(cmap)); 336 for (i = 0; i < 256; i++) { 337 sc->sc_cmap_red[i] = cmap[j]; 338 sc->sc_cmap_green[i] = cmap[j + 1]; 339 sc->sc_cmap_blue[i] = cmap[j + 2]; 340 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 341 j += 3; 342 } 343 344 /* no suspend/resume support yet */ 345 if (!pmf_device_register(sc->sc_dev, NULL, NULL)) 346 aprint_error_dev(sc->sc_dev, 347 "couldn't establish power handler\n"); 348 349 aa.console = is_console; 350 aa.scrdata = &sc->sc_screenlist; 351 aa.accessops = &gffb_accessops; 352 aa.accesscookie = &sc->vd; 353 354 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint); 355 356 #ifdef GFFB_DEBUG 357 for (i = 0; i < 40; i++) { 358 for (j = 0; j < 40; j++) { 359 gffb_rectfill(sc, i * 20, j * 20, 20, 20, 360 (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303); 361 } 362 } 363 364 gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292); 365 gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc); 366 gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc); 367 gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc); 368 gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc); 369 gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc); 370 gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc); 371 gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc); 372 gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc); 373 gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc); 374 gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc); 375 gffb_sync(sc); 376 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 377 #endif 378 } 379 380 static int 381 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 382 { 383 struct vcons_data *vd = v; 384 struct gffb_softc *sc = vd->cookie; 385 struct wsdisplay_fbinfo *wdf; 386 struct vcons_screen *ms = vd->active; 387 388 switch (cmd) { 389 case WSDISPLAYIO_GTYPE: 390 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 391 return 0; 392 393 /* PCI config read/write passthrough. */ 394 case PCI_IOC_CFGREAD: 395 case PCI_IOC_CFGWRITE: 396 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 397 cmd, data, flag, l); 398 399 case WSDISPLAYIO_GET_BUSID: 400 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 401 sc->sc_pcitag, data); 402 403 case WSDISPLAYIO_GINFO: 404 if (ms == NULL) 405 return ENODEV; 406 wdf = (void *)data; 407 wdf->height = ms->scr_ri.ri_height; 408 wdf->width = ms->scr_ri.ri_width; 409 wdf->depth = ms->scr_ri.ri_depth; 410 wdf->cmsize = 256; 411 return 0; 412 413 case WSDISPLAYIO_GETCMAP: 414 return gffb_getcmap(sc, 415 (struct wsdisplay_cmap *)data); 416 417 case WSDISPLAYIO_PUTCMAP: 418 return gffb_putcmap(sc, 419 (struct wsdisplay_cmap *)data); 420 421 case WSDISPLAYIO_LINEBYTES: 422 *(u_int *)data = sc->sc_stride; 423 return 0; 424 425 case WSDISPLAYIO_SMODE: { 426 int new_mode = *(int*)data; 427 if (new_mode != sc->sc_mode) { 428 sc->sc_mode = new_mode; 429 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 430 gffb_init(sc); 431 gffb_restore_palette(sc); 432 glyphcache_wipe(&sc->sc_gc); 433 gffb_rectfill(sc, 0, 0, sc->sc_width, 434 sc->sc_height, ms->scr_ri.ri_devcmap[ 435 (ms->scr_defattr >> 16) & 0xf]); 436 vcons_redraw_screen(ms); 437 } 438 } 439 } 440 return 0; 441 442 case WSDISPLAYIO_GET_EDID: { 443 struct wsdisplayio_edid_info *d = data; 444 return wsdisplayio_get_edid(sc->sc_dev, d); 445 } 446 447 case WSDISPLAYIO_GET_FBINFO: { 448 struct wsdisplayio_fbinfo *fbi = data; 449 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 450 } 451 } 452 return EPASSTHROUGH; 453 } 454 455 static paddr_t 456 gffb_mmap(void *v, void *vs, off_t offset, int prot) 457 { 458 struct vcons_data *vd = v; 459 struct gffb_softc *sc = vd->cookie; 460 paddr_t pa; 461 462 /* 'regular' framebuffer mmap()ing */ 463 if (offset < sc->sc_vramsize) { 464 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 465 0, prot, BUS_SPACE_MAP_LINEAR); 466 return pa; 467 } 468 469 /* 470 * restrict all other mappings to processes with superuser privileges 471 * or the kernel itself 472 */ 473 if (kauth_authorize_machdep(kauth_cred_get(), 474 KAUTH_MACHDEP_UNMANAGEDMEM, 475 NULL, NULL, NULL, NULL) != 0) { 476 aprint_normal("%s: mmap() rejected.\n", 477 device_xname(sc->sc_dev)); 478 return -1; 479 } 480 481 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 482 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 483 BUS_SPACE_MAP_LINEAR); 484 return pa; 485 } 486 487 if ((offset >= sc->sc_reg) && 488 (offset < (sc->sc_reg + sc->sc_regsize))) { 489 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 490 BUS_SPACE_MAP_LINEAR); 491 return pa; 492 } 493 494 #ifdef PCI_MAGIC_IO_RANGE 495 /* allow mapping of IO space */ 496 if ((offset >= PCI_MAGIC_IO_RANGE) && 497 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 498 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 499 0, prot, BUS_SPACE_MAP_LINEAR); 500 return pa; 501 } 502 #endif 503 504 return -1; 505 } 506 507 static void 508 gffb_init_screen(void *cookie, struct vcons_screen *scr, 509 int existing, long *defattr) 510 { 511 struct gffb_softc *sc = cookie; 512 struct rasops_info *ri = &scr->scr_ri; 513 514 ri->ri_depth = sc->sc_depth; 515 ri->ri_width = sc->sc_width; 516 ri->ri_height = sc->sc_height; 517 ri->ri_stride = sc->sc_stride; 518 ri->ri_bits = sc->sc_fbaddr + 0x2000; 519 ri->ri_flg = RI_CENTER; 520 if (sc->sc_depth == 8) 521 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 522 523 rasops_init(ri, 0, 0); 524 ri->ri_caps = WSSCREEN_WSCOLORS; 525 526 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 527 sc->sc_width / ri->ri_font->fontwidth); 528 529 ri->ri_hw = scr; 530 531 sc->sc_putchar = ri->ri_ops.putchar; 532 ri->ri_ops.copyrows = gffb_copyrows; 533 ri->ri_ops.copycols = gffb_copycols; 534 ri->ri_ops.eraserows = gffb_eraserows; 535 ri->ri_ops.erasecols = gffb_erasecols; 536 ri->ri_ops.cursor = gffb_cursor; 537 ri->ri_ops.putchar = gffb_putchar; 538 } 539 540 static int 541 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 542 { 543 u_char *r, *g, *b; 544 u_int index = cm->index; 545 u_int count = cm->count; 546 int i, error; 547 u_char rbuf[256], gbuf[256], bbuf[256]; 548 549 #ifdef GFFB_DEBUG 550 aprint_debug("putcmap: %d %d\n",index, count); 551 #endif 552 if (cm->index >= 256 || cm->count > 256 || 553 (cm->index + cm->count) > 256) 554 return EINVAL; 555 error = copyin(cm->red, &rbuf[index], count); 556 if (error) 557 return error; 558 error = copyin(cm->green, &gbuf[index], count); 559 if (error) 560 return error; 561 error = copyin(cm->blue, &bbuf[index], count); 562 if (error) 563 return error; 564 565 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 566 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 567 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 568 569 r = &sc->sc_cmap_red[index]; 570 g = &sc->sc_cmap_green[index]; 571 b = &sc->sc_cmap_blue[index]; 572 573 for (i = 0; i < count; i++) { 574 gffb_putpalreg(sc, index, *r, *g, *b); 575 index++; 576 r++, g++, b++; 577 } 578 return 0; 579 } 580 581 static int 582 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 583 { 584 u_int index = cm->index; 585 u_int count = cm->count; 586 int error; 587 588 if (index >= 255 || count > 256 || index + count > 256) 589 return EINVAL; 590 591 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 592 if (error) 593 return error; 594 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 595 if (error) 596 return error; 597 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 598 if (error) 599 return error; 600 601 return 0; 602 } 603 604 static void 605 gffb_restore_palette(struct gffb_softc *sc) 606 { 607 int i; 608 609 for (i = 0; i < (1 << sc->sc_depth); i++) { 610 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 611 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 612 } 613 } 614 615 static int 616 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 617 uint8_t b) 618 { 619 /* port 0 */ 620 bus_space_write_1(sc->sc_memt, sc->sc_regh, 621 GFFB_PDIO0 + GFFB_PEL_IW, idx); 622 bus_space_write_1(sc->sc_memt, sc->sc_regh, 623 GFFB_PDIO0 + GFFB_PEL_D, r); 624 bus_space_write_1(sc->sc_memt, sc->sc_regh, 625 GFFB_PDIO0 + GFFB_PEL_D, g); 626 bus_space_write_1(sc->sc_memt, sc->sc_regh, 627 GFFB_PDIO0 + GFFB_PEL_D, b); 628 629 /* port 1 */ 630 bus_space_write_1(sc->sc_memt, sc->sc_regh, 631 GFFB_PDIO1 + GFFB_PEL_IW, idx); 632 bus_space_write_1(sc->sc_memt, sc->sc_regh, 633 GFFB_PDIO1 + GFFB_PEL_D, r); 634 bus_space_write_1(sc->sc_memt, sc->sc_regh, 635 GFFB_PDIO1 + GFFB_PEL_D, g); 636 bus_space_write_1(sc->sc_memt, sc->sc_regh, 637 GFFB_PDIO1 + GFFB_PEL_D, b); 638 639 return 0; 640 } 641 642 643 static void 644 gffb_dma_kickoff(struct gffb_softc *sc) 645 { 646 647 if (sc->sc_current != sc->sc_put) { 648 sc->sc_put = sc->sc_current; 649 membar_sync(); 650 (void)*sc->sc_fbaddr; 651 GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put); 652 membar_sync(); 653 } 654 } 655 656 static void 657 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 658 { 659 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 660 sc->sc_current += 4; 661 } 662 663 static void 664 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 665 { 666 if(sc->sc_free <= (size << 2)) 667 gffb_make_room(sc, size); 668 gffb_dmanext(sc, ((size) << 18) | (tag)); 669 sc->sc_free -= ((size + 1) << 2); 670 } 671 672 /* 673 * from xf86_video_nv/nv_xaa.c: 674 * There is a HW race condition with videoram command buffers. 675 * You can't jump to the location of your put offset. We write put 676 * at the jump offset + SKIPS dwords with noop padding in between 677 * to solve this problem 678 */ 679 680 #define SKIPS 8 681 682 static void 683 gffb_make_room(struct gffb_softc *sc, int size) 684 { 685 uint32_t get; 686 687 size = (size + 1) << 2; /* slots -> offset */ 688 689 while (sc->sc_free < size) { 690 get = GFFB_READ_4(GFFB_FIFO_GET); 691 692 if (sc->sc_put >= get) { 693 sc->sc_free = 0x2000 - sc->sc_current; 694 if (sc->sc_free < size) { 695 gffb_dmanext(sc, 0x20000000); 696 if(get <= (SKIPS << 2)) { 697 if (sc->sc_put <= (SKIPS << 2)) { 698 /* corner case - will be idle */ 699 GFFB_WRITE_4(GFFB_FIFO_PUT, 700 (SKIPS + 1) << 2); 701 } 702 do { 703 get =GFFB_READ_4(GFFB_FIFO_GET); 704 } while (get <= (SKIPS << 2)); 705 } 706 GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2); 707 sc->sc_current = sc->sc_put = (SKIPS << 2); 708 sc->sc_free = get - ((SKIPS + 1) << 2); 709 } 710 } else 711 sc->sc_free = get - sc->sc_current - 4; 712 } 713 } 714 715 static void 716 gffb_sync(struct gffb_softc *sc) 717 { 718 int bail; 719 int i; 720 721 /* 722 * if there are commands in the buffer make sure the chip is actually 723 * trying to run them 724 */ 725 gffb_dma_kickoff(sc); 726 727 /* now wait for the command buffer to drain... */ 728 bail = 100000000; 729 while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) { 730 bail--; 731 } 732 if (bail == 0) goto crap; 733 734 /* ... and for the engine to go idle */ 735 bail = 100000000; 736 while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) { 737 bail--; 738 } 739 if (bail == 0) goto crap; 740 return; 741 crap: 742 /* if we time out fill the buffer with NOPs and cross fingers */ 743 sc->sc_put = 0; 744 sc->sc_current = 0; 745 for (i = 0; i < 0x2000; i += 4) 746 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 747 aprint_error_dev(sc->sc_dev, "DMA lockup\n"); 748 } 749 750 static void 751 gffb_init(struct gffb_softc *sc) 752 { 753 int i; 754 uint32_t foo; 755 756 /* init display start */ 757 GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, 0x2000); 758 GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, 0x2000); 759 GFFB_WRITE_4(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 760 GFFB_WRITE_4(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 761 762 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 763 GFFB_WRITE_4(GFFB_PMC + 0x140, 0); 764 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff); 765 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff); 766 GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8); 767 GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3); 768 GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0); 769 GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff); 770 for (i = 0; i < 8; i++) { 771 GFFB_WRITE_4(GFFB_PMC + 0x240 + (i * 0x10), 0); 772 GFFB_WRITE_4(GFFB_PMC + 0x244 + (i * 0x10), 773 sc->sc_vramsize - 1); 774 } 775 776 for (i = 0; i < 8; i++) { 777 GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0); 778 GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10), 779 sc->sc_vramsize - 1); 780 } 781 782 GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010); 783 GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201); 784 GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011); 785 GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202); 786 GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012); 787 GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203); 788 GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013); 789 GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204); 790 GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014); 791 GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205); 792 GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015); 793 GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206); 794 GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016); 795 GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207); 796 GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017); 797 GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208); 798 GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000); 799 GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 800 GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002); 801 GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002); 802 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008042); /* different for nv40 */ 803 GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0); 804 GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200); 805 GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0); 806 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043); 807 GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0); 808 GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0); 809 GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0); 810 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044); 811 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002); 812 GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0); 813 GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0); 814 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019); 815 GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0); 816 GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0); 817 GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0); 818 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c); 819 GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0); 820 GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0); 821 GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0); 822 /* XXX 0x0100805f if !WaitVSynvPossible */ 823 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100809f); 824 GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0); 825 GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200); 826 GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0); 827 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a); 828 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002); 829 GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0); 830 GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0); 831 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077); 832 GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0); 833 GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200); 834 GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0); 835 GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002); 836 GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff); 837 /* command buffer start with some flag in the lower bits */ 838 GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, 0x00000002); 839 GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002); 840 #if BYTE_ORDER == BIG_ENDIAN 841 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088042); 842 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043); 843 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044); 844 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019); 845 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c); 846 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108809f); 847 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a); 848 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077); 849 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001); 850 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001); 851 #endif 852 853 /* PGRAPH setup */ 854 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0); 855 GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001); 856 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0); 857 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0); 858 GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 859 GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0); 860 GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0); 861 GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 862 GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0); 863 GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0); 864 GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100); 865 GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110); 866 GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112); 867 GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff); 868 GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff); 869 GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0); 870 GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff); 871 GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001); 872 GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0); 873 GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0); 874 #if BYTE_ORDER == BIG_ENDIAN 875 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078); 876 #else 877 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078); 878 #endif 879 GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001); 880 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001); 881 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001); 882 GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001); 883 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001); 884 885 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 886 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000); 887 888 GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000); 889 GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 890 GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100); 891 GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 892 GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001); 893 /* 894 * xf86_video_nv does this in two writes, 895 * not sure if they can be combined 896 */ 897 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 898 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo & 0x0007ff00); 899 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 900 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo | 0x00020100); 901 902 /* NV_ARCH_10 */ 903 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700); 904 GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810); 905 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030); 906 907 for(i = 0; i < 128; i += 4) { 908 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i, 909 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 910 } 911 912 GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0); 913 GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0); 914 GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 915 GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 916 917 GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000); 918 GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 919 920 GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0); 921 GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0); 922 GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF); 923 GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF); 924 925 GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002); 926 GFFB_WRITE_4(GFFB_FIFO_GET, 0); 927 sc->sc_put = 0; 928 sc->sc_current = 0; 929 sc->sc_free = 0x2000; 930 931 for(i = 0; i < SKIPS; i++) 932 gffb_dmanext(sc, 0); 933 934 gffb_dmanext(sc, 0x00040000); 935 gffb_dmanext(sc, 0x80000010); 936 gffb_dmanext(sc, 0x00042000); 937 gffb_dmanext(sc, 0x80000011); 938 gffb_dmanext(sc, 0x00044000); 939 gffb_dmanext(sc, 0x80000012); 940 gffb_dmanext(sc, 0x00046000); 941 gffb_dmanext(sc, 0x80000013); 942 gffb_dmanext(sc, 0x00048000); 943 gffb_dmanext(sc, 0x80000014); 944 gffb_dmanext(sc, 0x0004A000); 945 gffb_dmanext(sc, 0x80000015); 946 gffb_dmanext(sc, 0x0004C000); 947 gffb_dmanext(sc, 0x80000016); 948 gffb_dmanext(sc, 0x0004E000); 949 gffb_dmanext(sc, 0x80000017); 950 sc->sc_free = 0x2000 - sc->sc_current; 951 952 gffb_dmastart(sc, SURFACE_FORMAT, 4); 953 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 954 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 955 gffb_dmanext(sc, 0x2000); /* src offset */ 956 gffb_dmanext(sc, 0x2000); /* dst offset */ 957 958 gffb_dmastart(sc, RECT_FORMAT, 1); 959 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 960 961 gffb_dmastart(sc, PATTERN_FORMAT, 1); 962 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 963 964 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 965 gffb_dmanext(sc, 0xffffffff); 966 gffb_dmanext(sc, 0xffffffff); 967 gffb_dmanext(sc, 0xffffffff); 968 gffb_dmanext(sc, 0xffffffff); 969 970 gffb_dmastart(sc, ROP_SET, 1); 971 gffb_dmanext(sc, 0xcc); 972 sc->sc_rop = 0xcc; 973 974 gffb_dma_kickoff(sc); 975 gffb_sync(sc); 976 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 977 978 } 979 980 static void 981 gffb_rop(struct gffb_softc *sc, int rop) 982 { 983 if (rop == sc->sc_rop) 984 return; 985 sc->sc_rop = rop; 986 gffb_dmastart(sc, ROP_SET, 1); 987 gffb_dmanext(sc, rop); 988 } 989 990 static void 991 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 992 uint32_t colour) 993 { 994 mutex_enter(&sc->sc_lock); 995 gffb_rop(sc, 0xcc); 996 997 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 998 gffb_dmanext(sc, colour); 999 1000 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1001 gffb_dmanext(sc, (x << 16) | y); 1002 gffb_dmanext(sc, (wi << 16) | he); 1003 gffb_dma_kickoff(sc); 1004 mutex_exit(&sc->sc_lock); 1005 } 1006 1007 static void 1008 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1009 int wi, int he, int rop) 1010 { 1011 struct gffb_softc *sc = cookie; 1012 1013 mutex_enter(&sc->sc_lock); 1014 1015 gffb_rop(sc, rop); 1016 1017 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1018 gffb_dmanext(sc, (ys << 16) | xs); 1019 gffb_dmanext(sc, (yd << 16) | xd); 1020 gffb_dmanext(sc, (he << 16) | wi); 1021 gffb_dma_kickoff(sc); 1022 mutex_exit(&sc->sc_lock); 1023 } 1024 1025 static void 1026 gffb_cursor(void *cookie, int on, int row, int col) 1027 { 1028 struct rasops_info *ri = cookie; 1029 struct vcons_screen *scr = ri->ri_hw; 1030 struct gffb_softc *sc = scr->scr_cookie; 1031 int x, y, wi, he; 1032 1033 wi = ri->ri_font->fontwidth; 1034 he = ri->ri_font->fontheight; 1035 1036 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1037 x = ri->ri_ccol * wi + ri->ri_xorigin; 1038 y = ri->ri_crow * he + ri->ri_yorigin; 1039 if (ri->ri_flg & RI_CURSOR) { 1040 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1041 ri->ri_flg &= ~RI_CURSOR; 1042 } 1043 ri->ri_crow = row; 1044 ri->ri_ccol = col; 1045 if (on) { 1046 x = ri->ri_ccol * wi + ri->ri_xorigin; 1047 y = ri->ri_crow * he + ri->ri_yorigin; 1048 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1049 ri->ri_flg |= RI_CURSOR; 1050 } 1051 } else { 1052 scr->scr_ri.ri_crow = row; 1053 scr->scr_ri.ri_ccol = col; 1054 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1055 } 1056 1057 } 1058 1059 static void 1060 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1061 { 1062 struct rasops_info *ri = cookie; 1063 struct wsdisplay_font *font = PICK_FONT(ri, c); 1064 struct vcons_screen *scr = ri->ri_hw; 1065 struct gffb_softc *sc = scr->scr_cookie; 1066 int x, y, wi, he, rv = GC_NOPE; 1067 uint32_t bg; 1068 1069 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1070 return; 1071 1072 if (!CHAR_IN_FONT(c, font)) 1073 return; 1074 1075 wi = font->fontwidth; 1076 he = font->fontheight; 1077 1078 x = ri->ri_xorigin + col * wi; 1079 y = ri->ri_yorigin + row * he; 1080 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1081 1082 if (c == 0x20) { 1083 gffb_rectfill(sc, x, y, wi, he, bg); 1084 return; 1085 } 1086 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1087 if (rv == GC_OK) 1088 return; 1089 1090 mutex_enter(&sc->sc_lock); 1091 gffb_sync(sc); 1092 sc->sc_putchar(cookie, row, col, c, attr); 1093 membar_sync(); 1094 mutex_exit(&sc->sc_lock); 1095 1096 if (rv == GC_ADD) { 1097 glyphcache_add(&sc->sc_gc, c, x, y); 1098 } 1099 } 1100 1101 static void 1102 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1103 { 1104 struct rasops_info *ri = cookie; 1105 struct vcons_screen *scr = ri->ri_hw; 1106 struct gffb_softc *sc = scr->scr_cookie; 1107 int32_t xs, xd, y, width, height; 1108 1109 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1110 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1111 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1112 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1113 width = ri->ri_font->fontwidth * ncols; 1114 height = ri->ri_font->fontheight; 1115 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1116 } 1117 } 1118 1119 static void 1120 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1121 { 1122 struct rasops_info *ri = cookie; 1123 struct vcons_screen *scr = ri->ri_hw; 1124 struct gffb_softc *sc = scr->scr_cookie; 1125 int32_t x, y, width, height, fg, bg, ul; 1126 1127 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1128 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1129 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1130 width = ri->ri_font->fontwidth * ncols; 1131 height = ri->ri_font->fontheight; 1132 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1133 1134 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1135 } 1136 } 1137 1138 static void 1139 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1140 { 1141 struct rasops_info *ri = cookie; 1142 struct vcons_screen *scr = ri->ri_hw; 1143 struct gffb_softc *sc = scr->scr_cookie; 1144 int32_t x, ys, yd, width, height; 1145 1146 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1147 x = ri->ri_xorigin; 1148 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1149 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1150 width = ri->ri_emuwidth; 1151 height = ri->ri_font->fontheight * nrows; 1152 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1153 } 1154 } 1155 1156 static void 1157 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1158 { 1159 struct rasops_info *ri = cookie; 1160 struct vcons_screen *scr = ri->ri_hw; 1161 struct gffb_softc *sc = scr->scr_cookie; 1162 int32_t x, y, width, height, fg, bg, ul; 1163 1164 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1165 x = ri->ri_xorigin; 1166 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1167 width = ri->ri_emuwidth; 1168 height = ri->ri_font->fontheight * nrows; 1169 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1170 1171 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1172 } 1173 } 1174
Indexes created Mon Sep 29 21:09:56 GMT 2025