gffb.c revision 1.22
1 /* $NetBSD: gffb.c,v 1.22 2022/09/25 17:52:25 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far, should work on other hardware as long as 31 * something sets up a usable graphics mode and sets the right device properties 32 * This driver should work with all NV1x hardware but so far it's been tested 33 * only on NV11 / GeForce2 MX. Needs testing with more hardware and if 34 * successful, PCI IDs need to be added to gffb_match() 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.22 2022/09/25 17:52:25 thorpej Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/lwp.h> 45 #include <sys/kauth.h> 46 #include <sys/atomic.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 #include <dev/pci/pciio.h> 52 #include <dev/pci/gffbreg.h> 53 54 #include <dev/wscons/wsdisplayvar.h> 55 #include <dev/wscons/wsconsio.h> 56 #include <dev/wsfont/wsfont.h> 57 #include <dev/rasops/rasops.h> 58 #include <dev/wscons/wsdisplay_vconsvar.h> 59 #include <dev/pci/wsdisplay_pci.h> 60 #include <dev/wscons/wsdisplay_glyphcachevar.h> 61 62 #include "opt_gffb.h" 63 #include "opt_vcons.h" 64 65 #ifdef GFFB_DEBUG 66 #define DPRINTF printf 67 #else 68 #define DPRINTF while(0) printf 69 #endif 70 71 struct gffb_softc { 72 device_t sc_dev; 73 74 pci_chipset_tag_t sc_pc; 75 pcitag_t sc_pcitag; 76 77 bus_space_tag_t sc_memt; 78 bus_space_tag_t sc_iot; 79 80 bus_space_handle_t sc_regh, sc_fbh; 81 bus_addr_t sc_fb, sc_reg; 82 bus_size_t sc_fbsize, sc_regsize; 83 uint8_t *sc_fbaddr; 84 size_t sc_vramsize; 85 uint32_t sc_fboffset; 86 87 int sc_width, sc_height, sc_depth, sc_stride; 88 int sc_locked, sc_accel; 89 struct vcons_screen sc_console_screen; 90 struct wsscreen_descr sc_defaultscreen_descr; 91 const struct wsscreen_descr *sc_screens[1]; 92 struct wsscreen_list sc_screenlist; 93 struct vcons_data vd; 94 int sc_mode; 95 u_char sc_cmap_red[256]; 96 u_char sc_cmap_green[256]; 97 u_char sc_cmap_blue[256]; 98 int sc_put, sc_current, sc_free; 99 uint32_t sc_rop; 100 void (*sc_putchar)(void *, int, int, u_int, long); 101 kmutex_t sc_lock; 102 glyphcache sc_gc; 103 }; 104 105 static int gffb_match(device_t, cfdata_t, void *); 106 static void gffb_attach(device_t, device_t, void *); 107 108 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 109 gffb_match, gffb_attach, NULL, NULL); 110 111 static int gffb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 112 static paddr_t gffb_mmap(void *, void *, off_t, int); 113 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 114 115 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 116 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 117 static void gffb_restore_palette(struct gffb_softc *); 118 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 119 uint8_t, uint8_t); 120 121 static void gffb_init(struct gffb_softc *); 122 123 static void gffb_make_room(struct gffb_softc *, int); 124 static void gffb_sync(struct gffb_softc *); 125 126 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 127 uint32_t); 128 static void gffb_bitblt(void *, int, int, int, int, int, int, int); 129 static void gffb_rop(struct gffb_softc *, int); 130 131 static void gffb_cursor(void *, int, int, int); 132 static void gffb_putchar(void *, int, int, u_int, long); 133 static void gffb_copycols(void *, int, int, int, int); 134 static void gffb_erasecols(void *, int, int, int, long); 135 static void gffb_copyrows(void *, int, int, int); 136 static void gffb_eraserows(void *, int, int, long); 137 138 #define GFFB_READ_4(o) bus_space_read_4(sc->sc_memt, sc->sc_regh, (o)) 139 #define GFFB_WRITE_4(o, v) bus_space_write_4(sc->sc_memt, sc->sc_regh, (o), (v)) 140 141 struct wsdisplay_accessops gffb_accessops = { 142 gffb_ioctl, 143 gffb_mmap, 144 NULL, /* alloc_screen */ 145 NULL, /* free_screen */ 146 NULL, /* show_screen */ 147 NULL, /* load_font */ 148 NULL, /* pollc */ 149 NULL /* scroll */ 150 }; 151 152 static int 153 gffb_match(device_t parent, cfdata_t match, void *aux) 154 { 155 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 156 157 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 158 return 0; 159 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 160 return 0; 161 162 /* only card tested on so far - likely need a list */ 163 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 164 return 100; 165 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE_6800U) 166 return 100; 167 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GF_FXGO5200) 168 return 100; 169 return (0); 170 } 171 172 static void 173 gffb_attach(device_t parent, device_t self, void *aux) 174 { 175 struct gffb_softc *sc = device_private(self); 176 struct pci_attach_args *pa = aux; 177 struct rasops_info *ri; 178 bus_space_tag_t tag; 179 struct wsemuldisplaydev_attach_args aa; 180 prop_dictionary_t dict; 181 unsigned long defattr; 182 pcireg_t reg; 183 bool is_console = FALSE; 184 uint32_t addr; 185 int i, j, f; 186 uint8_t cmap[768]; 187 188 sc->sc_pc = pa->pa_pc; 189 sc->sc_pcitag = pa->pa_tag; 190 sc->sc_memt = pa->pa_memt; 191 sc->sc_iot = pa->pa_iot; 192 sc->sc_dev = self; 193 194 /* first, see what kind of chip we've got */ 195 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_ID_REG); 196 sc->sc_accel = PCI_PRODUCT(reg) == PCI_PRODUCT_NVIDIA_GEFORCE2MX; 197 198 pci_aprint_devinfo(pa, NULL); 199 200 /* fill in parameters from properties */ 201 dict = device_properties(self); 202 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 203 aprint_error("%s: no width property\n", device_xname(self)); 204 return; 205 } 206 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 207 aprint_error("%s: no height property\n", device_xname(self)); 208 return; 209 } 210 211 #ifdef GLYPHCACHE_DEBUG 212 /* leave some visible VRAM unused so we can see the glyph cache */ 213 sc->sc_height -= 300; 214 #endif 215 216 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 217 aprint_error("%s: no depth property\n", device_xname(self)); 218 return; 219 } 220 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 221 aprint_error("%s: no linebytes property\n", 222 device_xname(self)); 223 return; 224 } 225 226 /* 227 * on !2MX we need to use the firmware's offset - for some reason 228 * register writes to anything other than the DACs go wrong 229 */ 230 sc->sc_fboffset = 0; 231 if (prop_dictionary_get_uint32(dict, "address", &addr)) { 232 sc->sc_fboffset = addr & 0x000fffff; /* XXX */ 233 } 234 235 prop_dictionary_get_bool(dict, "is_console", &is_console); 236 237 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 238 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 239 aprint_error("%s: failed to map registers.\n", 240 device_xname(sc->sc_dev)); 241 } 242 sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000; 243 244 /* don't map more VRAM than we actually have */ 245 if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, 246 0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) { 247 aprint_error("%s: can't find the framebuffer?!\n", 248 device_xname(sc->sc_dev)); 249 } 250 if (sc->sc_vramsize == 0) sc->sc_vramsize = sc->sc_fbsize; 251 252 /* don't map (much) more than we actually need */ 253 if (bus_space_map(sc->sc_memt, sc->sc_fb, 0x1000000, 254 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 255 &sc->sc_fbh)) { 256 aprint_error("%s: failed to map the framebuffer.\n", 257 device_xname(sc->sc_dev)); 258 } 259 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 260 261 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 262 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 263 aprint_normal_dev(sc->sc_dev, "%d MB video memory\n", 264 (int)(sc->sc_vramsize >> 20)); 265 266 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 267 "default", 268 0, 0, 269 NULL, 270 8, 16, 271 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 272 NULL 273 }; 274 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 275 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 276 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 277 sc->sc_locked = 0; 278 279 #ifdef GFFB_DEBUG 280 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 281 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 282 #endif 283 284 /* 285 * we don't have hardware synchronization so we need a lock to serialize 286 * access to the DMA buffer between normal and kernel output 287 * actually it might be enough to use atomic ops on sc_current, sc_free 288 * etc. but for now we'll play it safe 289 * XXX we will probably deadlock if we take an interrupt while sc_lock 290 * is held and then try to printf() 291 */ 292 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 293 294 /* init engine here */ 295 gffb_init(sc); 296 297 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 298 &gffb_accessops); 299 sc->vd.init_screen = gffb_init_screen; 300 301 302 ri = &sc->sc_console_screen.scr_ri; 303 304 if (sc->sc_accel) { 305 sc->sc_gc.gc_bitblt = gffb_bitblt; 306 sc->sc_gc.gc_blitcookie = sc; 307 sc->sc_gc.gc_rop = 0xcc; 308 } 309 310 if (is_console) { 311 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 312 &defattr); 313 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 314 315 if (sc->sc_accel) { 316 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 317 ri->ri_devcmap[(defattr >> 16) & 0xf]); 318 } else { 319 memset(sc->sc_fbaddr + sc->sc_fboffset, 320 ri->ri_devcmap[(defattr >> 16) & 0xf], 321 sc->sc_stride * sc->sc_height); 322 } 323 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 324 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 325 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 326 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 327 328 if (sc->sc_accel) 329 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 330 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 331 sc->sc_width, 332 ri->ri_font->fontwidth, 333 ri->ri_font->fontheight, 334 defattr); 335 336 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 337 defattr); 338 vcons_replay_msgbuf(&sc->sc_console_screen); 339 } else { 340 /* 341 * since we're not the console we can postpone the rest 342 * until someone actually allocates a screen for us 343 */ 344 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 345 /* do some minimal setup to avoid weirdnesses later */ 346 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 347 &defattr); 348 } else 349 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 350 351 if (sc->sc_accel) 352 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 353 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 354 sc->sc_width, 355 ri->ri_font->fontwidth, 356 ri->ri_font->fontheight, 357 defattr); 358 } 359 360 j = 0; 361 rasops_get_cmap(ri, cmap, sizeof(cmap)); 362 for (i = 0; i < 256; i++) { 363 sc->sc_cmap_red[i] = cmap[j]; 364 sc->sc_cmap_green[i] = cmap[j + 1]; 365 sc->sc_cmap_blue[i] = cmap[j + 2]; 366 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 367 j += 3; 368 } 369 370 /* no suspend/resume support yet */ 371 if (!pmf_device_register(sc->sc_dev, NULL, NULL)) 372 aprint_error_dev(sc->sc_dev, 373 "couldn't establish power handler\n"); 374 375 aa.console = is_console; 376 aa.scrdata = &sc->sc_screenlist; 377 aa.accessops = &gffb_accessops; 378 aa.accesscookie = &sc->vd; 379 380 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 381 382 #ifdef GFFB_DEBUG 383 for (i = 0; i < 40; i++) { 384 for (j = 0; j < 40; j++) { 385 gffb_rectfill(sc, i * 20, j * 20, 20, 20, 386 (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303); 387 } 388 } 389 390 gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292); 391 gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc); 392 gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc); 393 gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc); 394 gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc); 395 gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc); 396 gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc); 397 gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc); 398 gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc); 399 gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc); 400 gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc); 401 gffb_sync(sc); 402 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 403 #endif 404 } 405 406 static int 407 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 408 { 409 struct vcons_data *vd = v; 410 struct gffb_softc *sc = vd->cookie; 411 struct wsdisplay_fbinfo *wdf; 412 struct vcons_screen *ms = vd->active; 413 414 switch (cmd) { 415 case WSDISPLAYIO_GTYPE: 416 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 417 return 0; 418 419 /* PCI config read/write passthrough. */ 420 case PCI_IOC_CFGREAD: 421 case PCI_IOC_CFGWRITE: 422 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 423 cmd, data, flag, l); 424 425 case WSDISPLAYIO_GET_BUSID: 426 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 427 sc->sc_pcitag, data); 428 429 case WSDISPLAYIO_GINFO: 430 if (ms == NULL) 431 return ENODEV; 432 wdf = (void *)data; 433 wdf->height = ms->scr_ri.ri_height; 434 wdf->width = ms->scr_ri.ri_width; 435 wdf->depth = ms->scr_ri.ri_depth; 436 wdf->cmsize = 256; 437 return 0; 438 439 case WSDISPLAYIO_GETCMAP: 440 return gffb_getcmap(sc, 441 (struct wsdisplay_cmap *)data); 442 443 case WSDISPLAYIO_PUTCMAP: 444 return gffb_putcmap(sc, 445 (struct wsdisplay_cmap *)data); 446 447 case WSDISPLAYIO_LINEBYTES: 448 *(u_int *)data = sc->sc_stride; 449 return 0; 450 451 case WSDISPLAYIO_SMODE: { 452 int new_mode = *(int*)data; 453 if (new_mode != sc->sc_mode) { 454 sc->sc_mode = new_mode; 455 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 456 gffb_init(sc); 457 gffb_restore_palette(sc); 458 if (sc->sc_accel) { 459 glyphcache_wipe(&sc->sc_gc); 460 gffb_rectfill(sc, 0, 0, sc->sc_width, 461 sc->sc_height, ms->scr_ri.ri_devcmap[ 462 (ms->scr_defattr >> 16) & 0xf]); 463 } else { 464 memset(sc->sc_fbaddr + sc->sc_fboffset, 465 ms->scr_ri.ri_devcmap[ 466 (ms->scr_defattr >> 16) & 0xf], 467 sc->sc_stride * sc->sc_height); 468 } 469 vcons_redraw_screen(ms); 470 } 471 } 472 } 473 return 0; 474 475 case WSDISPLAYIO_GET_EDID: { 476 struct wsdisplayio_edid_info *d = data; 477 return wsdisplayio_get_edid(sc->sc_dev, d); 478 } 479 480 case WSDISPLAYIO_GET_FBINFO: { 481 struct wsdisplayio_fbinfo *fbi = data; 482 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 483 } 484 } 485 return EPASSTHROUGH; 486 } 487 488 static paddr_t 489 gffb_mmap(void *v, void *vs, off_t offset, int prot) 490 { 491 struct vcons_data *vd = v; 492 struct gffb_softc *sc = vd->cookie; 493 paddr_t pa; 494 495 /* 'regular' framebuffer mmap()ing */ 496 if (offset < sc->sc_vramsize) { 497 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 498 0, prot, BUS_SPACE_MAP_LINEAR); 499 return pa; 500 } 501 502 /* 503 * restrict all other mappings to processes with superuser privileges 504 * or the kernel itself 505 */ 506 if (kauth_authorize_machdep(kauth_cred_get(), 507 KAUTH_MACHDEP_UNMANAGEDMEM, 508 NULL, NULL, NULL, NULL) != 0) { 509 aprint_normal("%s: mmap() rejected.\n", 510 device_xname(sc->sc_dev)); 511 return -1; 512 } 513 514 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 515 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 516 BUS_SPACE_MAP_LINEAR); 517 return pa; 518 } 519 520 if ((offset >= sc->sc_reg) && 521 (offset < (sc->sc_reg + sc->sc_regsize))) { 522 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 523 BUS_SPACE_MAP_LINEAR); 524 return pa; 525 } 526 527 #ifdef PCI_MAGIC_IO_RANGE 528 /* allow mapping of IO space */ 529 if ((offset >= PCI_MAGIC_IO_RANGE) && 530 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 531 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 532 0, prot, BUS_SPACE_MAP_LINEAR); 533 return pa; 534 } 535 #endif 536 537 return -1; 538 } 539 540 static void 541 gffb_init_screen(void *cookie, struct vcons_screen *scr, 542 int existing, long *defattr) 543 { 544 struct gffb_softc *sc = cookie; 545 struct rasops_info *ri = &scr->scr_ri; 546 547 ri->ri_depth = sc->sc_depth; 548 ri->ri_width = sc->sc_width; 549 ri->ri_height = sc->sc_height; 550 ri->ri_stride = sc->sc_stride; 551 if (sc->sc_depth == 8) 552 ri->ri_bits = sc->sc_fbaddr + sc->sc_fboffset; 553 ri->ri_flg = RI_CENTER; 554 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 555 556 rasops_init(ri, 0, 0); 557 ri->ri_caps = WSSCREEN_WSCOLORS; 558 559 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 560 sc->sc_width / ri->ri_font->fontwidth); 561 562 ri->ri_hw = scr; 563 564 if (sc->sc_accel) { 565 sc->sc_putchar = ri->ri_ops.putchar; 566 ri->ri_ops.copyrows = gffb_copyrows; 567 ri->ri_ops.copycols = gffb_copycols; 568 ri->ri_ops.eraserows = gffb_eraserows; 569 ri->ri_ops.erasecols = gffb_erasecols; 570 ri->ri_ops.cursor = gffb_cursor; 571 ri->ri_ops.putchar = gffb_putchar; 572 } else { 573 scr->scr_flags |= VCONS_DONT_READ; 574 } 575 } 576 577 static int 578 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 579 { 580 u_char *r, *g, *b; 581 u_int index = cm->index; 582 u_int count = cm->count; 583 int i, error; 584 u_char rbuf[256], gbuf[256], bbuf[256]; 585 586 #ifdef GFFB_DEBUG 587 aprint_debug("putcmap: %d %d\n",index, count); 588 #endif 589 if (cm->index >= 256 || cm->count > 256 || 590 (cm->index + cm->count) > 256) 591 return EINVAL; 592 error = copyin(cm->red, &rbuf[index], count); 593 if (error) 594 return error; 595 error = copyin(cm->green, &gbuf[index], count); 596 if (error) 597 return error; 598 error = copyin(cm->blue, &bbuf[index], count); 599 if (error) 600 return error; 601 602 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 603 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 604 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 605 606 r = &sc->sc_cmap_red[index]; 607 g = &sc->sc_cmap_green[index]; 608 b = &sc->sc_cmap_blue[index]; 609 610 for (i = 0; i < count; i++) { 611 gffb_putpalreg(sc, index, *r, *g, *b); 612 index++; 613 r++, g++, b++; 614 } 615 return 0; 616 } 617 618 static int 619 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 620 { 621 u_int index = cm->index; 622 u_int count = cm->count; 623 int error; 624 625 if (index >= 255 || count > 256 || index + count > 256) 626 return EINVAL; 627 628 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 629 if (error) 630 return error; 631 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 632 if (error) 633 return error; 634 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 635 if (error) 636 return error; 637 638 return 0; 639 } 640 641 static void 642 gffb_restore_palette(struct gffb_softc *sc) 643 { 644 int i; 645 646 for (i = 0; i < (1 << sc->sc_depth); i++) { 647 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 648 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 649 } 650 } 651 652 static int 653 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 654 uint8_t b) 655 { 656 /* port 0 */ 657 bus_space_write_1(sc->sc_memt, sc->sc_regh, 658 GFFB_PDIO0 + GFFB_PEL_IW, idx); 659 bus_space_write_1(sc->sc_memt, sc->sc_regh, 660 GFFB_PDIO0 + GFFB_PEL_D, r); 661 bus_space_write_1(sc->sc_memt, sc->sc_regh, 662 GFFB_PDIO0 + GFFB_PEL_D, g); 663 bus_space_write_1(sc->sc_memt, sc->sc_regh, 664 GFFB_PDIO0 + GFFB_PEL_D, b); 665 666 /* port 1 */ 667 bus_space_write_1(sc->sc_memt, sc->sc_regh, 668 GFFB_PDIO1 + GFFB_PEL_IW, idx); 669 bus_space_write_1(sc->sc_memt, sc->sc_regh, 670 GFFB_PDIO1 + GFFB_PEL_D, r); 671 bus_space_write_1(sc->sc_memt, sc->sc_regh, 672 GFFB_PDIO1 + GFFB_PEL_D, g); 673 bus_space_write_1(sc->sc_memt, sc->sc_regh, 674 GFFB_PDIO1 + GFFB_PEL_D, b); 675 676 return 0; 677 } 678 679 680 static void 681 gffb_dma_kickoff(struct gffb_softc *sc) 682 { 683 684 if (sc->sc_current != sc->sc_put) { 685 sc->sc_put = sc->sc_current; 686 bus_space_barrier(sc->sc_memt, sc->sc_fbh, 0, 0x1000000, 687 BUS_SPACE_BARRIER_WRITE); 688 (void)*sc->sc_fbaddr; 689 GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put); 690 bus_space_barrier(sc->sc_memt, sc->sc_regh, GFFB_FIFO_PUT, 4, 691 BUS_SPACE_BARRIER_WRITE); 692 } 693 } 694 695 static void 696 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 697 { 698 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 699 sc->sc_current += 4; 700 } 701 702 static void 703 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 704 { 705 if(sc->sc_free <= (size << 2)) 706 gffb_make_room(sc, size); 707 gffb_dmanext(sc, ((size) << 18) | (tag)); 708 sc->sc_free -= ((size + 1) << 2); 709 } 710 711 /* 712 * from xf86_video_nv/nv_xaa.c: 713 * There is a HW race condition with videoram command buffers. 714 * You can't jump to the location of your put offset. We write put 715 * at the jump offset + SKIPS dwords with noop padding in between 716 * to solve this problem 717 */ 718 719 #define SKIPS 8 720 721 static void 722 gffb_make_room(struct gffb_softc *sc, int size) 723 { 724 uint32_t get; 725 726 size = (size + 1) << 2; /* slots -> offset */ 727 728 while (sc->sc_free < size) { 729 get = GFFB_READ_4(GFFB_FIFO_GET); 730 731 if (sc->sc_put >= get) { 732 sc->sc_free = 0x2000 - sc->sc_current; 733 if (sc->sc_free < size) { 734 gffb_dmanext(sc, 0x20000000); 735 if(get <= (SKIPS << 2)) { 736 if (sc->sc_put <= (SKIPS << 2)) { 737 /* corner case - will be idle */ 738 GFFB_WRITE_4(GFFB_FIFO_PUT, 739 (SKIPS + 1) << 2); 740 } 741 do { 742 get =GFFB_READ_4(GFFB_FIFO_GET); 743 } while (get <= (SKIPS << 2)); 744 } 745 GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2); 746 sc->sc_current = sc->sc_put = (SKIPS << 2); 747 sc->sc_free = get - ((SKIPS + 1) << 2); 748 } 749 } else 750 sc->sc_free = get - sc->sc_current - 4; 751 } 752 } 753 754 static void 755 gffb_sync(struct gffb_softc *sc) 756 { 757 int bail; 758 int i; 759 760 /* 761 * if there are commands in the buffer make sure the chip is actually 762 * trying to run them 763 */ 764 gffb_dma_kickoff(sc); 765 766 /* now wait for the command buffer to drain... */ 767 bail = 100000000; 768 while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) { 769 bail--; 770 } 771 if (bail == 0) goto crap; 772 773 /* ... and for the engine to go idle */ 774 bail = 100000000; 775 while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) { 776 bail--; 777 } 778 if (bail == 0) goto crap; 779 return; 780 crap: 781 /* if we time out fill the buffer with NOPs and cross fingers */ 782 sc->sc_put = 0; 783 sc->sc_current = 0; 784 for (i = 0; i < 0x2000; i += 4) 785 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 786 aprint_error_dev(sc->sc_dev, "DMA lockup\n"); 787 } 788 789 static void 790 gffb_init(struct gffb_softc *sc) 791 { 792 int i; 793 uint32_t foo; 794 795 if (!sc->sc_accel) return; 796 797 sc->sc_fboffset = 0x2000; 798 799 /* init display start */ 800 GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, sc->sc_fboffset); 801 GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, sc->sc_fboffset); 802 GFFB_WRITE_4(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 803 GFFB_WRITE_4(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 804 805 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 806 GFFB_WRITE_4(GFFB_PMC + 0x140, 0); 807 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff); 808 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff); 809 GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8); 810 GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3); 811 GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0); 812 GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff); 813 814 for (i = 0; i < 8; i++) { 815 GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0); 816 GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10), 817 sc->sc_vramsize - 1); 818 } 819 820 GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010); 821 GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201); 822 GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011); 823 GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202); 824 GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012); 825 GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203); 826 GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013); 827 GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204); 828 GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014); 829 GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205); 830 GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015); 831 GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206); 832 GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016); 833 GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207); 834 GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017); 835 GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208); 836 GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000); 837 GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 838 GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002); 839 GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002); 840 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008042); /* different for nv40 */ 841 GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0); 842 GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200); 843 GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0); 844 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043); 845 GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0); 846 GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0); 847 GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0); 848 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044); 849 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002); 850 GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0); 851 GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0); 852 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019); 853 GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0); 854 GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0); 855 GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0); 856 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c); 857 GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0); 858 GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0); 859 GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0); 860 /* XXX 0x0100805f if !WaitVSynvPossible */ 861 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100809f); 862 GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0); 863 GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200); 864 GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0); 865 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a); 866 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002); 867 GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0); 868 GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0); 869 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077); 870 GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0); 871 GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200); 872 GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0); 873 GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002); 874 GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff); 875 /* command buffer start with some flag in the lower bits */ 876 GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, 0x00000002); 877 GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002); 878 #if BYTE_ORDER == BIG_ENDIAN 879 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088042); 880 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043); 881 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044); 882 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019); 883 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c); 884 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108809f); 885 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a); 886 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077); 887 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001); 888 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001); 889 #endif 890 891 /* PGRAPH setup */ 892 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0); 893 GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001); 894 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0); 895 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0); 896 GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 897 GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0); 898 GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0); 899 GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 900 GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0); 901 GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0); 902 GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100); 903 GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110); 904 GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112); 905 GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff); 906 GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff); 907 GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0); 908 GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff); 909 GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001); 910 GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0); 911 GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0); 912 #if BYTE_ORDER == BIG_ENDIAN 913 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078); 914 #else 915 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078); 916 #endif 917 GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001); 918 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001); 919 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001); 920 GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001); 921 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001); 922 923 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 924 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000); 925 926 GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000); 927 GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 928 GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100); 929 GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 930 GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001); 931 /* 932 * xf86_video_nv does this in two writes, 933 * not sure if they can be combined 934 */ 935 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 936 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo & 0x0007ff00); 937 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 938 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo | 0x00020100); 939 940 /* NV_ARCH_10 */ 941 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700); 942 GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810); 943 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030); 944 945 for(i = 0; i < 128; i += 4) { 946 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i, 947 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 948 } 949 950 GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0); 951 GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0); 952 GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 953 GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 954 955 GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000); 956 GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 957 958 GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0); 959 GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0); 960 GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF); 961 GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF); 962 963 GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002); 964 GFFB_WRITE_4(GFFB_FIFO_GET, 0); 965 sc->sc_put = 0; 966 sc->sc_current = 0; 967 sc->sc_free = 0x2000; 968 969 for(i = 0; i < SKIPS; i++) 970 gffb_dmanext(sc, 0); 971 972 gffb_dmanext(sc, 0x00040000); 973 gffb_dmanext(sc, 0x80000010); 974 gffb_dmanext(sc, 0x00042000); 975 gffb_dmanext(sc, 0x80000011); 976 gffb_dmanext(sc, 0x00044000); 977 gffb_dmanext(sc, 0x80000012); 978 gffb_dmanext(sc, 0x00046000); 979 gffb_dmanext(sc, 0x80000013); 980 gffb_dmanext(sc, 0x00048000); 981 gffb_dmanext(sc, 0x80000014); 982 gffb_dmanext(sc, 0x0004A000); 983 gffb_dmanext(sc, 0x80000015); 984 gffb_dmanext(sc, 0x0004C000); 985 gffb_dmanext(sc, 0x80000016); 986 gffb_dmanext(sc, 0x0004E000); 987 gffb_dmanext(sc, 0x80000017); 988 sc->sc_free = 0x2000 - sc->sc_current; 989 990 gffb_dmastart(sc, SURFACE_FORMAT, 4); 991 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 992 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 993 gffb_dmanext(sc, 0x2000); /* src offset */ 994 gffb_dmanext(sc, 0x2000); /* dst offset */ 995 996 gffb_dmastart(sc, RECT_FORMAT, 1); 997 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 998 999 gffb_dmastart(sc, PATTERN_FORMAT, 1); 1000 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 1001 1002 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 1003 gffb_dmanext(sc, 0xffffffff); 1004 gffb_dmanext(sc, 0xffffffff); 1005 gffb_dmanext(sc, 0xffffffff); 1006 gffb_dmanext(sc, 0xffffffff); 1007 1008 gffb_dmastart(sc, ROP_SET, 1); 1009 gffb_dmanext(sc, 0xcc); 1010 sc->sc_rop = 0xcc; 1011 1012 gffb_dma_kickoff(sc); 1013 gffb_sync(sc); 1014 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 1015 1016 } 1017 1018 static void 1019 gffb_rop(struct gffb_softc *sc, int rop) 1020 { 1021 if (rop == sc->sc_rop) 1022 return; 1023 sc->sc_rop = rop; 1024 gffb_dmastart(sc, ROP_SET, 1); 1025 gffb_dmanext(sc, rop); 1026 } 1027 1028 static void 1029 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 1030 uint32_t colour) 1031 { 1032 if (!sc->sc_accel) return; 1033 mutex_enter(&sc->sc_lock); 1034 gffb_rop(sc, 0xcc); 1035 1036 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 1037 gffb_dmanext(sc, colour); 1038 1039 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1040 gffb_dmanext(sc, (x << 16) | y); 1041 gffb_dmanext(sc, (wi << 16) | he); 1042 gffb_dma_kickoff(sc); 1043 mutex_exit(&sc->sc_lock); 1044 } 1045 1046 static void 1047 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1048 int wi, int he, int rop) 1049 { 1050 struct gffb_softc *sc = cookie; 1051 1052 if (!sc->sc_accel) return; 1053 mutex_enter(&sc->sc_lock); 1054 1055 gffb_rop(sc, rop); 1056 1057 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1058 gffb_dmanext(sc, (ys << 16) | xs); 1059 gffb_dmanext(sc, (yd << 16) | xd); 1060 gffb_dmanext(sc, (he << 16) | wi); 1061 gffb_dma_kickoff(sc); 1062 mutex_exit(&sc->sc_lock); 1063 } 1064 1065 static void 1066 gffb_cursor(void *cookie, int on, int row, int col) 1067 { 1068 struct rasops_info *ri = cookie; 1069 struct vcons_screen *scr = ri->ri_hw; 1070 struct gffb_softc *sc = scr->scr_cookie; 1071 int x, y, wi, he; 1072 1073 wi = ri->ri_font->fontwidth; 1074 he = ri->ri_font->fontheight; 1075 1076 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1077 x = ri->ri_ccol * wi + ri->ri_xorigin; 1078 y = ri->ri_crow * he + ri->ri_yorigin; 1079 if (ri->ri_flg & RI_CURSOR) { 1080 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1081 ri->ri_flg &= ~RI_CURSOR; 1082 } 1083 ri->ri_crow = row; 1084 ri->ri_ccol = col; 1085 if (on) { 1086 x = ri->ri_ccol * wi + ri->ri_xorigin; 1087 y = ri->ri_crow * he + ri->ri_yorigin; 1088 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1089 ri->ri_flg |= RI_CURSOR; 1090 } 1091 } else { 1092 scr->scr_ri.ri_crow = row; 1093 scr->scr_ri.ri_ccol = col; 1094 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1095 } 1096 1097 } 1098 1099 static void 1100 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1101 { 1102 struct rasops_info *ri = cookie; 1103 struct wsdisplay_font *font = PICK_FONT(ri, c); 1104 struct vcons_screen *scr = ri->ri_hw; 1105 struct gffb_softc *sc = scr->scr_cookie; 1106 int x, y, wi, he, rv = GC_NOPE; 1107 uint32_t bg; 1108 1109 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1110 return; 1111 1112 if (!CHAR_IN_FONT(c, font)) 1113 return; 1114 1115 wi = font->fontwidth; 1116 he = font->fontheight; 1117 1118 x = ri->ri_xorigin + col * wi; 1119 y = ri->ri_yorigin + row * he; 1120 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1121 1122 if (c == 0x20) { 1123 gffb_rectfill(sc, x, y, wi, he, bg); 1124 return; 1125 } 1126 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1127 if (rv == GC_OK) 1128 return; 1129 1130 /* 1131 * Use gffb_sync to wait for the engine to become idle before 1132 * we start scribbling into VRAM -- we wouldn't want to stomp on 1133 * a scroll in progress or a prior glyphcache_add that hasn't 1134 * completed yet on the GPU. 1135 */ 1136 mutex_enter(&sc->sc_lock); 1137 gffb_sync(sc); 1138 sc->sc_putchar(cookie, row, col, c, attr); 1139 mutex_exit(&sc->sc_lock); 1140 1141 /* 1142 * If glyphcache_try asked us to, cache the newly written 1143 * character. This will issue a gffb_bitblt which will wait 1144 * for our CPU writes to the framebuffer in VRAM to complete 1145 * before triggering GPU reads from the framebuffer in VRAM. 1146 */ 1147 if (rv == GC_ADD) { 1148 glyphcache_add(&sc->sc_gc, c, x, y); 1149 } 1150 } 1151 1152 static void 1153 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1154 { 1155 struct rasops_info *ri = cookie; 1156 struct vcons_screen *scr = ri->ri_hw; 1157 struct gffb_softc *sc = scr->scr_cookie; 1158 int32_t xs, xd, y, width, height; 1159 1160 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1161 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1162 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1163 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1164 width = ri->ri_font->fontwidth * ncols; 1165 height = ri->ri_font->fontheight; 1166 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1167 } 1168 } 1169 1170 static void 1171 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1172 { 1173 struct rasops_info *ri = cookie; 1174 struct vcons_screen *scr = ri->ri_hw; 1175 struct gffb_softc *sc = scr->scr_cookie; 1176 int32_t x, y, width, height, fg, bg, ul; 1177 1178 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1179 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1180 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1181 width = ri->ri_font->fontwidth * ncols; 1182 height = ri->ri_font->fontheight; 1183 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1184 1185 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1186 } 1187 } 1188 1189 static void 1190 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1191 { 1192 struct rasops_info *ri = cookie; 1193 struct vcons_screen *scr = ri->ri_hw; 1194 struct gffb_softc *sc = scr->scr_cookie; 1195 int32_t x, ys, yd, width, height; 1196 1197 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1198 x = ri->ri_xorigin; 1199 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1200 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1201 width = ri->ri_emuwidth; 1202 height = ri->ri_font->fontheight * nrows; 1203 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1204 } 1205 } 1206 1207 static void 1208 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1209 { 1210 struct rasops_info *ri = cookie; 1211 struct vcons_screen *scr = ri->ri_hw; 1212 struct gffb_softc *sc = scr->scr_cookie; 1213 int32_t x, y, width, height, fg, bg, ul; 1214 1215 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1216 x = ri->ri_xorigin; 1217 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1218 width = ri->ri_emuwidth; 1219 height = ri->ri_font->fontheight * nrows; 1220 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1221 1222 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1223 } 1224 } 1225
Indexes created Wed Oct 15 07:09:58 GMT 2025