gffb.c revision 1.23
1 /* $NetBSD: gffb.c,v 1.23 2025/07/21 10:55:51 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far, should work on other hardware as long as 31 * something sets up a usable graphics mode and sets the right device properties 32 * This driver should work with all NV1x hardware but so far it's been tested 33 * only on NV11 / GeForce2 MX. Needs testing with more hardware and if 34 * successful, PCI IDs need to be added to gffb_match() 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.23 2025/07/21 10:55:51 macallan Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/lwp.h> 45 #include <sys/kauth.h> 46 #include <sys/atomic.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 #include <dev/pci/pciio.h> 52 #include <dev/pci/gffbreg.h> 53 54 #include <dev/wscons/wsdisplayvar.h> 55 #include <dev/wscons/wsconsio.h> 56 #include <dev/wsfont/wsfont.h> 57 #include <dev/rasops/rasops.h> 58 #include <dev/wscons/wsdisplay_vconsvar.h> 59 #include <dev/pci/wsdisplay_pci.h> 60 #include <dev/wscons/wsdisplay_glyphcachevar.h> 61 62 #include "opt_gffb.h" 63 #include "opt_vcons.h" 64 65 #ifdef GFFB_DEBUG 66 #define DPRINTF printf 67 #else 68 #define DPRINTF while(0) printf 69 #endif 70 71 struct gffb_softc { 72 device_t sc_dev; 73 74 pci_chipset_tag_t sc_pc; 75 pcitag_t sc_pcitag; 76 77 bus_space_tag_t sc_memt; 78 bus_space_tag_t sc_iot; 79 80 bus_space_handle_t sc_regh, sc_fbh; 81 bus_addr_t sc_fb, sc_reg; 82 bus_size_t sc_fbsize, sc_regsize; 83 uint8_t *sc_fbaddr; 84 size_t sc_vramsize; 85 uint32_t sc_fboffset; 86 87 int sc_width, sc_height, sc_depth, sc_stride; 88 int sc_locked, sc_accel; 89 struct vcons_screen sc_console_screen; 90 struct wsscreen_descr sc_defaultscreen_descr; 91 const struct wsscreen_descr *sc_screens[1]; 92 struct wsscreen_list sc_screenlist; 93 struct vcons_data vd; 94 int sc_mode; 95 u_char sc_cmap_red[256]; 96 u_char sc_cmap_green[256]; 97 u_char sc_cmap_blue[256]; 98 int sc_put, sc_current, sc_free; 99 uint32_t sc_rop; 100 void (*sc_putchar)(void *, int, int, u_int, long); 101 kmutex_t sc_lock; 102 glyphcache sc_gc; 103 }; 104 105 static int gffb_match(device_t, cfdata_t, void *); 106 static void gffb_attach(device_t, device_t, void *); 107 108 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 109 gffb_match, gffb_attach, NULL, NULL); 110 111 static int gffb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 112 static paddr_t gffb_mmap(void *, void *, off_t, int); 113 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 114 115 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 116 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 117 static void gffb_restore_palette(struct gffb_softc *); 118 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 119 uint8_t, uint8_t); 120 121 static void gffb_init(struct gffb_softc *); 122 123 static void gffb_make_room(struct gffb_softc *, int); 124 static void gffb_sync(struct gffb_softc *); 125 126 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 127 uint32_t); 128 static void gffb_bitblt(void *, int, int, int, int, int, int, int); 129 static void gffb_rop(struct gffb_softc *, int); 130 131 static void gffb_cursor(void *, int, int, int); 132 static void gffb_putchar(void *, int, int, u_int, long); 133 static void gffb_copycols(void *, int, int, int, int); 134 static void gffb_erasecols(void *, int, int, int, long); 135 static void gffb_copyrows(void *, int, int, int); 136 static void gffb_eraserows(void *, int, int, long); 137 138 #define GFFB_READ_4(o) bus_space_read_4(sc->sc_memt, sc->sc_regh, (o)) 139 #define GFFB_WRITE_4(o, v) bus_space_write_4(sc->sc_memt, sc->sc_regh, (o), (v)) 140 141 struct wsdisplay_accessops gffb_accessops = { 142 gffb_ioctl, 143 gffb_mmap, 144 NULL, /* alloc_screen */ 145 NULL, /* free_screen */ 146 NULL, /* show_screen */ 147 NULL, /* load_font */ 148 NULL, /* pollc */ 149 NULL /* scroll */ 150 }; 151 152 static int 153 gffb_match(device_t parent, cfdata_t match, void *aux) 154 { 155 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 156 157 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 158 return 0; 159 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 160 return 0; 161 162 /* only card tested on so far - likely need a list */ 163 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 164 return 100; 165 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE_6800U) 166 return 100; 167 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GF_FXGO5200) 168 return 100; 169 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GF_FX5200U) 170 return 100; 171 return (0); 172 } 173 174 static void 175 gffb_attach(device_t parent, device_t self, void *aux) 176 { 177 struct gffb_softc *sc = device_private(self); 178 struct pci_attach_args *pa = aux; 179 struct rasops_info *ri; 180 bus_space_tag_t tag; 181 struct wsemuldisplaydev_attach_args aa; 182 prop_dictionary_t dict; 183 unsigned long defattr; 184 pcireg_t reg; 185 bool is_console = FALSE; 186 uint32_t addr; 187 int i, j, f; 188 uint8_t cmap[768]; 189 190 sc->sc_pc = pa->pa_pc; 191 sc->sc_pcitag = pa->pa_tag; 192 sc->sc_memt = pa->pa_memt; 193 sc->sc_iot = pa->pa_iot; 194 sc->sc_dev = self; 195 196 /* first, see what kind of chip we've got */ 197 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_ID_REG); 198 sc->sc_accel = PCI_PRODUCT(reg) == PCI_PRODUCT_NVIDIA_GEFORCE2MX; 199 200 pci_aprint_devinfo(pa, NULL); 201 202 /* fill in parameters from properties */ 203 dict = device_properties(self); 204 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 205 aprint_error("%s: no width property\n", device_xname(self)); 206 return; 207 } 208 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 209 aprint_error("%s: no height property\n", device_xname(self)); 210 return; 211 } 212 213 #ifdef GLYPHCACHE_DEBUG 214 /* leave some visible VRAM unused so we can see the glyph cache */ 215 sc->sc_height -= 300; 216 #endif 217 218 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 219 aprint_error("%s: no depth property\n", device_xname(self)); 220 return; 221 } 222 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 223 aprint_error("%s: no linebytes property\n", 224 device_xname(self)); 225 return; 226 } 227 228 /* 229 * on !2MX we need to use the firmware's offset - for some reason 230 * register writes to anything other than the DACs go wrong 231 */ 232 sc->sc_fboffset = 0; 233 if (prop_dictionary_get_uint32(dict, "address", &addr)) { 234 sc->sc_fboffset = addr & 0x000fffff; /* XXX */ 235 } 236 237 prop_dictionary_get_bool(dict, "is_console", &is_console); 238 239 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 240 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 241 aprint_error("%s: failed to map registers.\n", 242 device_xname(sc->sc_dev)); 243 } 244 sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000; 245 246 /* don't map more VRAM than we actually have */ 247 if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, 248 0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) { 249 aprint_error("%s: can't find the framebuffer?!\n", 250 device_xname(sc->sc_dev)); 251 } 252 if (sc->sc_vramsize == 0) sc->sc_vramsize = sc->sc_fbsize; 253 254 /* don't map (much) more than we actually need */ 255 if (bus_space_map(sc->sc_memt, sc->sc_fb, 0x1000000, 256 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 257 &sc->sc_fbh)) { 258 aprint_error("%s: failed to map the framebuffer.\n", 259 device_xname(sc->sc_dev)); 260 } 261 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 262 263 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 264 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 265 aprint_normal_dev(sc->sc_dev, "%d MB video memory\n", 266 (int)(sc->sc_vramsize >> 20)); 267 268 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 269 "default", 270 0, 0, 271 NULL, 272 8, 16, 273 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 274 NULL 275 }; 276 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 277 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 278 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 279 sc->sc_locked = 0; 280 281 #ifdef GFFB_DEBUG 282 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 283 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 284 #endif 285 286 /* 287 * we don't have hardware synchronization so we need a lock to serialize 288 * access to the DMA buffer between normal and kernel output 289 * actually it might be enough to use atomic ops on sc_current, sc_free 290 * etc. but for now we'll play it safe 291 * XXX we will probably deadlock if we take an interrupt while sc_lock 292 * is held and then try to printf() 293 */ 294 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 295 296 /* init engine here */ 297 gffb_init(sc); 298 299 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 300 &gffb_accessops); 301 sc->vd.init_screen = gffb_init_screen; 302 303 304 ri = &sc->sc_console_screen.scr_ri; 305 306 if (sc->sc_accel) { 307 sc->sc_gc.gc_bitblt = gffb_bitblt; 308 sc->sc_gc.gc_blitcookie = sc; 309 sc->sc_gc.gc_rop = 0xcc; 310 } 311 312 if (is_console) { 313 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 314 &defattr); 315 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 316 317 if (sc->sc_accel) { 318 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 319 ri->ri_devcmap[(defattr >> 16) & 0xf]); 320 } else { 321 memset(sc->sc_fbaddr + sc->sc_fboffset, 322 ri->ri_devcmap[(defattr >> 16) & 0xf], 323 sc->sc_stride * sc->sc_height); 324 } 325 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 326 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 327 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 328 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 329 330 if (sc->sc_accel) 331 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 332 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 333 sc->sc_width, 334 ri->ri_font->fontwidth, 335 ri->ri_font->fontheight, 336 defattr); 337 338 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 339 defattr); 340 vcons_replay_msgbuf(&sc->sc_console_screen); 341 } else { 342 /* 343 * since we're not the console we can postpone the rest 344 * until someone actually allocates a screen for us 345 */ 346 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 347 /* do some minimal setup to avoid weirdnesses later */ 348 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 349 &defattr); 350 } else 351 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 352 353 if (sc->sc_accel) 354 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 355 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 356 sc->sc_width, 357 ri->ri_font->fontwidth, 358 ri->ri_font->fontheight, 359 defattr); 360 } 361 362 j = 0; 363 rasops_get_cmap(ri, cmap, sizeof(cmap)); 364 for (i = 0; i < 256; i++) { 365 sc->sc_cmap_red[i] = cmap[j]; 366 sc->sc_cmap_green[i] = cmap[j + 1]; 367 sc->sc_cmap_blue[i] = cmap[j + 2]; 368 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 369 j += 3; 370 } 371 372 /* no suspend/resume support yet */ 373 if (!pmf_device_register(sc->sc_dev, NULL, NULL)) 374 aprint_error_dev(sc->sc_dev, 375 "couldn't establish power handler\n"); 376 377 aa.console = is_console; 378 aa.scrdata = &sc->sc_screenlist; 379 aa.accessops = &gffb_accessops; 380 aa.accesscookie = &sc->vd; 381 382 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 383 384 #ifdef GFFB_DEBUG 385 for (i = 0; i < 40; i++) { 386 for (j = 0; j < 40; j++) { 387 gffb_rectfill(sc, i * 20, j * 20, 20, 20, 388 (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303); 389 } 390 } 391 392 gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292); 393 gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc); 394 gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc); 395 gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc); 396 gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc); 397 gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc); 398 gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc); 399 gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc); 400 gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc); 401 gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc); 402 gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc); 403 gffb_sync(sc); 404 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 405 #endif 406 } 407 408 static int 409 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 410 { 411 struct vcons_data *vd = v; 412 struct gffb_softc *sc = vd->cookie; 413 struct wsdisplay_fbinfo *wdf; 414 struct vcons_screen *ms = vd->active; 415 416 switch (cmd) { 417 case WSDISPLAYIO_GTYPE: 418 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 419 return 0; 420 421 /* PCI config read/write passthrough. */ 422 case PCI_IOC_CFGREAD: 423 case PCI_IOC_CFGWRITE: 424 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 425 cmd, data, flag, l); 426 427 case WSDISPLAYIO_GET_BUSID: 428 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 429 sc->sc_pcitag, data); 430 431 case WSDISPLAYIO_GINFO: 432 if (ms == NULL) 433 return ENODEV; 434 wdf = (void *)data; 435 wdf->height = ms->scr_ri.ri_height; 436 wdf->width = ms->scr_ri.ri_width; 437 wdf->depth = ms->scr_ri.ri_depth; 438 wdf->cmsize = 256; 439 return 0; 440 441 case WSDISPLAYIO_GETCMAP: 442 return gffb_getcmap(sc, 443 (struct wsdisplay_cmap *)data); 444 445 case WSDISPLAYIO_PUTCMAP: 446 return gffb_putcmap(sc, 447 (struct wsdisplay_cmap *)data); 448 449 case WSDISPLAYIO_LINEBYTES: 450 *(u_int *)data = sc->sc_stride; 451 return 0; 452 453 case WSDISPLAYIO_SMODE: { 454 int new_mode = *(int*)data; 455 if (new_mode != sc->sc_mode) { 456 sc->sc_mode = new_mode; 457 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 458 gffb_init(sc); 459 gffb_restore_palette(sc); 460 if (sc->sc_accel) { 461 glyphcache_wipe(&sc->sc_gc); 462 gffb_rectfill(sc, 0, 0, sc->sc_width, 463 sc->sc_height, ms->scr_ri.ri_devcmap[ 464 (ms->scr_defattr >> 16) & 0xf]); 465 } else { 466 memset(sc->sc_fbaddr + sc->sc_fboffset, 467 ms->scr_ri.ri_devcmap[ 468 (ms->scr_defattr >> 16) & 0xf], 469 sc->sc_stride * sc->sc_height); 470 } 471 vcons_redraw_screen(ms); 472 } 473 } 474 } 475 return 0; 476 477 case WSDISPLAYIO_GET_EDID: { 478 struct wsdisplayio_edid_info *d = data; 479 return wsdisplayio_get_edid(sc->sc_dev, d); 480 } 481 482 case WSDISPLAYIO_GET_FBINFO: { 483 struct wsdisplayio_fbinfo *fbi = data; 484 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 485 } 486 } 487 return EPASSTHROUGH; 488 } 489 490 static paddr_t 491 gffb_mmap(void *v, void *vs, off_t offset, int prot) 492 { 493 struct vcons_data *vd = v; 494 struct gffb_softc *sc = vd->cookie; 495 paddr_t pa; 496 497 /* 'regular' framebuffer mmap()ing */ 498 if (offset < sc->sc_vramsize) { 499 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 500 0, prot, BUS_SPACE_MAP_LINEAR); 501 return pa; 502 } 503 504 /* 505 * restrict all other mappings to processes with superuser privileges 506 * or the kernel itself 507 */ 508 if (kauth_authorize_machdep(kauth_cred_get(), 509 KAUTH_MACHDEP_UNMANAGEDMEM, 510 NULL, NULL, NULL, NULL) != 0) { 511 aprint_normal("%s: mmap() rejected.\n", 512 device_xname(sc->sc_dev)); 513 return -1; 514 } 515 516 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 517 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 518 BUS_SPACE_MAP_LINEAR); 519 return pa; 520 } 521 522 if ((offset >= sc->sc_reg) && 523 (offset < (sc->sc_reg + sc->sc_regsize))) { 524 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 525 BUS_SPACE_MAP_LINEAR); 526 return pa; 527 } 528 529 #ifdef PCI_MAGIC_IO_RANGE 530 /* allow mapping of IO space */ 531 if ((offset >= PCI_MAGIC_IO_RANGE) && 532 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 533 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 534 0, prot, BUS_SPACE_MAP_LINEAR); 535 return pa; 536 } 537 #endif 538 539 return -1; 540 } 541 542 static void 543 gffb_init_screen(void *cookie, struct vcons_screen *scr, 544 int existing, long *defattr) 545 { 546 struct gffb_softc *sc = cookie; 547 struct rasops_info *ri = &scr->scr_ri; 548 549 ri->ri_depth = sc->sc_depth; 550 ri->ri_width = sc->sc_width; 551 ri->ri_height = sc->sc_height; 552 ri->ri_stride = sc->sc_stride; 553 if (sc->sc_depth == 8) 554 ri->ri_bits = sc->sc_fbaddr + sc->sc_fboffset; 555 ri->ri_flg = RI_CENTER; 556 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 557 558 rasops_init(ri, 0, 0); 559 ri->ri_caps = WSSCREEN_WSCOLORS; 560 561 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 562 sc->sc_width / ri->ri_font->fontwidth); 563 564 ri->ri_hw = scr; 565 566 if (sc->sc_accel) { 567 sc->sc_putchar = ri->ri_ops.putchar; 568 ri->ri_ops.copyrows = gffb_copyrows; 569 ri->ri_ops.copycols = gffb_copycols; 570 ri->ri_ops.eraserows = gffb_eraserows; 571 ri->ri_ops.erasecols = gffb_erasecols; 572 ri->ri_ops.cursor = gffb_cursor; 573 ri->ri_ops.putchar = gffb_putchar; 574 } else { 575 scr->scr_flags |= VCONS_DONT_READ; 576 } 577 } 578 579 static int 580 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 581 { 582 u_char *r, *g, *b; 583 u_int index = cm->index; 584 u_int count = cm->count; 585 int i, error; 586 u_char rbuf[256], gbuf[256], bbuf[256]; 587 588 #ifdef GFFB_DEBUG 589 aprint_debug("putcmap: %d %d\n",index, count); 590 #endif 591 if (cm->index >= 256 || cm->count > 256 || 592 (cm->index + cm->count) > 256) 593 return EINVAL; 594 error = copyin(cm->red, &rbuf[index], count); 595 if (error) 596 return error; 597 error = copyin(cm->green, &gbuf[index], count); 598 if (error) 599 return error; 600 error = copyin(cm->blue, &bbuf[index], count); 601 if (error) 602 return error; 603 604 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 605 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 606 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 607 608 r = &sc->sc_cmap_red[index]; 609 g = &sc->sc_cmap_green[index]; 610 b = &sc->sc_cmap_blue[index]; 611 612 for (i = 0; i < count; i++) { 613 gffb_putpalreg(sc, index, *r, *g, *b); 614 index++; 615 r++, g++, b++; 616 } 617 return 0; 618 } 619 620 static int 621 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 622 { 623 u_int index = cm->index; 624 u_int count = cm->count; 625 int error; 626 627 if (index >= 255 || count > 256 || index + count > 256) 628 return EINVAL; 629 630 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 631 if (error) 632 return error; 633 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 634 if (error) 635 return error; 636 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 637 if (error) 638 return error; 639 640 return 0; 641 } 642 643 static void 644 gffb_restore_palette(struct gffb_softc *sc) 645 { 646 int i; 647 648 for (i = 0; i < (1 << sc->sc_depth); i++) { 649 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 650 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 651 } 652 } 653 654 static int 655 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 656 uint8_t b) 657 { 658 /* port 0 */ 659 bus_space_write_1(sc->sc_memt, sc->sc_regh, 660 GFFB_PDIO0 + GFFB_PEL_IW, idx); 661 bus_space_write_1(sc->sc_memt, sc->sc_regh, 662 GFFB_PDIO0 + GFFB_PEL_D, r); 663 bus_space_write_1(sc->sc_memt, sc->sc_regh, 664 GFFB_PDIO0 + GFFB_PEL_D, g); 665 bus_space_write_1(sc->sc_memt, sc->sc_regh, 666 GFFB_PDIO0 + GFFB_PEL_D, b); 667 668 /* port 1 */ 669 bus_space_write_1(sc->sc_memt, sc->sc_regh, 670 GFFB_PDIO1 + GFFB_PEL_IW, idx); 671 bus_space_write_1(sc->sc_memt, sc->sc_regh, 672 GFFB_PDIO1 + GFFB_PEL_D, r); 673 bus_space_write_1(sc->sc_memt, sc->sc_regh, 674 GFFB_PDIO1 + GFFB_PEL_D, g); 675 bus_space_write_1(sc->sc_memt, sc->sc_regh, 676 GFFB_PDIO1 + GFFB_PEL_D, b); 677 678 return 0; 679 } 680 681 682 static void 683 gffb_dma_kickoff(struct gffb_softc *sc) 684 { 685 686 if (sc->sc_current != sc->sc_put) { 687 sc->sc_put = sc->sc_current; 688 bus_space_barrier(sc->sc_memt, sc->sc_fbh, 0, 0x1000000, 689 BUS_SPACE_BARRIER_WRITE); 690 (void)*sc->sc_fbaddr; 691 GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put); 692 bus_space_barrier(sc->sc_memt, sc->sc_regh, GFFB_FIFO_PUT, 4, 693 BUS_SPACE_BARRIER_WRITE); 694 } 695 } 696 697 static void 698 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 699 { 700 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 701 sc->sc_current += 4; 702 } 703 704 static void 705 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 706 { 707 if(sc->sc_free <= (size << 2)) 708 gffb_make_room(sc, size); 709 gffb_dmanext(sc, ((size) << 18) | (tag)); 710 sc->sc_free -= ((size + 1) << 2); 711 } 712 713 /* 714 * from xf86_video_nv/nv_xaa.c: 715 * There is a HW race condition with videoram command buffers. 716 * You can't jump to the location of your put offset. We write put 717 * at the jump offset + SKIPS dwords with noop padding in between 718 * to solve this problem 719 */ 720 721 #define SKIPS 8 722 723 static void 724 gffb_make_room(struct gffb_softc *sc, int size) 725 { 726 uint32_t get; 727 728 size = (size + 1) << 2; /* slots -> offset */ 729 730 while (sc->sc_free < size) { 731 get = GFFB_READ_4(GFFB_FIFO_GET); 732 733 if (sc->sc_put >= get) { 734 sc->sc_free = 0x2000 - sc->sc_current; 735 if (sc->sc_free < size) { 736 gffb_dmanext(sc, 0x20000000); 737 if(get <= (SKIPS << 2)) { 738 if (sc->sc_put <= (SKIPS << 2)) { 739 /* corner case - will be idle */ 740 GFFB_WRITE_4(GFFB_FIFO_PUT, 741 (SKIPS + 1) << 2); 742 } 743 do { 744 get =GFFB_READ_4(GFFB_FIFO_GET); 745 } while (get <= (SKIPS << 2)); 746 } 747 GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2); 748 sc->sc_current = sc->sc_put = (SKIPS << 2); 749 sc->sc_free = get - ((SKIPS + 1) << 2); 750 } 751 } else 752 sc->sc_free = get - sc->sc_current - 4; 753 } 754 } 755 756 static void 757 gffb_sync(struct gffb_softc *sc) 758 { 759 int bail; 760 int i; 761 762 /* 763 * if there are commands in the buffer make sure the chip is actually 764 * trying to run them 765 */ 766 gffb_dma_kickoff(sc); 767 768 /* now wait for the command buffer to drain... */ 769 bail = 100000000; 770 while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) { 771 bail--; 772 } 773 if (bail == 0) goto crap; 774 775 /* ... and for the engine to go idle */ 776 bail = 100000000; 777 while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) { 778 bail--; 779 } 780 if (bail == 0) goto crap; 781 return; 782 crap: 783 /* if we time out fill the buffer with NOPs and cross fingers */ 784 sc->sc_put = 0; 785 sc->sc_current = 0; 786 for (i = 0; i < 0x2000; i += 4) 787 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 788 aprint_error_dev(sc->sc_dev, "DMA lockup\n"); 789 } 790 791 static void 792 gffb_init(struct gffb_softc *sc) 793 { 794 int i; 795 uint32_t foo; 796 797 if (!sc->sc_accel) return; 798 799 sc->sc_fboffset = 0x2000; 800 801 /* init display start */ 802 GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, sc->sc_fboffset); 803 GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, sc->sc_fboffset); 804 GFFB_WRITE_4(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 805 GFFB_WRITE_4(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 806 807 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 808 GFFB_WRITE_4(GFFB_PMC + 0x140, 0); 809 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff); 810 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff); 811 GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8); 812 GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3); 813 GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0); 814 GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff); 815 816 for (i = 0; i < 8; i++) { 817 GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0); 818 GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10), 819 sc->sc_vramsize - 1); 820 } 821 822 GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010); 823 GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201); 824 GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011); 825 GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202); 826 GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012); 827 GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203); 828 GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013); 829 GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204); 830 GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014); 831 GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205); 832 GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015); 833 GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206); 834 GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016); 835 GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207); 836 GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017); 837 GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208); 838 GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000); 839 GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 840 GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002); 841 GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002); 842 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008042); /* different for nv40 */ 843 GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0); 844 GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200); 845 GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0); 846 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043); 847 GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0); 848 GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0); 849 GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0); 850 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044); 851 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002); 852 GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0); 853 GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0); 854 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019); 855 GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0); 856 GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0); 857 GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0); 858 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c); 859 GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0); 860 GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0); 861 GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0); 862 /* XXX 0x0100805f if !WaitVSynvPossible */ 863 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100809f); 864 GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0); 865 GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200); 866 GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0); 867 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a); 868 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002); 869 GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0); 870 GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0); 871 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077); 872 GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0); 873 GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200); 874 GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0); 875 GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002); 876 GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff); 877 /* command buffer start with some flag in the lower bits */ 878 GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, 0x00000002); 879 GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002); 880 #if BYTE_ORDER == BIG_ENDIAN 881 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088042); 882 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043); 883 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044); 884 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019); 885 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c); 886 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108809f); 887 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a); 888 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077); 889 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001); 890 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001); 891 #endif 892 893 /* PGRAPH setup */ 894 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0); 895 GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001); 896 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0); 897 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0); 898 GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 899 GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0); 900 GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0); 901 GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 902 GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0); 903 GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0); 904 GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100); 905 GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110); 906 GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112); 907 GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff); 908 GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff); 909 GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0); 910 GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff); 911 GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001); 912 GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0); 913 GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0); 914 #if BYTE_ORDER == BIG_ENDIAN 915 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078); 916 #else 917 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078); 918 #endif 919 GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001); 920 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001); 921 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001); 922 GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001); 923 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001); 924 925 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 926 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000); 927 928 GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000); 929 GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 930 GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100); 931 GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 932 GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001); 933 /* 934 * xf86_video_nv does this in two writes, 935 * not sure if they can be combined 936 */ 937 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 938 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo & 0x0007ff00); 939 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 940 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo | 0x00020100); 941 942 /* NV_ARCH_10 */ 943 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700); 944 GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810); 945 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030); 946 947 for(i = 0; i < 128; i += 4) { 948 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i, 949 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 950 } 951 952 GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0); 953 GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0); 954 GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 955 GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 956 957 GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000); 958 GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 959 960 GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0); 961 GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0); 962 GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF); 963 GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF); 964 965 GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002); 966 GFFB_WRITE_4(GFFB_FIFO_GET, 0); 967 sc->sc_put = 0; 968 sc->sc_current = 0; 969 sc->sc_free = 0x2000; 970 971 for(i = 0; i < SKIPS; i++) 972 gffb_dmanext(sc, 0); 973 974 gffb_dmanext(sc, 0x00040000); 975 gffb_dmanext(sc, 0x80000010); 976 gffb_dmanext(sc, 0x00042000); 977 gffb_dmanext(sc, 0x80000011); 978 gffb_dmanext(sc, 0x00044000); 979 gffb_dmanext(sc, 0x80000012); 980 gffb_dmanext(sc, 0x00046000); 981 gffb_dmanext(sc, 0x80000013); 982 gffb_dmanext(sc, 0x00048000); 983 gffb_dmanext(sc, 0x80000014); 984 gffb_dmanext(sc, 0x0004A000); 985 gffb_dmanext(sc, 0x80000015); 986 gffb_dmanext(sc, 0x0004C000); 987 gffb_dmanext(sc, 0x80000016); 988 gffb_dmanext(sc, 0x0004E000); 989 gffb_dmanext(sc, 0x80000017); 990 sc->sc_free = 0x2000 - sc->sc_current; 991 992 gffb_dmastart(sc, SURFACE_FORMAT, 4); 993 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 994 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 995 gffb_dmanext(sc, 0x2000); /* src offset */ 996 gffb_dmanext(sc, 0x2000); /* dst offset */ 997 998 gffb_dmastart(sc, RECT_FORMAT, 1); 999 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 1000 1001 gffb_dmastart(sc, PATTERN_FORMAT, 1); 1002 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 1003 1004 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 1005 gffb_dmanext(sc, 0xffffffff); 1006 gffb_dmanext(sc, 0xffffffff); 1007 gffb_dmanext(sc, 0xffffffff); 1008 gffb_dmanext(sc, 0xffffffff); 1009 1010 gffb_dmastart(sc, ROP_SET, 1); 1011 gffb_dmanext(sc, 0xcc); 1012 sc->sc_rop = 0xcc; 1013 1014 gffb_dma_kickoff(sc); 1015 gffb_sync(sc); 1016 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 1017 1018 } 1019 1020 static void 1021 gffb_rop(struct gffb_softc *sc, int rop) 1022 { 1023 if (rop == sc->sc_rop) 1024 return; 1025 sc->sc_rop = rop; 1026 gffb_dmastart(sc, ROP_SET, 1); 1027 gffb_dmanext(sc, rop); 1028 } 1029 1030 static void 1031 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 1032 uint32_t colour) 1033 { 1034 if (!sc->sc_accel) return; 1035 mutex_enter(&sc->sc_lock); 1036 gffb_rop(sc, 0xcc); 1037 1038 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 1039 gffb_dmanext(sc, colour); 1040 1041 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1042 gffb_dmanext(sc, (x << 16) | y); 1043 gffb_dmanext(sc, (wi << 16) | he); 1044 gffb_dma_kickoff(sc); 1045 mutex_exit(&sc->sc_lock); 1046 } 1047 1048 static void 1049 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1050 int wi, int he, int rop) 1051 { 1052 struct gffb_softc *sc = cookie; 1053 1054 if (!sc->sc_accel) return; 1055 mutex_enter(&sc->sc_lock); 1056 1057 gffb_rop(sc, rop); 1058 1059 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1060 gffb_dmanext(sc, (ys << 16) | xs); 1061 gffb_dmanext(sc, (yd << 16) | xd); 1062 gffb_dmanext(sc, (he << 16) | wi); 1063 gffb_dma_kickoff(sc); 1064 mutex_exit(&sc->sc_lock); 1065 } 1066 1067 static void 1068 gffb_cursor(void *cookie, int on, int row, int col) 1069 { 1070 struct rasops_info *ri = cookie; 1071 struct vcons_screen *scr = ri->ri_hw; 1072 struct gffb_softc *sc = scr->scr_cookie; 1073 int x, y, wi, he; 1074 1075 wi = ri->ri_font->fontwidth; 1076 he = ri->ri_font->fontheight; 1077 1078 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1079 x = ri->ri_ccol * wi + ri->ri_xorigin; 1080 y = ri->ri_crow * he + ri->ri_yorigin; 1081 if (ri->ri_flg & RI_CURSOR) { 1082 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1083 ri->ri_flg &= ~RI_CURSOR; 1084 } 1085 ri->ri_crow = row; 1086 ri->ri_ccol = col; 1087 if (on) { 1088 x = ri->ri_ccol * wi + ri->ri_xorigin; 1089 y = ri->ri_crow * he + ri->ri_yorigin; 1090 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1091 ri->ri_flg |= RI_CURSOR; 1092 } 1093 } else { 1094 scr->scr_ri.ri_crow = row; 1095 scr->scr_ri.ri_ccol = col; 1096 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1097 } 1098 1099 } 1100 1101 static void 1102 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1103 { 1104 struct rasops_info *ri = cookie; 1105 struct wsdisplay_font *font = PICK_FONT(ri, c); 1106 struct vcons_screen *scr = ri->ri_hw; 1107 struct gffb_softc *sc = scr->scr_cookie; 1108 int x, y, wi, he, rv = GC_NOPE; 1109 uint32_t bg; 1110 1111 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1112 return; 1113 1114 if (!CHAR_IN_FONT(c, font)) 1115 return; 1116 1117 wi = font->fontwidth; 1118 he = font->fontheight; 1119 1120 x = ri->ri_xorigin + col * wi; 1121 y = ri->ri_yorigin + row * he; 1122 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1123 1124 if (c == 0x20) { 1125 gffb_rectfill(sc, x, y, wi, he, bg); 1126 return; 1127 } 1128 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1129 if (rv == GC_OK) 1130 return; 1131 1132 /* 1133 * Use gffb_sync to wait for the engine to become idle before 1134 * we start scribbling into VRAM -- we wouldn't want to stomp on 1135 * a scroll in progress or a prior glyphcache_add that hasn't 1136 * completed yet on the GPU. 1137 */ 1138 mutex_enter(&sc->sc_lock); 1139 gffb_sync(sc); 1140 sc->sc_putchar(cookie, row, col, c, attr); 1141 mutex_exit(&sc->sc_lock); 1142 1143 /* 1144 * If glyphcache_try asked us to, cache the newly written 1145 * character. This will issue a gffb_bitblt which will wait 1146 * for our CPU writes to the framebuffer in VRAM to complete 1147 * before triggering GPU reads from the framebuffer in VRAM. 1148 */ 1149 if (rv == GC_ADD) { 1150 glyphcache_add(&sc->sc_gc, c, x, y); 1151 } 1152 } 1153 1154 static void 1155 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1156 { 1157 struct rasops_info *ri = cookie; 1158 struct vcons_screen *scr = ri->ri_hw; 1159 struct gffb_softc *sc = scr->scr_cookie; 1160 int32_t xs, xd, y, width, height; 1161 1162 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1163 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1164 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1165 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1166 width = ri->ri_font->fontwidth * ncols; 1167 height = ri->ri_font->fontheight; 1168 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1169 } 1170 } 1171 1172 static void 1173 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1174 { 1175 struct rasops_info *ri = cookie; 1176 struct vcons_screen *scr = ri->ri_hw; 1177 struct gffb_softc *sc = scr->scr_cookie; 1178 int32_t x, y, width, height, fg, bg, ul; 1179 1180 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1181 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1182 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1183 width = ri->ri_font->fontwidth * ncols; 1184 height = ri->ri_font->fontheight; 1185 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1186 1187 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1188 } 1189 } 1190 1191 static void 1192 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1193 { 1194 struct rasops_info *ri = cookie; 1195 struct vcons_screen *scr = ri->ri_hw; 1196 struct gffb_softc *sc = scr->scr_cookie; 1197 int32_t x, ys, yd, width, height; 1198 1199 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1200 x = ri->ri_xorigin; 1201 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1202 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1203 width = ri->ri_emuwidth; 1204 height = ri->ri_font->fontheight * nrows; 1205 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1206 } 1207 } 1208 1209 static void 1210 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1211 { 1212 struct rasops_info *ri = cookie; 1213 struct vcons_screen *scr = ri->ri_hw; 1214 struct gffb_softc *sc = scr->scr_cookie; 1215 int32_t x, y, width, height, fg, bg, ul; 1216 1217 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1218 x = ri->ri_xorigin; 1219 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1220 width = ri->ri_emuwidth; 1221 height = ri->ri_font->fontheight * nrows; 1222 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1223 1224 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1225 } 1226 } 1227
Indexes created Mon Sep 29 21:09:56 GMT 2025