gffb.c revision 1.24
1 /* $NetBSD: gffb.c,v 1.24 2025/07/22 04:45:13 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far, should work on other hardware as long as 31 * something sets up a usable graphics mode and sets the right device properties 32 * This driver should work with all NV1x hardware but so far it's been tested 33 * only on NV11 / GeForce2 MX. Needs testing with more hardware and if 34 * successful, PCI IDs need to be added to gffb_match() 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.24 2025/07/22 04:45:13 macallan Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/lwp.h> 45 #include <sys/kauth.h> 46 #include <sys/atomic.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 #include <dev/pci/pciio.h> 52 #include <dev/pci/gffbreg.h> 53 54 #include <dev/wscons/wsdisplayvar.h> 55 #include <dev/wscons/wsconsio.h> 56 #include <dev/wsfont/wsfont.h> 57 #include <dev/rasops/rasops.h> 58 #include <dev/wscons/wsdisplay_vconsvar.h> 59 #include <dev/pci/wsdisplay_pci.h> 60 #include <dev/wscons/wsdisplay_glyphcachevar.h> 61 62 #include "opt_gffb.h" 63 #include "opt_vcons.h" 64 65 #ifdef GFFB_DEBUG 66 #define DPRINTF printf 67 #else 68 #define DPRINTF while(0) printf 69 #endif 70 71 struct gffb_softc { 72 device_t sc_dev; 73 74 pci_chipset_tag_t sc_pc; 75 pcitag_t sc_pcitag; 76 77 bus_space_tag_t sc_memt; 78 bus_space_tag_t sc_iot; 79 80 bus_space_handle_t sc_regh, sc_fbh; 81 bus_addr_t sc_fb, sc_reg; 82 bus_size_t sc_fbsize, sc_regsize; 83 uint8_t *sc_fbaddr; 84 size_t sc_vramsize; 85 uint32_t sc_fboffset; 86 87 int sc_width, sc_height, sc_depth, sc_stride; 88 int sc_locked, sc_accel; 89 struct vcons_screen sc_console_screen; 90 struct wsscreen_descr sc_defaultscreen_descr; 91 const struct wsscreen_descr *sc_screens[1]; 92 struct wsscreen_list sc_screenlist; 93 struct vcons_data vd; 94 int sc_mode; 95 u_char sc_cmap_red[256]; 96 u_char sc_cmap_green[256]; 97 u_char sc_cmap_blue[256]; 98 int sc_put, sc_current, sc_free; 99 uint32_t sc_rop; 100 void (*sc_putchar)(void *, int, int, u_int, long); 101 kmutex_t sc_lock; 102 glyphcache sc_gc; 103 }; 104 105 static int gffb_match(device_t, cfdata_t, void *); 106 static void gffb_attach(device_t, device_t, void *); 107 108 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 109 gffb_match, gffb_attach, NULL, NULL); 110 111 static int gffb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 112 static paddr_t gffb_mmap(void *, void *, off_t, int); 113 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 114 115 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 116 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 117 static void gffb_restore_palette(struct gffb_softc *); 118 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 119 uint8_t, uint8_t); 120 121 static void gffb_init(struct gffb_softc *); 122 123 static void gffb_make_room(struct gffb_softc *, int); 124 static void gffb_sync(struct gffb_softc *); 125 126 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 127 uint32_t); 128 static void gffb_bitblt(void *, int, int, int, int, int, int, int); 129 static void gffb_rop(struct gffb_softc *, int); 130 131 static void gffb_cursor(void *, int, int, int); 132 static void gffb_putchar(void *, int, int, u_int, long); 133 static void gffb_copycols(void *, int, int, int, int); 134 static void gffb_erasecols(void *, int, int, int, long); 135 static void gffb_copyrows(void *, int, int, int); 136 static void gffb_eraserows(void *, int, int, long); 137 138 #define GFFB_READ_4(o) bus_space_read_4(sc->sc_memt, sc->sc_regh, (o)) 139 #define GFFB_WRITE_4(o, v) bus_space_write_4(sc->sc_memt, sc->sc_regh, (o), (v)) 140 141 struct wsdisplay_accessops gffb_accessops = { 142 gffb_ioctl, 143 gffb_mmap, 144 NULL, /* alloc_screen */ 145 NULL, /* free_screen */ 146 NULL, /* show_screen */ 147 NULL, /* load_font */ 148 NULL, /* pollc */ 149 NULL /* scroll */ 150 }; 151 152 static int 153 gffb_match(device_t parent, cfdata_t match, void *aux) 154 { 155 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 156 157 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 158 return 0; 159 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 160 return 0; 161 162 /* only card tested on so far - likely need a list */ 163 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 164 return 100; 165 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE_6800U) 166 return 100; 167 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GF_FXGO5200) 168 return 100; 169 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GF_FX5200U) 170 return 100; 171 return (0); 172 } 173 174 static void 175 gffb_attach(device_t parent, device_t self, void *aux) 176 { 177 struct gffb_softc *sc = device_private(self); 178 struct pci_attach_args *pa = aux; 179 struct rasops_info *ri; 180 bus_space_tag_t tag; 181 struct wsemuldisplaydev_attach_args aa; 182 prop_dictionary_t dict; 183 unsigned long defattr; 184 pcireg_t reg; 185 bool is_console = FALSE; 186 uint32_t addr; 187 int i, j, f; 188 uint8_t cmap[768]; 189 190 sc->sc_pc = pa->pa_pc; 191 sc->sc_pcitag = pa->pa_tag; 192 sc->sc_memt = pa->pa_memt; 193 sc->sc_iot = pa->pa_iot; 194 sc->sc_dev = self; 195 196 /* first, see what kind of chip we've got */ 197 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_ID_REG); 198 sc->sc_accel = PCI_PRODUCT(reg) == PCI_PRODUCT_NVIDIA_GEFORCE2MX; 199 200 pci_aprint_devinfo(pa, NULL); 201 202 /* fill in parameters from properties */ 203 dict = device_properties(self); 204 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 205 aprint_error("%s: no width property\n", device_xname(self)); 206 return; 207 } 208 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 209 aprint_error("%s: no height property\n", device_xname(self)); 210 return; 211 } 212 213 #ifdef GLYPHCACHE_DEBUG 214 /* leave some visible VRAM unused so we can see the glyph cache */ 215 sc->sc_height -= 300; 216 #endif 217 218 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 219 aprint_error("%s: no depth property\n", device_xname(self)); 220 return; 221 } 222 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 223 aprint_error("%s: no linebytes property\n", 224 device_xname(self)); 225 return; 226 } 227 228 /* 229 * on !2MX we need to use the firmware's offset - for some reason 230 * register writes to anything other than the DACs go wrong 231 */ 232 sc->sc_fboffset = 0; 233 if (prop_dictionary_get_uint32(dict, "address", &addr)) { 234 sc->sc_fboffset = addr & 0x000fffff; /* XXX */ 235 } 236 237 prop_dictionary_get_bool(dict, "is_console", &is_console); 238 239 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 240 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 241 aprint_error("%s: failed to map registers.\n", 242 device_xname(sc->sc_dev)); 243 } 244 sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000; 245 246 /* don't map more VRAM than we actually have */ 247 if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, 248 0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) { 249 aprint_error("%s: can't find the framebuffer?!\n", 250 device_xname(sc->sc_dev)); 251 } 252 if (sc->sc_vramsize == 0) sc->sc_vramsize = sc->sc_fbsize; 253 254 /* don't map (much) more than we actually need */ 255 if (bus_space_map(sc->sc_memt, sc->sc_fb, 0x1000000, 256 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 257 &sc->sc_fbh)) { 258 aprint_error("%s: failed to map the framebuffer.\n", 259 device_xname(sc->sc_dev)); 260 } 261 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 262 263 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 264 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 265 aprint_normal_dev(sc->sc_dev, "%d MB video memory\n", 266 (int)(sc->sc_vramsize >> 20)); 267 268 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 269 "default", 270 0, 0, 271 NULL, 272 8, 16, 273 WSSCREEN_WSCOLORS | WSSCREEN_HILIT | WSSCREEN_RESIZE, 274 NULL 275 }; 276 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 277 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 278 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 279 sc->sc_locked = 0; 280 281 #ifdef GFFB_DEBUG 282 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 283 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 284 #endif 285 286 /* 287 * we don't have hardware synchronization so we need a lock to serialize 288 * access to the DMA buffer between normal and kernel output 289 * actually it might be enough to use atomic ops on sc_current, sc_free 290 * etc. but for now we'll play it safe 291 * XXX we will probably deadlock if we take an interrupt while sc_lock 292 * is held and then try to printf() 293 */ 294 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 295 296 /* init engine here */ 297 gffb_init(sc); 298 299 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 300 &gffb_accessops); 301 sc->vd.init_screen = gffb_init_screen; 302 303 304 ri = &sc->sc_console_screen.scr_ri; 305 306 if (sc->sc_accel) { 307 sc->sc_gc.gc_bitblt = gffb_bitblt; 308 sc->sc_gc.gc_blitcookie = sc; 309 sc->sc_gc.gc_rop = 0xcc; 310 sc->vd.show_screen_cookie = &sc->sc_gc; 311 sc->vd.show_screen_cb = glyphcache_adapt; 312 } 313 314 if (is_console) { 315 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 316 &defattr); 317 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 318 319 if (sc->sc_accel) { 320 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 321 ri->ri_devcmap[(defattr >> 16) & 0xf]); 322 } else { 323 memset(sc->sc_fbaddr + sc->sc_fboffset, 324 ri->ri_devcmap[(defattr >> 16) & 0xf], 325 sc->sc_stride * sc->sc_height); 326 } 327 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 328 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 329 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 330 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 331 332 if (sc->sc_accel) 333 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 334 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 335 sc->sc_width, 336 ri->ri_font->fontwidth, 337 ri->ri_font->fontheight, 338 defattr); 339 340 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 341 defattr); 342 vcons_replay_msgbuf(&sc->sc_console_screen); 343 } else { 344 /* 345 * since we're not the console we can postpone the rest 346 * until someone actually allocates a screen for us 347 */ 348 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 349 /* do some minimal setup to avoid weirdnesses later */ 350 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 351 &defattr); 352 } else 353 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 354 355 if (sc->sc_accel) 356 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 357 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 358 sc->sc_width, 359 ri->ri_font->fontwidth, 360 ri->ri_font->fontheight, 361 defattr); 362 } 363 364 j = 0; 365 rasops_get_cmap(ri, cmap, sizeof(cmap)); 366 for (i = 0; i < 256; i++) { 367 sc->sc_cmap_red[i] = cmap[j]; 368 sc->sc_cmap_green[i] = cmap[j + 1]; 369 sc->sc_cmap_blue[i] = cmap[j + 2]; 370 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 371 j += 3; 372 } 373 374 /* no suspend/resume support yet */ 375 if (!pmf_device_register(sc->sc_dev, NULL, NULL)) 376 aprint_error_dev(sc->sc_dev, 377 "couldn't establish power handler\n"); 378 379 aa.console = is_console; 380 aa.scrdata = &sc->sc_screenlist; 381 aa.accessops = &gffb_accessops; 382 aa.accesscookie = &sc->vd; 383 384 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 385 386 #ifdef GFFB_DEBUG 387 for (i = 0; i < 40; i++) { 388 for (j = 0; j < 40; j++) { 389 gffb_rectfill(sc, i * 20, j * 20, 20, 20, 390 (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303); 391 } 392 } 393 394 gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292); 395 gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc); 396 gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc); 397 gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc); 398 gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc); 399 gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc); 400 gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc); 401 gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc); 402 gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc); 403 gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc); 404 gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc); 405 gffb_sync(sc); 406 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 407 #endif 408 } 409 410 static int 411 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 412 { 413 struct vcons_data *vd = v; 414 struct gffb_softc *sc = vd->cookie; 415 struct wsdisplay_fbinfo *wdf; 416 struct vcons_screen *ms = vd->active; 417 418 switch (cmd) { 419 case WSDISPLAYIO_GTYPE: 420 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 421 return 0; 422 423 /* PCI config read/write passthrough. */ 424 case PCI_IOC_CFGREAD: 425 case PCI_IOC_CFGWRITE: 426 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 427 cmd, data, flag, l); 428 429 case WSDISPLAYIO_GET_BUSID: 430 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 431 sc->sc_pcitag, data); 432 433 case WSDISPLAYIO_GINFO: 434 if (ms == NULL) 435 return ENODEV; 436 wdf = (void *)data; 437 wdf->height = ms->scr_ri.ri_height; 438 wdf->width = ms->scr_ri.ri_width; 439 wdf->depth = ms->scr_ri.ri_depth; 440 wdf->cmsize = 256; 441 return 0; 442 443 case WSDISPLAYIO_GETCMAP: 444 return gffb_getcmap(sc, 445 (struct wsdisplay_cmap *)data); 446 447 case WSDISPLAYIO_PUTCMAP: 448 return gffb_putcmap(sc, 449 (struct wsdisplay_cmap *)data); 450 451 case WSDISPLAYIO_LINEBYTES: 452 *(u_int *)data = sc->sc_stride; 453 return 0; 454 455 case WSDISPLAYIO_SMODE: { 456 int new_mode = *(int*)data; 457 if (new_mode != sc->sc_mode) { 458 sc->sc_mode = new_mode; 459 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 460 gffb_init(sc); 461 gffb_restore_palette(sc); 462 if (sc->sc_accel) { 463 glyphcache_wipe(&sc->sc_gc); 464 gffb_rectfill(sc, 0, 0, sc->sc_width, 465 sc->sc_height, ms->scr_ri.ri_devcmap[ 466 (ms->scr_defattr >> 16) & 0xf]); 467 } else { 468 memset(sc->sc_fbaddr + sc->sc_fboffset, 469 ms->scr_ri.ri_devcmap[ 470 (ms->scr_defattr >> 16) & 0xf], 471 sc->sc_stride * sc->sc_height); 472 } 473 vcons_redraw_screen(ms); 474 } 475 } 476 } 477 return 0; 478 479 case WSDISPLAYIO_GET_EDID: { 480 struct wsdisplayio_edid_info *d = data; 481 return wsdisplayio_get_edid(sc->sc_dev, d); 482 } 483 484 case WSDISPLAYIO_GET_FBINFO: { 485 struct wsdisplayio_fbinfo *fbi = data; 486 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 487 } 488 } 489 return EPASSTHROUGH; 490 } 491 492 static paddr_t 493 gffb_mmap(void *v, void *vs, off_t offset, int prot) 494 { 495 struct vcons_data *vd = v; 496 struct gffb_softc *sc = vd->cookie; 497 paddr_t pa; 498 499 /* 'regular' framebuffer mmap()ing */ 500 if (offset < sc->sc_vramsize) { 501 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 502 0, prot, BUS_SPACE_MAP_LINEAR); 503 return pa; 504 } 505 506 /* 507 * restrict all other mappings to processes with superuser privileges 508 * or the kernel itself 509 */ 510 if (kauth_authorize_machdep(kauth_cred_get(), 511 KAUTH_MACHDEP_UNMANAGEDMEM, 512 NULL, NULL, NULL, NULL) != 0) { 513 aprint_normal("%s: mmap() rejected.\n", 514 device_xname(sc->sc_dev)); 515 return -1; 516 } 517 518 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 519 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 520 BUS_SPACE_MAP_LINEAR); 521 return pa; 522 } 523 524 if ((offset >= sc->sc_reg) && 525 (offset < (sc->sc_reg + sc->sc_regsize))) { 526 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 527 BUS_SPACE_MAP_LINEAR); 528 return pa; 529 } 530 531 #ifdef PCI_MAGIC_IO_RANGE 532 /* allow mapping of IO space */ 533 if ((offset >= PCI_MAGIC_IO_RANGE) && 534 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 535 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 536 0, prot, BUS_SPACE_MAP_LINEAR); 537 return pa; 538 } 539 #endif 540 541 return -1; 542 } 543 544 static void 545 gffb_init_screen(void *cookie, struct vcons_screen *scr, 546 int existing, long *defattr) 547 { 548 struct gffb_softc *sc = cookie; 549 struct rasops_info *ri = &scr->scr_ri; 550 551 ri->ri_depth = sc->sc_depth; 552 ri->ri_width = sc->sc_width; 553 ri->ri_height = sc->sc_height; 554 ri->ri_stride = sc->sc_stride; 555 if (sc->sc_depth == 8) 556 ri->ri_bits = sc->sc_fbaddr + sc->sc_fboffset; 557 ri->ri_flg = RI_CENTER; 558 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 559 560 rasops_init(ri, 0, 0); 561 ri->ri_caps = WSSCREEN_WSCOLORS | WSSCREEN_RESIZE; 562 scr->scr_flags |= VCONS_LOADFONT; 563 564 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 565 sc->sc_width / ri->ri_font->fontwidth); 566 567 ri->ri_hw = scr; 568 569 if (sc->sc_accel) { 570 sc->sc_putchar = ri->ri_ops.putchar; 571 ri->ri_ops.copyrows = gffb_copyrows; 572 ri->ri_ops.copycols = gffb_copycols; 573 ri->ri_ops.eraserows = gffb_eraserows; 574 ri->ri_ops.erasecols = gffb_erasecols; 575 ri->ri_ops.cursor = gffb_cursor; 576 ri->ri_ops.putchar = gffb_putchar; 577 } else { 578 scr->scr_flags |= VCONS_DONT_READ; 579 } 580 } 581 582 static int 583 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 584 { 585 u_char *r, *g, *b; 586 u_int index = cm->index; 587 u_int count = cm->count; 588 int i, error; 589 u_char rbuf[256], gbuf[256], bbuf[256]; 590 591 #ifdef GFFB_DEBUG 592 aprint_debug("putcmap: %d %d\n",index, count); 593 #endif 594 if (cm->index >= 256 || cm->count > 256 || 595 (cm->index + cm->count) > 256) 596 return EINVAL; 597 error = copyin(cm->red, &rbuf[index], count); 598 if (error) 599 return error; 600 error = copyin(cm->green, &gbuf[index], count); 601 if (error) 602 return error; 603 error = copyin(cm->blue, &bbuf[index], count); 604 if (error) 605 return error; 606 607 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 608 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 609 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 610 611 r = &sc->sc_cmap_red[index]; 612 g = &sc->sc_cmap_green[index]; 613 b = &sc->sc_cmap_blue[index]; 614 615 for (i = 0; i < count; i++) { 616 gffb_putpalreg(sc, index, *r, *g, *b); 617 index++; 618 r++, g++, b++; 619 } 620 return 0; 621 } 622 623 static int 624 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 625 { 626 u_int index = cm->index; 627 u_int count = cm->count; 628 int error; 629 630 if (index >= 255 || count > 256 || index + count > 256) 631 return EINVAL; 632 633 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 634 if (error) 635 return error; 636 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 637 if (error) 638 return error; 639 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 640 if (error) 641 return error; 642 643 return 0; 644 } 645 646 static void 647 gffb_restore_palette(struct gffb_softc *sc) 648 { 649 int i; 650 651 for (i = 0; i < (1 << sc->sc_depth); i++) { 652 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 653 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 654 } 655 } 656 657 static int 658 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 659 uint8_t b) 660 { 661 /* port 0 */ 662 bus_space_write_1(sc->sc_memt, sc->sc_regh, 663 GFFB_PDIO0 + GFFB_PEL_IW, idx); 664 bus_space_write_1(sc->sc_memt, sc->sc_regh, 665 GFFB_PDIO0 + GFFB_PEL_D, r); 666 bus_space_write_1(sc->sc_memt, sc->sc_regh, 667 GFFB_PDIO0 + GFFB_PEL_D, g); 668 bus_space_write_1(sc->sc_memt, sc->sc_regh, 669 GFFB_PDIO0 + GFFB_PEL_D, b); 670 671 /* port 1 */ 672 bus_space_write_1(sc->sc_memt, sc->sc_regh, 673 GFFB_PDIO1 + GFFB_PEL_IW, idx); 674 bus_space_write_1(sc->sc_memt, sc->sc_regh, 675 GFFB_PDIO1 + GFFB_PEL_D, r); 676 bus_space_write_1(sc->sc_memt, sc->sc_regh, 677 GFFB_PDIO1 + GFFB_PEL_D, g); 678 bus_space_write_1(sc->sc_memt, sc->sc_regh, 679 GFFB_PDIO1 + GFFB_PEL_D, b); 680 681 return 0; 682 } 683 684 685 static void 686 gffb_dma_kickoff(struct gffb_softc *sc) 687 { 688 689 if (sc->sc_current != sc->sc_put) { 690 sc->sc_put = sc->sc_current; 691 bus_space_barrier(sc->sc_memt, sc->sc_fbh, 0, 0x1000000, 692 BUS_SPACE_BARRIER_WRITE); 693 (void)*sc->sc_fbaddr; 694 GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put); 695 bus_space_barrier(sc->sc_memt, sc->sc_regh, GFFB_FIFO_PUT, 4, 696 BUS_SPACE_BARRIER_WRITE); 697 } 698 } 699 700 static void 701 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 702 { 703 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 704 sc->sc_current += 4; 705 } 706 707 static void 708 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 709 { 710 if(sc->sc_free <= (size << 2)) 711 gffb_make_room(sc, size); 712 gffb_dmanext(sc, ((size) << 18) | (tag)); 713 sc->sc_free -= ((size + 1) << 2); 714 } 715 716 /* 717 * from xf86_video_nv/nv_xaa.c: 718 * There is a HW race condition with videoram command buffers. 719 * You can't jump to the location of your put offset. We write put 720 * at the jump offset + SKIPS dwords with noop padding in between 721 * to solve this problem 722 */ 723 724 #define SKIPS 8 725 726 static void 727 gffb_make_room(struct gffb_softc *sc, int size) 728 { 729 uint32_t get; 730 731 size = (size + 1) << 2; /* slots -> offset */ 732 733 while (sc->sc_free < size) { 734 get = GFFB_READ_4(GFFB_FIFO_GET); 735 736 if (sc->sc_put >= get) { 737 sc->sc_free = 0x2000 - sc->sc_current; 738 if (sc->sc_free < size) { 739 gffb_dmanext(sc, 0x20000000); 740 if(get <= (SKIPS << 2)) { 741 if (sc->sc_put <= (SKIPS << 2)) { 742 /* corner case - will be idle */ 743 GFFB_WRITE_4(GFFB_FIFO_PUT, 744 (SKIPS + 1) << 2); 745 } 746 do { 747 get =GFFB_READ_4(GFFB_FIFO_GET); 748 } while (get <= (SKIPS << 2)); 749 } 750 GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2); 751 sc->sc_current = sc->sc_put = (SKIPS << 2); 752 sc->sc_free = get - ((SKIPS + 1) << 2); 753 } 754 } else 755 sc->sc_free = get - sc->sc_current - 4; 756 } 757 } 758 759 static void 760 gffb_sync(struct gffb_softc *sc) 761 { 762 int bail; 763 int i; 764 765 /* 766 * if there are commands in the buffer make sure the chip is actually 767 * trying to run them 768 */ 769 gffb_dma_kickoff(sc); 770 771 /* now wait for the command buffer to drain... */ 772 bail = 100000000; 773 while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) { 774 bail--; 775 } 776 if (bail == 0) goto crap; 777 778 /* ... and for the engine to go idle */ 779 bail = 100000000; 780 while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) { 781 bail--; 782 } 783 if (bail == 0) goto crap; 784 return; 785 crap: 786 /* if we time out fill the buffer with NOPs and cross fingers */ 787 sc->sc_put = 0; 788 sc->sc_current = 0; 789 for (i = 0; i < 0x2000; i += 4) 790 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 791 aprint_error_dev(sc->sc_dev, "DMA lockup\n"); 792 } 793 794 static void 795 gffb_init(struct gffb_softc *sc) 796 { 797 int i; 798 uint32_t foo; 799 800 if (!sc->sc_accel) return; 801 802 sc->sc_fboffset = 0x2000; 803 804 /* init display start */ 805 GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, sc->sc_fboffset); 806 GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, sc->sc_fboffset); 807 GFFB_WRITE_4(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 808 GFFB_WRITE_4(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 809 810 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 811 GFFB_WRITE_4(GFFB_PMC + 0x140, 0); 812 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff); 813 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff); 814 GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8); 815 GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3); 816 GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0); 817 GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff); 818 819 for (i = 0; i < 8; i++) { 820 GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0); 821 GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10), 822 sc->sc_vramsize - 1); 823 } 824 825 GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010); 826 GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201); 827 GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011); 828 GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202); 829 GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012); 830 GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203); 831 GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013); 832 GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204); 833 GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014); 834 GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205); 835 GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015); 836 GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206); 837 GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016); 838 GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207); 839 GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017); 840 GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208); 841 GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000); 842 GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 843 GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002); 844 GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002); 845 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008042); /* different for nv40 */ 846 GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0); 847 GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200); 848 GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0); 849 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043); 850 GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0); 851 GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0); 852 GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0); 853 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044); 854 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002); 855 GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0); 856 GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0); 857 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019); 858 GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0); 859 GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0); 860 GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0); 861 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c); 862 GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0); 863 GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0); 864 GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0); 865 /* XXX 0x0100805f if !WaitVSynvPossible */ 866 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100809f); 867 GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0); 868 GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200); 869 GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0); 870 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a); 871 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002); 872 GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0); 873 GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0); 874 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077); 875 GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0); 876 GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200); 877 GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0); 878 GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002); 879 GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff); 880 /* command buffer start with some flag in the lower bits */ 881 GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, 0x00000002); 882 GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002); 883 #if BYTE_ORDER == BIG_ENDIAN 884 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088042); 885 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043); 886 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044); 887 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019); 888 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c); 889 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108809f); 890 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a); 891 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077); 892 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001); 893 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001); 894 #endif 895 896 /* PGRAPH setup */ 897 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0); 898 GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001); 899 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0); 900 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0); 901 GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 902 GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0); 903 GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0); 904 GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 905 GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0); 906 GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0); 907 GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100); 908 GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110); 909 GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112); 910 GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff); 911 GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff); 912 GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0); 913 GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff); 914 GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001); 915 GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0); 916 GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0); 917 #if BYTE_ORDER == BIG_ENDIAN 918 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078); 919 #else 920 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078); 921 #endif 922 GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001); 923 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001); 924 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001); 925 GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001); 926 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001); 927 928 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 929 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000); 930 931 GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000); 932 GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 933 GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100); 934 GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 935 GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001); 936 /* 937 * xf86_video_nv does this in two writes, 938 * not sure if they can be combined 939 */ 940 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 941 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo & 0x0007ff00); 942 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 943 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo | 0x00020100); 944 945 /* NV_ARCH_10 */ 946 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700); 947 GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810); 948 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030); 949 950 for(i = 0; i < 128; i += 4) { 951 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i, 952 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 953 } 954 955 GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0); 956 GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0); 957 GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 958 GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 959 960 GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000); 961 GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 962 963 GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0); 964 GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0); 965 GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF); 966 GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF); 967 968 GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002); 969 GFFB_WRITE_4(GFFB_FIFO_GET, 0); 970 sc->sc_put = 0; 971 sc->sc_current = 0; 972 sc->sc_free = 0x2000; 973 974 for(i = 0; i < SKIPS; i++) 975 gffb_dmanext(sc, 0); 976 977 gffb_dmanext(sc, 0x00040000); 978 gffb_dmanext(sc, 0x80000010); 979 gffb_dmanext(sc, 0x00042000); 980 gffb_dmanext(sc, 0x80000011); 981 gffb_dmanext(sc, 0x00044000); 982 gffb_dmanext(sc, 0x80000012); 983 gffb_dmanext(sc, 0x00046000); 984 gffb_dmanext(sc, 0x80000013); 985 gffb_dmanext(sc, 0x00048000); 986 gffb_dmanext(sc, 0x80000014); 987 gffb_dmanext(sc, 0x0004A000); 988 gffb_dmanext(sc, 0x80000015); 989 gffb_dmanext(sc, 0x0004C000); 990 gffb_dmanext(sc, 0x80000016); 991 gffb_dmanext(sc, 0x0004E000); 992 gffb_dmanext(sc, 0x80000017); 993 sc->sc_free = 0x2000 - sc->sc_current; 994 995 gffb_dmastart(sc, SURFACE_FORMAT, 4); 996 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 997 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 998 gffb_dmanext(sc, 0x2000); /* src offset */ 999 gffb_dmanext(sc, 0x2000); /* dst offset */ 1000 1001 gffb_dmastart(sc, RECT_FORMAT, 1); 1002 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 1003 1004 gffb_dmastart(sc, PATTERN_FORMAT, 1); 1005 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 1006 1007 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 1008 gffb_dmanext(sc, 0xffffffff); 1009 gffb_dmanext(sc, 0xffffffff); 1010 gffb_dmanext(sc, 0xffffffff); 1011 gffb_dmanext(sc, 0xffffffff); 1012 1013 gffb_dmastart(sc, ROP_SET, 1); 1014 gffb_dmanext(sc, 0xcc); 1015 sc->sc_rop = 0xcc; 1016 1017 gffb_dma_kickoff(sc); 1018 gffb_sync(sc); 1019 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 1020 1021 } 1022 1023 static void 1024 gffb_rop(struct gffb_softc *sc, int rop) 1025 { 1026 if (rop == sc->sc_rop) 1027 return; 1028 sc->sc_rop = rop; 1029 gffb_dmastart(sc, ROP_SET, 1); 1030 gffb_dmanext(sc, rop); 1031 } 1032 1033 static void 1034 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 1035 uint32_t colour) 1036 { 1037 if (!sc->sc_accel) return; 1038 mutex_enter(&sc->sc_lock); 1039 gffb_rop(sc, 0xcc); 1040 1041 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 1042 gffb_dmanext(sc, colour); 1043 1044 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1045 gffb_dmanext(sc, (x << 16) | y); 1046 gffb_dmanext(sc, (wi << 16) | he); 1047 gffb_dma_kickoff(sc); 1048 mutex_exit(&sc->sc_lock); 1049 } 1050 1051 static void 1052 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1053 int wi, int he, int rop) 1054 { 1055 struct gffb_softc *sc = cookie; 1056 1057 if (!sc->sc_accel) return; 1058 mutex_enter(&sc->sc_lock); 1059 1060 gffb_rop(sc, rop); 1061 1062 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1063 gffb_dmanext(sc, (ys << 16) | xs); 1064 gffb_dmanext(sc, (yd << 16) | xd); 1065 gffb_dmanext(sc, (he << 16) | wi); 1066 gffb_dma_kickoff(sc); 1067 mutex_exit(&sc->sc_lock); 1068 } 1069 1070 static void 1071 gffb_cursor(void *cookie, int on, int row, int col) 1072 { 1073 struct rasops_info *ri = cookie; 1074 struct vcons_screen *scr = ri->ri_hw; 1075 struct gffb_softc *sc = scr->scr_cookie; 1076 int x, y, wi, he; 1077 1078 wi = ri->ri_font->fontwidth; 1079 he = ri->ri_font->fontheight; 1080 1081 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1082 x = ri->ri_ccol * wi + ri->ri_xorigin; 1083 y = ri->ri_crow * he + ri->ri_yorigin; 1084 if (ri->ri_flg & RI_CURSOR) { 1085 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1086 ri->ri_flg &= ~RI_CURSOR; 1087 } 1088 ri->ri_crow = row; 1089 ri->ri_ccol = col; 1090 if (on) { 1091 x = ri->ri_ccol * wi + ri->ri_xorigin; 1092 y = ri->ri_crow * he + ri->ri_yorigin; 1093 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1094 ri->ri_flg |= RI_CURSOR; 1095 } 1096 } else { 1097 scr->scr_ri.ri_crow = row; 1098 scr->scr_ri.ri_ccol = col; 1099 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1100 } 1101 1102 } 1103 1104 static void 1105 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1106 { 1107 struct rasops_info *ri = cookie; 1108 struct wsdisplay_font *font = PICK_FONT(ri, c); 1109 struct vcons_screen *scr = ri->ri_hw; 1110 struct gffb_softc *sc = scr->scr_cookie; 1111 int x, y, wi, he, rv = GC_NOPE; 1112 uint32_t bg; 1113 1114 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1115 return; 1116 1117 if (!CHAR_IN_FONT(c, font)) 1118 return; 1119 1120 wi = font->fontwidth; 1121 he = font->fontheight; 1122 1123 x = ri->ri_xorigin + col * wi; 1124 y = ri->ri_yorigin + row * he; 1125 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1126 1127 if (c == 0x20) { 1128 gffb_rectfill(sc, x, y, wi, he, bg); 1129 return; 1130 } 1131 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1132 if (rv == GC_OK) 1133 return; 1134 1135 /* 1136 * Use gffb_sync to wait for the engine to become idle before 1137 * we start scribbling into VRAM -- we wouldn't want to stomp on 1138 * a scroll in progress or a prior glyphcache_add that hasn't 1139 * completed yet on the GPU. 1140 */ 1141 mutex_enter(&sc->sc_lock); 1142 gffb_sync(sc); 1143 sc->sc_putchar(cookie, row, col, c, attr); 1144 mutex_exit(&sc->sc_lock); 1145 1146 /* 1147 * If glyphcache_try asked us to, cache the newly written 1148 * character. This will issue a gffb_bitblt which will wait 1149 * for our CPU writes to the framebuffer in VRAM to complete 1150 * before triggering GPU reads from the framebuffer in VRAM. 1151 */ 1152 if (rv == GC_ADD) { 1153 glyphcache_add(&sc->sc_gc, c, x, y); 1154 } 1155 } 1156 1157 static void 1158 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1159 { 1160 struct rasops_info *ri = cookie; 1161 struct vcons_screen *scr = ri->ri_hw; 1162 struct gffb_softc *sc = scr->scr_cookie; 1163 int32_t xs, xd, y, width, height; 1164 1165 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1166 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1167 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1168 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1169 width = ri->ri_font->fontwidth * ncols; 1170 height = ri->ri_font->fontheight; 1171 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1172 } 1173 } 1174 1175 static void 1176 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1177 { 1178 struct rasops_info *ri = cookie; 1179 struct vcons_screen *scr = ri->ri_hw; 1180 struct gffb_softc *sc = scr->scr_cookie; 1181 int32_t x, y, width, height, fg, bg, ul; 1182 1183 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1184 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1185 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1186 width = ri->ri_font->fontwidth * ncols; 1187 height = ri->ri_font->fontheight; 1188 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1189 1190 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1191 } 1192 } 1193 1194 static void 1195 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1196 { 1197 struct rasops_info *ri = cookie; 1198 struct vcons_screen *scr = ri->ri_hw; 1199 struct gffb_softc *sc = scr->scr_cookie; 1200 int32_t x, ys, yd, width, height; 1201 1202 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1203 x = ri->ri_xorigin; 1204 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1205 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1206 width = ri->ri_emuwidth; 1207 height = ri->ri_font->fontheight * nrows; 1208 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1209 } 1210 } 1211 1212 static void 1213 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1214 { 1215 struct rasops_info *ri = cookie; 1216 struct vcons_screen *scr = ri->ri_hw; 1217 struct gffb_softc *sc = scr->scr_cookie; 1218 int32_t x, y, width, height, fg, bg, ul; 1219 1220 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1221 x = ri->ri_xorigin; 1222 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1223 width = ri->ri_emuwidth; 1224 height = ri->ri_font->fontheight * nrows; 1225 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1226 1227 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1228 } 1229 } 1230
Indexes created Mon Sep 29 21:09:56 GMT 2025