gffb.c revision 1.3
1 /* $NetBSD: gffb.c,v 1.3 2013/10/09 01:28:33 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2007, 2012 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.3 2013/10/09 01:28:33 macallan Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 #include <sys/lwp.h> 42 #include <sys/kauth.h> 43 #include <sys/atomic.h> 44 45 #include <dev/videomode/videomode.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcidevs.h> 50 #include <dev/pci/pciio.h> 51 #include <dev/pci/gffbreg.h> 52 53 #include <dev/wscons/wsdisplayvar.h> 54 #include <dev/wscons/wsconsio.h> 55 #include <dev/wsfont/wsfont.h> 56 #include <dev/rasops/rasops.h> 57 #include <dev/wscons/wsdisplay_vconsvar.h> 58 #include <dev/pci/wsdisplay_pci.h> 59 #include <dev/wscons/wsdisplay_glyphcachevar.h> 60 61 #include <dev/i2c/i2cvar.h> 62 63 #include "opt_gffb.h" 64 #include "opt_vcons.h" 65 66 #ifdef GFFB_DEBUG 67 #define DPRINTF printf 68 #else 69 #define DPRINTF while(0) printf 70 #endif 71 72 struct gffb_softc { 73 device_t sc_dev; 74 75 pci_chipset_tag_t sc_pc; 76 pcitag_t sc_pcitag; 77 78 bus_space_tag_t sc_memt; 79 bus_space_tag_t sc_iot; 80 81 bus_space_handle_t sc_regh, sc_fbh; 82 bus_addr_t sc_fb, sc_reg; 83 bus_size_t sc_fbsize, sc_regsize; 84 uint8_t *sc_fbaddr; 85 size_t sc_vramsize; 86 87 int sc_width, sc_height, sc_depth, sc_stride; 88 int sc_locked; 89 struct vcons_screen sc_console_screen; 90 struct wsscreen_descr sc_defaultscreen_descr; 91 const struct wsscreen_descr *sc_screens[1]; 92 struct wsscreen_list sc_screenlist; 93 struct vcons_data vd; 94 int sc_mode; 95 u_char sc_cmap_red[256]; 96 u_char sc_cmap_green[256]; 97 u_char sc_cmap_blue[256]; 98 int sc_put, sc_current, sc_free; 99 uint32_t sc_rop; 100 void (*sc_putchar)(void *, int, int, u_int, long); 101 kmutex_t sc_lock; 102 glyphcache sc_gc; 103 }; 104 105 static int gffb_match(device_t, cfdata_t, void *); 106 static void gffb_attach(device_t, device_t, void *); 107 108 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 109 gffb_match, gffb_attach, NULL, NULL); 110 111 static int gffb_ioctl(void *, void *, u_long, void *, int, 112 struct lwp *); 113 static paddr_t gffb_mmap(void *, void *, off_t, int); 114 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 115 116 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 117 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 118 static void gffb_restore_palette(struct gffb_softc *); 119 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 120 uint8_t, uint8_t); 121 122 static void gffb_init(struct gffb_softc *); 123 124 static void gffb_make_room(struct gffb_softc *, int); 125 static void gffb_sync(struct gffb_softc *); 126 127 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 128 uint32_t); 129 static void gffb_bitblt(void *, int, int, int, int, int, 130 int, int); 131 static void gffb_rop(struct gffb_softc *, int); 132 133 static void gffb_cursor(void *, int, int, int); 134 static void gffb_putchar(void *, int, int, u_int, long); 135 static void gffb_copycols(void *, int, int, int, int); 136 static void gffb_erasecols(void *, int, int, int, long); 137 static void gffb_copyrows(void *, int, int, int); 138 static void gffb_eraserows(void *, int, int, long); 139 140 struct wsdisplay_accessops gffb_accessops = { 141 gffb_ioctl, 142 gffb_mmap, 143 NULL, /* alloc_screen */ 144 NULL, /* free_screen */ 145 NULL, /* show_screen */ 146 NULL, /* load_font */ 147 NULL, /* pollc */ 148 NULL /* scroll */ 149 }; 150 151 static int 152 gffb_match(device_t parent, cfdata_t match, void *aux) 153 { 154 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 155 156 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 157 return 0; 158 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 159 return 0; 160 161 /* only card tested on so far - likely need a list */ 162 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 163 return 100; 164 return (0); 165 } 166 167 static void 168 gffb_attach(device_t parent, device_t self, void *aux) 169 { 170 struct gffb_softc *sc = device_private(self); 171 struct pci_attach_args *pa = aux; 172 struct rasops_info *ri; 173 bus_space_tag_t tag; 174 struct wsemuldisplaydev_attach_args aa; 175 prop_dictionary_t dict; 176 unsigned long defattr; 177 bool is_console; 178 int i, j; 179 uint8_t cmap[768]; 180 181 sc->sc_pc = pa->pa_pc; 182 sc->sc_pcitag = pa->pa_tag; 183 sc->sc_memt = pa->pa_memt; 184 sc->sc_iot = pa->pa_iot; 185 sc->sc_dev = self; 186 187 pci_aprint_devinfo(pa, NULL); 188 189 /* fill in parameters from properties */ 190 dict = device_properties(self); 191 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 192 aprint_error("%s: no width property\n", device_xname(self)); 193 return; 194 } 195 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 196 aprint_error("%s: no height property\n", device_xname(self)); 197 return; 198 } 199 200 #ifdef GLYPHCACHE_DEBUG 201 /* leave some visible VRAM unused so we can see the glyph cache */ 202 sc->sc_height -= 300; 203 #endif 204 205 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 206 aprint_error("%s: no depth property\n", device_xname(self)); 207 return; 208 } 209 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 210 aprint_error("%s: no linebytes property\n", 211 device_xname(self)); 212 return; 213 } 214 215 prop_dictionary_get_bool(dict, "is_console", &is_console); 216 217 if (pci_mapreg_map(pa, 0x14, PCI_MAPREG_TYPE_MEM, 218 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 219 &tag, &sc->sc_fbh, &sc->sc_fb, &sc->sc_fbsize)) { 220 aprint_error("%s: failed to map the framebuffer.\n", 221 device_xname(sc->sc_dev)); 222 } 223 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 224 225 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 226 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 227 aprint_error("%s: failed to map registers.\n", 228 device_xname(sc->sc_dev)); 229 } 230 231 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 232 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 233 234 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 235 "default", 236 0, 0, 237 NULL, 238 8, 16, 239 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 240 NULL 241 }; 242 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 243 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 244 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 245 sc->sc_locked = 0; 246 247 sc->sc_vramsize = bus_space_read_4(sc->sc_memt, sc->sc_regh, 248 GFFB_VRAM) & 0xfff00000; 249 250 printf("vram: %d MB\n", sc->sc_vramsize >> 20); 251 #ifdef GFFB_DEBUG 252 printf("put: %08x\n", bus_space_read_4(sc->sc_memt, sc->sc_regh, GFFB_FIFO_PUT)); 253 printf("get: %08x\n", bus_space_read_4(sc->sc_memt, sc->sc_regh, GFFB_FIFO_GET)); 254 #endif 255 256 /* 257 * we don't have hardware synchronization so we need a lock to serialize 258 * access to the DMA buffer between normal and kernel output 259 * actually it might be enough to use atomic ops on sc_current, sc_free 260 * etc. but for now we'll play it safe 261 * XXX we will probably deadlock if we take an interrupt while sc_lock 262 * is held and then try to printf() 263 */ 264 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 265 266 /* init engine here */ 267 gffb_init(sc); 268 269 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 270 &gffb_accessops); 271 sc->vd.init_screen = gffb_init_screen; 272 273 274 ri = &sc->sc_console_screen.scr_ri; 275 276 sc->sc_gc.gc_bitblt = gffb_bitblt; 277 sc->sc_gc.gc_blitcookie = sc; 278 sc->sc_gc.gc_rop = 0xcc; 279 280 if (is_console) { 281 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 282 &defattr); 283 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 284 285 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 286 ri->ri_devcmap[(defattr >> 16) & 0xf]); 287 288 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 289 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 290 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 291 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 292 293 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 294 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 295 sc->sc_width, 296 ri->ri_font->fontwidth, 297 ri->ri_font->fontheight, 298 defattr); 299 300 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 301 defattr); 302 vcons_replay_msgbuf(&sc->sc_console_screen); 303 } else { 304 /* 305 * since we're not the console we can postpone the rest 306 * until someone actually allocates a screen for us 307 */ 308 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 309 /* do some minimal setup to avoid weirdnesses later */ 310 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 311 &defattr); 312 } else 313 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 314 315 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 316 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 317 sc->sc_width, 318 ri->ri_font->fontwidth, 319 ri->ri_font->fontheight, 320 defattr); 321 } 322 323 j = 0; 324 rasops_get_cmap(ri, cmap, sizeof(cmap)); 325 for (i = 0; i < 256; i++) { 326 sc->sc_cmap_red[i] = cmap[j]; 327 sc->sc_cmap_green[i] = cmap[j + 1]; 328 sc->sc_cmap_blue[i] = cmap[j + 2]; 329 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 330 j += 3; 331 } 332 333 /* no suspend/resume support yet */ 334 pmf_device_register(sc->sc_dev, NULL, NULL); 335 336 aa.console = is_console; 337 aa.scrdata = &sc->sc_screenlist; 338 aa.accessops = &gffb_accessops; 339 aa.accesscookie = &sc->vd; 340 341 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint); 342 343 #ifdef GFFB_DEBUG 344 for (i = 0; i < 40; i++) { 345 for (j = 0; j < 40; j++) { 346 gffb_rectfill(sc, i * 20, j * 20, 20, 20, 347 (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303); 348 } 349 } 350 351 //gffb_bitblt(sc, 0, 800, 10, 10, 400, 300, 0xcc); 352 gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292); 353 gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc); 354 gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc); 355 gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc); 356 gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc); 357 gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc); 358 gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc); 359 gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc); 360 gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc); 361 gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc); 362 gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc); 363 gffb_sync(sc); 364 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 365 #endif 366 } 367 368 static int 369 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 370 struct lwp *l) 371 { 372 struct vcons_data *vd = v; 373 struct gffb_softc *sc = vd->cookie; 374 struct wsdisplay_fbinfo *wdf; 375 struct vcons_screen *ms = vd->active; 376 377 switch (cmd) { 378 case WSDISPLAYIO_GTYPE: 379 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 380 return 0; 381 382 /* PCI config read/write passthrough. */ 383 case PCI_IOC_CFGREAD: 384 case PCI_IOC_CFGWRITE: 385 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 386 cmd, data, flag, l); 387 388 case WSDISPLAYIO_GET_BUSID: 389 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 390 sc->sc_pcitag, data); 391 392 case WSDISPLAYIO_GINFO: 393 if (ms == NULL) 394 return ENODEV; 395 wdf = (void *)data; 396 wdf->height = ms->scr_ri.ri_height; 397 wdf->width = ms->scr_ri.ri_width; 398 wdf->depth = ms->scr_ri.ri_depth; 399 wdf->cmsize = 256; 400 return 0; 401 402 case WSDISPLAYIO_GETCMAP: 403 return gffb_getcmap(sc, 404 (struct wsdisplay_cmap *)data); 405 406 case WSDISPLAYIO_PUTCMAP: 407 return gffb_putcmap(sc, 408 (struct wsdisplay_cmap *)data); 409 410 case WSDISPLAYIO_LINEBYTES: 411 *(u_int *)data = sc->sc_stride; 412 return 0; 413 414 case WSDISPLAYIO_SMODE: { 415 int new_mode = *(int*)data; 416 if (new_mode != sc->sc_mode) { 417 sc->sc_mode = new_mode; 418 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 419 gffb_init(sc); 420 gffb_restore_palette(sc); 421 glyphcache_wipe(&sc->sc_gc); 422 gffb_rectfill(sc, 0, 0, sc->sc_width, 423 sc->sc_height, ms->scr_ri.ri_devcmap[ 424 (ms->scr_defattr >> 16) & 0xf]); 425 vcons_redraw_screen(ms); 426 } 427 } 428 } 429 return 0; 430 #if notyet 431 case WSDISPLAYIO_GET_EDID: { 432 struct wsdisplayio_edid_info *d = data; 433 return wsdisplayio_get_edid(sc->sc_dev, d); 434 } 435 #endif 436 } 437 return EPASSTHROUGH; 438 } 439 440 static paddr_t 441 gffb_mmap(void *v, void *vs, off_t offset, int prot) 442 { 443 struct vcons_data *vd = v; 444 struct gffb_softc *sc = vd->cookie; 445 paddr_t pa; 446 447 /* 'regular' framebuffer mmap()ing */ 448 if (offset < sc->sc_fbsize) { 449 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 450 0, prot, BUS_SPACE_MAP_LINEAR); 451 return pa; 452 } 453 454 /* 455 * restrict all other mappings to processes with superuser privileges 456 * or the kernel itself 457 */ 458 if (kauth_authorize_machdep(kauth_cred_get(), KAUTH_MACHDEP_UNMANAGEDMEM, 459 NULL, NULL, NULL, NULL) != 0) { 460 aprint_normal("%s: mmap() rejected.\n", 461 device_xname(sc->sc_dev)); 462 return -1; 463 } 464 465 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 466 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 467 BUS_SPACE_MAP_LINEAR); 468 return pa; 469 } 470 471 if ((offset >= sc->sc_reg) && 472 (offset < (sc->sc_reg + sc->sc_regsize))) { 473 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 474 BUS_SPACE_MAP_LINEAR); 475 return pa; 476 } 477 478 #ifdef PCI_MAGIC_IO_RANGE 479 /* allow mapping of IO space */ 480 if ((offset >= PCI_MAGIC_IO_RANGE) && 481 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 482 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 483 0, prot, BUS_SPACE_MAP_LINEAR); 484 return pa; 485 } 486 #endif 487 488 #ifdef OFB_ALLOW_OTHERS 489 if (offset >= 0x80000000) { 490 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 491 BUS_SPACE_MAP_LINEAR); 492 return pa; 493 } 494 #endif 495 return -1; 496 } 497 498 static void 499 gffb_init_screen(void *cookie, struct vcons_screen *scr, 500 int existing, long *defattr) 501 { 502 struct gffb_softc *sc = cookie; 503 struct rasops_info *ri = &scr->scr_ri; 504 505 ri->ri_depth = sc->sc_depth; 506 ri->ri_width = sc->sc_width; 507 ri->ri_height = sc->sc_height; 508 ri->ri_stride = sc->sc_stride; 509 ri->ri_bits = sc->sc_fbaddr + 0x2000; 510 ri->ri_flg = RI_CENTER; 511 if (sc->sc_depth == 8) 512 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 513 514 rasops_init(ri, 0, 0); 515 ri->ri_caps = WSSCREEN_WSCOLORS; 516 #if 0 517 scr->scr_flags |= VCONS_DONT_READ; 518 #endif 519 520 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 521 sc->sc_width / ri->ri_font->fontwidth); 522 523 ri->ri_hw = scr; 524 525 sc->sc_putchar = ri->ri_ops.putchar; 526 ri->ri_ops.copyrows = gffb_copyrows; 527 ri->ri_ops.copycols = gffb_copycols; 528 ri->ri_ops.eraserows = gffb_eraserows; 529 ri->ri_ops.erasecols = gffb_erasecols; 530 ri->ri_ops.cursor = gffb_cursor; 531 ri->ri_ops.putchar = gffb_putchar; 532 } 533 534 static int 535 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 536 { 537 u_char *r, *g, *b; 538 u_int index = cm->index; 539 u_int count = cm->count; 540 int i, error; 541 u_char rbuf[256], gbuf[256], bbuf[256]; 542 543 #ifdef GFFB_DEBUG 544 aprint_debug("putcmap: %d %d\n",index, count); 545 #endif 546 if (cm->index >= 256 || cm->count > 256 || 547 (cm->index + cm->count) > 256) 548 return EINVAL; 549 error = copyin(cm->red, &rbuf[index], count); 550 if (error) 551 return error; 552 error = copyin(cm->green, &gbuf[index], count); 553 if (error) 554 return error; 555 error = copyin(cm->blue, &bbuf[index], count); 556 if (error) 557 return error; 558 559 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 560 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 561 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 562 563 r = &sc->sc_cmap_red[index]; 564 g = &sc->sc_cmap_green[index]; 565 b = &sc->sc_cmap_blue[index]; 566 567 for (i = 0; i < count; i++) { 568 gffb_putpalreg(sc, index, *r, *g, *b); 569 index++; 570 r++, g++, b++; 571 } 572 return 0; 573 } 574 575 static int 576 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 577 { 578 u_int index = cm->index; 579 u_int count = cm->count; 580 int error; 581 582 if (index >= 255 || count > 256 || index + count > 256) 583 return EINVAL; 584 585 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 586 if (error) 587 return error; 588 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 589 if (error) 590 return error; 591 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 592 if (error) 593 return error; 594 595 return 0; 596 } 597 598 static void 599 gffb_restore_palette(struct gffb_softc *sc) 600 { 601 int i; 602 603 for (i = 0; i < (1 << sc->sc_depth); i++) { 604 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 605 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 606 } 607 } 608 609 static int 610 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 611 uint8_t b) 612 { 613 /* port 0 */ 614 bus_space_write_1(sc->sc_memt, sc->sc_regh, 615 GFFB_PDIO0 + GFFB_PEL_IW, idx); 616 bus_space_write_1(sc->sc_memt, sc->sc_regh, 617 GFFB_PDIO0 + GFFB_PEL_D, r); 618 bus_space_write_1(sc->sc_memt, sc->sc_regh, 619 GFFB_PDIO0 + GFFB_PEL_D, g); 620 bus_space_write_1(sc->sc_memt, sc->sc_regh, 621 GFFB_PDIO0 + GFFB_PEL_D, b); 622 623 /* port 1 */ 624 bus_space_write_1(sc->sc_memt, sc->sc_regh, 625 GFFB_PDIO1 + GFFB_PEL_IW, idx); 626 bus_space_write_1(sc->sc_memt, sc->sc_regh, 627 GFFB_PDIO1 + GFFB_PEL_D, r); 628 bus_space_write_1(sc->sc_memt, sc->sc_regh, 629 GFFB_PDIO1 + GFFB_PEL_D, g); 630 bus_space_write_1(sc->sc_memt, sc->sc_regh, 631 GFFB_PDIO1 + GFFB_PEL_D, b); 632 633 return 0; 634 } 635 636 637 static void 638 gffb_dma_kickoff(struct gffb_softc *sc) 639 { 640 volatile uint8_t scratch; 641 642 if(sc->sc_current != sc->sc_put) { 643 sc->sc_put = sc->sc_current; 644 membar_sync(); 645 scratch = *sc->sc_fbaddr; 646 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_FIFO_PUT, 647 sc->sc_put); 648 membar_sync(); 649 } 650 } 651 652 static void 653 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 654 { 655 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 656 sc->sc_current += 4; 657 } 658 659 static void 660 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 661 { 662 if(sc->sc_free <= (size << 2)) 663 gffb_make_room(sc, size); 664 gffb_dmanext(sc, ((size) << 18) | (tag)); 665 sc->sc_free -= ((size + 1) << 2); 666 } 667 668 /* 669 * from xf86_video_nv/nv_xaa.c: 670 * There is a HW race condition with videoram command buffers. 671 * You can't jump to the location of your put offset. We write put 672 * at the jump offset + SKIPS dwords with noop padding in between 673 * to solve this problem 674 */ 675 676 #define SKIPS 8 677 678 static void 679 gffb_make_room(struct gffb_softc *sc, int size) 680 { 681 uint32_t get; 682 683 size = (size + 1) << 2; /* slots -> offset */ 684 685 while (sc->sc_free < size) { 686 get = bus_space_read_4(sc->sc_memt, sc->sc_regh, GFFB_FIFO_GET); 687 688 if (sc->sc_put >= get) { 689 sc->sc_free = 0x2000 - sc->sc_current; 690 if (sc->sc_free < size) { 691 gffb_dmanext(sc, 0x20000000); 692 if(get <= (SKIPS << 2)) { 693 if (sc->sc_put <= (SKIPS << 2)) { 694 /* corner case - will be idle */ 695 bus_space_write_4(sc->sc_memt, 696 sc->sc_regh, GFFB_FIFO_PUT, 697 (SKIPS + 1) << 2); 698 } 699 do { 700 get = bus_space_read_4( 701 sc->sc_memt, sc->sc_regh, 702 GFFB_FIFO_GET); 703 } while (get <= (SKIPS << 2)); 704 } 705 bus_space_write_4(sc->sc_memt, sc->sc_regh, 706 GFFB_FIFO_PUT, SKIPS << 2); 707 sc->sc_current = sc->sc_put = (SKIPS << 2); 708 sc->sc_free = get - ((SKIPS + 1) << 2); 709 } 710 } else 711 sc->sc_free = get - sc->sc_current - 4; 712 } 713 } 714 715 static void 716 gffb_sync(struct gffb_softc *sc) 717 { 718 int bail; 719 int i; 720 721 gffb_dma_kickoff(sc); /* just in case */ 722 723 bail = 100000000; 724 while ((bus_space_read_4(sc->sc_memt, sc->sc_regh, GFFB_FIFO_GET) != 725 sc->sc_put) && (bail > 0)) { 726 #if 0 727 bail--; 728 #endif 729 } 730 if (bail == 0) goto crap; 731 732 bail = 100000000; 733 while((bus_space_read_4(sc->sc_memt, sc->sc_regh, GFFB_BUSY) != 0) && 734 (bail > 0)) { 735 #if 0 736 bail--; 737 #endif 738 } 739 if (bail == 0) goto crap; 740 return; 741 crap: 742 sc->sc_put = 0; 743 sc->sc_current = 0; 744 for (i = 0; i < 0x2000; i += 4) 745 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 746 // printf("DMA lockup\n"); 747 } 748 749 static void 750 gffb_init(struct gffb_softc *sc) 751 { 752 int i; 753 uint32_t foo; 754 755 /* init display start */ 756 bus_space_write_4(sc->sc_memt, sc->sc_regh, 757 GFFB_CRTC0 + GFFB_DISPLAYSTART, 0x2000); 758 bus_space_write_4(sc->sc_memt, sc->sc_regh, 759 GFFB_CRTC1 + GFFB_DISPLAYSTART, 0x2000); 760 bus_space_write_1(sc->sc_memt, sc->sc_regh, 761 GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 762 bus_space_write_1(sc->sc_memt, sc->sc_regh, 763 GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 764 765 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 766 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PMC + 0x140, 0); 767 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PMC + 0x200, 0xffff00ff); 768 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PMC + 0x200, 0xffffffff); 769 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PTIMER + 0x800, 8); 770 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PTIMER + 0x840, 3); 771 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PTIMER + 0x500, 0); 772 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PTIMER + 0x400, 0xffffffff); 773 for (i = 0; i < 8; i++) { 774 bus_space_write_4(sc->sc_memt, sc->sc_regh, 775 GFFB_PMC + 0x240 + (i * 0x10), 0); 776 bus_space_write_4(sc->sc_memt, sc->sc_regh, 777 GFFB_PMC + 0x244 + (i * 0x10), sc->sc_vramsize - 1); 778 } 779 780 for (i = 0; i < 8; i++) { 781 bus_space_write_4(sc->sc_memt, sc->sc_regh, 782 GFFB_PFB + 0x0240 + (i * 0x10), 0); 783 bus_space_write_4(sc->sc_memt, sc->sc_regh, 784 GFFB_PFB + 0x0244 + (i * 0x10), sc->sc_vramsize - 1); 785 } 786 787 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN, 0x80000010); 788 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x04, 0x80011201); 789 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x08, 0x80000011); 790 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x0c, 0x80011202); 791 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x10, 0x80000012); 792 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x14, 0x80011203); 793 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x18, 0x80000013); 794 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x1c, 0x80011204); 795 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x20, 0x80000014); 796 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x24, 0x80011205); 797 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x28, 0x80000015); 798 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2c, 0x80011206); 799 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x30, 0x80000016); 800 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x34, 0x80011207); 801 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x38, 0x80000017); 802 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x3c, 0x80011208); 803 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2000, 0x00003000); 804 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 805 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2008, 0x00000002); 806 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x200c, 0x00000002); 807 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2010, 0x01008042); /* different for nv40 */ 808 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2014, 0); 809 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2018, 0x12001200); 810 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x201c, 0); 811 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2020, 0x01008043); 812 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2024, 0); 813 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2028, 0); 814 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x202c, 0); 815 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2030, 0x01008044); 816 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2034, 0x00000002); 817 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2038, 0); 818 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x203c, 0); 819 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2040, 0x01008019); 820 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2044, 0); 821 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2048, 0); 822 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x204c, 0); 823 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2050, 0x0100a05c); 824 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2054, 0); 825 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2058, 0); 826 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x205c, 0); 827 /* XXX 0x0100805f if !WaitVSynvPossible */ 828 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2060, 0x0100809f); 829 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2064, 0); 830 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2068, 0x12001200); 831 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x206c, 0); 832 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2070, 0x0100804a); 833 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2074, 0x00000002); 834 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2078, 0); 835 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x207c, 0); 836 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2080, 0x01018077); 837 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2084, 0); 838 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2088, 0x12001200); 839 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x208c, 0); 840 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2090, 0x00003002); 841 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2094, 0x00007fff); 842 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2098, 0x00000002); /* start of command buffer? */ 843 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x209c, 0x00000002); 844 #if BYTE_ORDER == BIG_ENDIAN 845 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2010, 0x01088042); 846 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2020, 0x01088043); 847 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2030, 0x01088044); 848 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2040, 0x01088019); 849 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2050, 0x0108a05c); 850 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2060, 0x0108809f); 851 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2070, 0x0108804a); 852 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2080, 0x01098077); 853 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2034, 0x00000001); 854 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PRAMIN + 0x2074, 0x00000001); 855 #endif 856 857 /* PGRAPH setup */ 858 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0500, 0); 859 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0504, 0x00000001); 860 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1200, 0); 861 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1250, 0); 862 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 863 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1240, 0); 864 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1244, 0); 865 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 866 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1000, 0); 867 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1050, 0); 868 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0210, 0x03000100); 869 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0214, 0x00000110); 870 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0218, 0x00000112); 871 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x050c, 0x0000ffff); 872 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1258, 0x0000ffff); 873 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0140, 0); 874 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0100, 0xffffffff); 875 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1054, 0x00000001); 876 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1230, 0); 877 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1280, 0); 878 #if BYTE_ORDER == BIG_ENDIAN 879 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1224, 0x800f0078); 880 #else 881 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1224, 0x000f0078); 882 #endif 883 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1220, 0x00000001); 884 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1200, 0x00000001); 885 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1250, 0x00000001); 886 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x1254, 0x00000001); 887 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PFIFO + 0x0500, 0x00000001); 888 889 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 890 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0080, 0x00000000); 891 892 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0140, 0x00000000); 893 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 894 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0144, 0x10010100); 895 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 896 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0720, 0x00000001); 897 foo = bus_space_read_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0710); 898 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0710, 899 foo & 0x0007ff00); 900 foo = bus_space_read_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0710); 901 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0710, 902 foo | 0x00020100); 903 904 /* NV_ARCH_10 */ 905 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0084, 0x00118700); 906 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0088, 0x24E00810); 907 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x008C, 0x55DE0030); 908 909 for(i = 0; i < 128; i += 4) { 910 bus_space_write_4(sc->sc_memt, sc->sc_regh, 911 GFFB_PGRAPH + 0x0B00 + i, 912 bus_space_read_4(sc->sc_memt, sc->sc_regh, 913 GFFB_PFB + 0x0240 + i)); 914 } 915 916 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x640, 0); 917 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x644, 0); 918 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 919 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 920 921 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0810, 0x00000000); 922 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 923 924 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x053C, 0); 925 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0540, 0); 926 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0544, 0x00007FFF); 927 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_PGRAPH + 0x0548, 0x00007FFF); 928 929 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_CMDSTART, 0x00000002); 930 bus_space_write_4(sc->sc_memt, sc->sc_regh, GFFB_FIFO_GET, 0); 931 sc->sc_put = 0; 932 sc->sc_current = 0; 933 sc->sc_free = 0x2000; 934 935 for(i = 0; i < SKIPS; i++) 936 gffb_dmanext(sc, 0); 937 938 gffb_dmanext(sc, 0x00040000); 939 gffb_dmanext(sc, 0x80000010); 940 gffb_dmanext(sc, 0x00042000); 941 gffb_dmanext(sc, 0x80000011); 942 gffb_dmanext(sc, 0x00044000); 943 gffb_dmanext(sc, 0x80000012); 944 gffb_dmanext(sc, 0x00046000); 945 gffb_dmanext(sc, 0x80000013); 946 gffb_dmanext(sc, 0x00048000); 947 gffb_dmanext(sc, 0x80000014); 948 gffb_dmanext(sc, 0x0004A000); 949 gffb_dmanext(sc, 0x80000015); 950 gffb_dmanext(sc, 0x0004C000); 951 gffb_dmanext(sc, 0x80000016); 952 gffb_dmanext(sc, 0x0004E000); 953 gffb_dmanext(sc, 0x80000017); 954 sc->sc_free = 0x2000 - sc->sc_current; 955 956 gffb_dmastart(sc, SURFACE_FORMAT, 4); 957 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 958 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 959 gffb_dmanext(sc, 0x2000); /* src offset */ 960 gffb_dmanext(sc, 0x2000); /* dst offset */ 961 962 gffb_dmastart(sc, RECT_FORMAT, 1); 963 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 964 965 gffb_dmastart(sc, PATTERN_FORMAT, 1); 966 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 967 968 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 969 gffb_dmanext(sc, 0xffffffff); 970 gffb_dmanext(sc, 0xffffffff); 971 gffb_dmanext(sc, 0xffffffff); 972 gffb_dmanext(sc, 0xffffffff); 973 974 gffb_dmastart(sc, ROP_SET, 1); 975 gffb_dmanext(sc, 0xcc); 976 sc->sc_rop = 0xcc; 977 978 gffb_dma_kickoff(sc); 979 gffb_sync(sc); 980 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 981 982 } 983 984 static void 985 gffb_rop(struct gffb_softc *sc, int rop) 986 { 987 if (rop == sc->sc_rop) 988 return; 989 sc->sc_rop = rop; 990 gffb_dmastart(sc, ROP_SET, 1); 991 gffb_dmanext(sc, rop); 992 } 993 994 static void 995 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 996 uint32_t colour) 997 { 998 mutex_enter(&sc->sc_lock); 999 gffb_rop(sc, 0xcc); 1000 1001 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 1002 gffb_dmanext(sc, colour); 1003 1004 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1005 gffb_dmanext(sc, (x << 16) | y); 1006 gffb_dmanext(sc, (wi << 16) | he); 1007 gffb_dma_kickoff(sc); 1008 mutex_exit(&sc->sc_lock); 1009 } 1010 1011 static void 1012 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1013 int wi, int he, int rop) 1014 { 1015 struct gffb_softc *sc = cookie; 1016 1017 mutex_enter(&sc->sc_lock); 1018 1019 gffb_rop(sc, rop); 1020 1021 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1022 gffb_dmanext(sc, (ys << 16) | xs); 1023 gffb_dmanext(sc, (yd << 16) | xd); 1024 gffb_dmanext(sc, (he << 16) | wi); 1025 gffb_dma_kickoff(sc); 1026 mutex_exit(&sc->sc_lock); 1027 } 1028 1029 static void 1030 gffb_cursor(void *cookie, int on, int row, int col) 1031 { 1032 struct rasops_info *ri = cookie; 1033 struct vcons_screen *scr = ri->ri_hw; 1034 struct gffb_softc *sc = scr->scr_cookie; 1035 int x, y, wi, he; 1036 1037 wi = ri->ri_font->fontwidth; 1038 he = ri->ri_font->fontheight; 1039 1040 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1041 x = ri->ri_ccol * wi + ri->ri_xorigin; 1042 y = ri->ri_crow * he + ri->ri_yorigin; 1043 if (ri->ri_flg & RI_CURSOR) { 1044 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1045 ri->ri_flg &= ~RI_CURSOR; 1046 } 1047 ri->ri_crow = row; 1048 ri->ri_ccol = col; 1049 if (on) { 1050 x = ri->ri_ccol * wi + ri->ri_xorigin; 1051 y = ri->ri_crow * he + ri->ri_yorigin; 1052 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1053 ri->ri_flg |= RI_CURSOR; 1054 } 1055 } else { 1056 scr->scr_ri.ri_crow = row; 1057 scr->scr_ri.ri_ccol = col; 1058 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1059 } 1060 1061 } 1062 1063 static void 1064 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1065 { 1066 struct rasops_info *ri = cookie; 1067 struct wsdisplay_font *font = PICK_FONT(ri, c); 1068 struct vcons_screen *scr = ri->ri_hw; 1069 struct gffb_softc *sc = scr->scr_cookie; 1070 int x, y, wi, he, rv = GC_NOPE; 1071 uint32_t bg; 1072 1073 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1074 return; 1075 1076 if (!CHAR_IN_FONT(c, font)) 1077 return; 1078 1079 wi = font->fontwidth; 1080 he = font->fontheight; 1081 1082 x = ri->ri_xorigin + col * wi; 1083 y = ri->ri_yorigin + row * he; 1084 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1085 1086 if (c == 0x20) { 1087 gffb_rectfill(sc, x, y, wi, he, bg); 1088 return; 1089 } 1090 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1091 if (rv == GC_OK) 1092 return; 1093 1094 mutex_enter(&sc->sc_lock); 1095 gffb_sync(sc); 1096 sc->sc_putchar(cookie, row, col, c, attr); 1097 membar_sync(); 1098 mutex_exit(&sc->sc_lock); 1099 1100 if (rv == GC_ADD) { 1101 glyphcache_add(&sc->sc_gc, c, x, y); 1102 } 1103 } 1104 1105 static void 1106 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1107 { 1108 struct rasops_info *ri = cookie; 1109 struct vcons_screen *scr = ri->ri_hw; 1110 struct gffb_softc *sc = scr->scr_cookie; 1111 int32_t xs, xd, y, width, height; 1112 1113 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1114 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1115 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1116 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1117 width = ri->ri_font->fontwidth * ncols; 1118 height = ri->ri_font->fontheight; 1119 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1120 } 1121 } 1122 1123 static void 1124 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1125 { 1126 struct rasops_info *ri = cookie; 1127 struct vcons_screen *scr = ri->ri_hw; 1128 struct gffb_softc *sc = scr->scr_cookie; 1129 int32_t x, y, width, height, fg, bg, ul; 1130 1131 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1132 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1133 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1134 width = ri->ri_font->fontwidth * ncols; 1135 height = ri->ri_font->fontheight; 1136 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1137 1138 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1139 } 1140 } 1141 1142 static void 1143 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1144 { 1145 struct rasops_info *ri = cookie; 1146 struct vcons_screen *scr = ri->ri_hw; 1147 struct gffb_softc *sc = scr->scr_cookie; 1148 int32_t x, ys, yd, width, height; 1149 1150 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1151 x = ri->ri_xorigin; 1152 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1153 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1154 width = ri->ri_emuwidth; 1155 height = ri->ri_font->fontheight * nrows; 1156 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1157 } 1158 } 1159 1160 static void 1161 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1162 { 1163 struct rasops_info *ri = cookie; 1164 struct vcons_screen *scr = ri->ri_hw; 1165 struct gffb_softc *sc = scr->scr_cookie; 1166 int32_t x, y, width, height, fg, bg, ul; 1167 1168 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1169 x = ri->ri_xorigin; 1170 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1171 width = ri->ri_emuwidth; 1172 height = ri->ri_font->fontheight * nrows; 1173 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1174 1175 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1176 } 1177 } 1178
Indexes created Mon Sep 29 21:09:56 GMT 2025