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ichsmb.c revision 1.32
      1  1.32     soren /*	$NetBSD: ichsmb.c,v 1.32 2013/07/18 22:14:54 soren Exp $	*/
      2   1.1  kiyohara /*	$OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $	*/
      3   1.1  kiyohara 
      4   1.1  kiyohara /*
      5   1.1  kiyohara  * Copyright (c) 2005, 2006 Alexander Yurchenko <grange (at) openbsd.org>
      6   1.1  kiyohara  *
      7   1.1  kiyohara  * Permission to use, copy, modify, and distribute this software for any
      8   1.1  kiyohara  * purpose with or without fee is hereby granted, provided that the above
      9   1.1  kiyohara  * copyright notice and this permission notice appear in all copies.
     10   1.1  kiyohara  *
     11   1.1  kiyohara  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12   1.1  kiyohara  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13   1.1  kiyohara  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14   1.1  kiyohara  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15   1.1  kiyohara  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16   1.1  kiyohara  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17   1.1  kiyohara  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18   1.1  kiyohara  */
     19   1.1  kiyohara 
     20   1.1  kiyohara /*
     21   1.1  kiyohara  * Intel ICH SMBus controller driver.
     22   1.1  kiyohara  */
     23   1.1  kiyohara 
     24   1.6   xtraeme #include <sys/cdefs.h>
     25  1.32     soren __KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.32 2013/07/18 22:14:54 soren Exp $");
     26   1.6   xtraeme 
     27   1.1  kiyohara #include <sys/param.h>
     28   1.1  kiyohara #include <sys/device.h>
     29   1.1  kiyohara #include <sys/errno.h>
     30   1.1  kiyohara #include <sys/kernel.h>
     31  1.27  pgoyette #include <sys/mutex.h>
     32   1.1  kiyohara #include <sys/proc.h>
     33   1.1  kiyohara 
     34  1.10        ad #include <sys/bus.h>
     35   1.1  kiyohara 
     36   1.1  kiyohara #include <dev/pci/pcidevs.h>
     37   1.1  kiyohara #include <dev/pci/pcireg.h>
     38   1.1  kiyohara #include <dev/pci/pcivar.h>
     39   1.1  kiyohara 
     40   1.5   xtraeme #include <dev/ic/i82801lpcreg.h>
     41   1.1  kiyohara 
     42   1.1  kiyohara #include <dev/i2c/i2cvar.h>
     43   1.1  kiyohara 
     44   1.1  kiyohara #ifdef ICHIIC_DEBUG
     45   1.1  kiyohara #define DPRINTF(x) printf x
     46   1.1  kiyohara #else
     47   1.1  kiyohara #define DPRINTF(x)
     48   1.1  kiyohara #endif
     49   1.1  kiyohara 
     50   1.1  kiyohara #define ICHIIC_DELAY	100
     51   1.1  kiyohara #define ICHIIC_TIMEOUT	1
     52   1.1  kiyohara 
     53   1.1  kiyohara struct ichsmb_softc {
     54  1.12  kiyohara 	device_t		sc_dev;
     55   1.1  kiyohara 
     56   1.1  kiyohara 	bus_space_tag_t		sc_iot;
     57   1.1  kiyohara 	bus_space_handle_t	sc_ioh;
     58   1.1  kiyohara 	void *			sc_ih;
     59   1.1  kiyohara 	int			sc_poll;
     60   1.1  kiyohara 
     61   1.1  kiyohara 	struct i2c_controller	sc_i2c_tag;
     62  1.27  pgoyette 	kmutex_t 		sc_i2c_mutex;
     63   1.1  kiyohara 	struct {
     64   1.1  kiyohara 		i2c_op_t     op;
     65   1.1  kiyohara 		void *       buf;
     66   1.1  kiyohara 		size_t       len;
     67   1.1  kiyohara 		int          flags;
     68   1.1  kiyohara 		volatile int error;
     69   1.1  kiyohara 	}			sc_i2c_xfer;
     70   1.1  kiyohara };
     71   1.1  kiyohara 
     72  1.21    cegger static int	ichsmb_match(device_t, cfdata_t, void *);
     73  1.12  kiyohara static void	ichsmb_attach(device_t, device_t, void *);
     74   1.1  kiyohara 
     75   1.1  kiyohara static int	ichsmb_i2c_acquire_bus(void *, int);
     76   1.1  kiyohara static void	ichsmb_i2c_release_bus(void *, int);
     77   1.1  kiyohara static int	ichsmb_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *,
     78   1.1  kiyohara 		    size_t, void *, size_t, int);
     79   1.1  kiyohara 
     80   1.1  kiyohara static int	ichsmb_intr(void *);
     81   1.1  kiyohara 
     82   1.1  kiyohara 
     83  1.12  kiyohara CFATTACH_DECL_NEW(ichsmb, sizeof(struct ichsmb_softc),
     84   1.1  kiyohara     ichsmb_match, ichsmb_attach, NULL, NULL);
     85   1.1  kiyohara 
     86   1.1  kiyohara 
     87   1.1  kiyohara static int
     88  1.21    cegger ichsmb_match(device_t parent, cfdata_t match, void *aux)
     89   1.1  kiyohara {
     90   1.1  kiyohara 	struct pci_attach_args *pa = aux;
     91   1.1  kiyohara 
     92   1.1  kiyohara 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) {
     93   1.1  kiyohara 		switch (PCI_PRODUCT(pa->pa_id)) {
     94   1.1  kiyohara 		case PCI_PRODUCT_INTEL_6300ESB_SMB:
     95   1.1  kiyohara 		case PCI_PRODUCT_INTEL_63XXESB_SMB:
     96   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801AA_SMB:
     97   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801AB_SMB:
     98   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801BA_SMB:
     99   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801CA_SMB:
    100   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801DB_SMB:
    101   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801E_SMB:
    102   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801EB_SMB:
    103   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801FB_SMB:
    104   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801G_SMB:
    105   1.1  kiyohara 		case PCI_PRODUCT_INTEL_82801H_SMB:
    106   1.7   xtraeme 		case PCI_PRODUCT_INTEL_82801I_SMB:
    107  1.23     njoly 		case PCI_PRODUCT_INTEL_82801JD_SMB:
    108  1.23     njoly 		case PCI_PRODUCT_INTEL_82801JI_SMB:
    109  1.22       tnn 		case PCI_PRODUCT_INTEL_3400_SMB:
    110  1.25   msaitoh 		case PCI_PRODUCT_INTEL_6SERIES_SMB:
    111  1.28  riastrad 		case PCI_PRODUCT_INTEL_7SERIES_SMB:
    112  1.31   msaitoh 		case PCI_PRODUCT_INTEL_8SERIES_SMB:
    113  1.30  riastrad 		case PCI_PRODUCT_INTEL_C600_SMBUS:
    114  1.29   msaitoh 		case PCI_PRODUCT_INTEL_C600_SMB_0:
    115  1.29   msaitoh 		case PCI_PRODUCT_INTEL_C600_SMB_1:
    116  1.29   msaitoh 		case PCI_PRODUCT_INTEL_C600_SMB_2:
    117   1.1  kiyohara 			return 1;
    118   1.1  kiyohara 		}
    119   1.1  kiyohara 	}
    120   1.1  kiyohara 	return 0;
    121   1.1  kiyohara }
    122   1.1  kiyohara 
    123   1.1  kiyohara static void
    124  1.12  kiyohara ichsmb_attach(device_t parent, device_t self, void *aux)
    125   1.1  kiyohara {
    126  1.12  kiyohara 	struct ichsmb_softc *sc = device_private(self);
    127   1.1  kiyohara 	struct pci_attach_args *pa = aux;
    128   1.1  kiyohara 	struct i2cbus_attach_args iba;
    129   1.1  kiyohara 	pcireg_t conf;
    130   1.1  kiyohara 	bus_size_t iosize;
    131   1.1  kiyohara 	pci_intr_handle_t ih;
    132   1.1  kiyohara 	const char *intrstr = NULL;
    133   1.1  kiyohara 
    134  1.12  kiyohara 	sc->sc_dev = self;
    135  1.12  kiyohara 
    136  1.26  drochner 	pci_aprint_devinfo(pa, NULL);
    137   1.1  kiyohara 
    138   1.1  kiyohara 	/* Read configuration */
    139   1.5   xtraeme 	conf = pci_conf_read(pa->pa_pc, pa->pa_tag, LPCIB_SMB_HOSTC);
    140  1.16     njoly 	DPRINTF(("%s: conf 0x%08x\n", device_xname(sc->sc_dev), conf));
    141   1.1  kiyohara 
    142   1.5   xtraeme 	if ((conf & LPCIB_SMB_HOSTC_HSTEN) == 0) {
    143  1.12  kiyohara 		aprint_error_dev(self, "SMBus disabled\n");
    144   1.1  kiyohara 		return;
    145   1.1  kiyohara 	}
    146   1.1  kiyohara 
    147   1.1  kiyohara 	/* Map I/O space */
    148   1.5   xtraeme 	if (pci_mapreg_map(pa, LPCIB_SMB_BASE, PCI_MAPREG_TYPE_IO, 0,
    149   1.1  kiyohara 	    &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) {
    150  1.12  kiyohara 		aprint_error_dev(self, "can't map I/O space\n");
    151   1.1  kiyohara 		return;
    152   1.1  kiyohara 	}
    153   1.1  kiyohara 
    154   1.1  kiyohara 	sc->sc_poll = 1;
    155   1.5   xtraeme 	if (conf & LPCIB_SMB_HOSTC_SMIEN) {
    156   1.1  kiyohara 		/* No PCI IRQ */
    157  1.15     njoly 		aprint_normal_dev(self, "interrupting at SMI\n");
    158   1.1  kiyohara 	} else {
    159   1.1  kiyohara 		/* Install interrupt handler */
    160   1.1  kiyohara 		if (pci_intr_map(pa, &ih) == 0) {
    161   1.1  kiyohara 			intrstr = pci_intr_string(pa->pa_pc, ih);
    162   1.1  kiyohara 			sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
    163   1.1  kiyohara 			    ichsmb_intr, sc);
    164   1.1  kiyohara 			if (sc->sc_ih != NULL) {
    165  1.12  kiyohara 				aprint_normal_dev(self, "interrupting at %s\n",
    166  1.12  kiyohara 				    intrstr);
    167   1.1  kiyohara 				sc->sc_poll = 0;
    168   1.1  kiyohara 			}
    169   1.1  kiyohara 		}
    170   1.1  kiyohara 		if (sc->sc_poll)
    171  1.12  kiyohara 			aprint_normal_dev(self, "polling\n");
    172   1.1  kiyohara 	}
    173   1.1  kiyohara 
    174   1.1  kiyohara 	/* Attach I2C bus */
    175  1.27  pgoyette 	mutex_init(&sc->sc_i2c_mutex, MUTEX_DEFAULT, IPL_NONE);
    176   1.1  kiyohara 	sc->sc_i2c_tag.ic_cookie = sc;
    177   1.1  kiyohara 	sc->sc_i2c_tag.ic_acquire_bus = ichsmb_i2c_acquire_bus;
    178   1.1  kiyohara 	sc->sc_i2c_tag.ic_release_bus = ichsmb_i2c_release_bus;
    179   1.1  kiyohara 	sc->sc_i2c_tag.ic_exec = ichsmb_i2c_exec;
    180   1.1  kiyohara 
    181  1.20    cegger 	memset(&iba, 0, sizeof(iba));
    182   1.9       riz 	iba.iba_type = I2C_TYPE_SMBUS;
    183   1.1  kiyohara 	iba.iba_tag = &sc->sc_i2c_tag;
    184   1.1  kiyohara 	config_found(self, &iba, iicbus_print);
    185   1.1  kiyohara 
    186  1.11  jmcneill 	if (!pmf_device_register(self, NULL, NULL))
    187  1.11  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    188   1.1  kiyohara }
    189   1.1  kiyohara 
    190   1.1  kiyohara static int
    191   1.1  kiyohara ichsmb_i2c_acquire_bus(void *cookie, int flags)
    192   1.1  kiyohara {
    193   1.1  kiyohara 	struct ichsmb_softc *sc = cookie;
    194   1.1  kiyohara 
    195  1.27  pgoyette 	if (cold)
    196   1.8   xtraeme 		return 0;
    197   1.1  kiyohara 
    198  1.27  pgoyette 	mutex_enter(&sc->sc_i2c_mutex);
    199   1.8   xtraeme 	return 0;
    200   1.1  kiyohara }
    201   1.1  kiyohara 
    202   1.1  kiyohara static void
    203   1.1  kiyohara ichsmb_i2c_release_bus(void *cookie, int flags)
    204   1.1  kiyohara {
    205   1.1  kiyohara 	struct ichsmb_softc *sc = cookie;
    206   1.1  kiyohara 
    207  1.27  pgoyette 	if (cold)
    208   1.1  kiyohara 		return;
    209   1.1  kiyohara 
    210  1.27  pgoyette 	mutex_exit(&sc->sc_i2c_mutex);
    211   1.1  kiyohara }
    212   1.1  kiyohara 
    213   1.1  kiyohara static int
    214   1.1  kiyohara ichsmb_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
    215   1.1  kiyohara     const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
    216   1.1  kiyohara {
    217   1.1  kiyohara 	struct ichsmb_softc *sc = cookie;
    218   1.1  kiyohara 	const uint8_t *b;
    219   1.1  kiyohara 	uint8_t ctl = 0, st;
    220   1.1  kiyohara 	int retries;
    221   1.4  kiyohara 	char fbuf[64];
    222   1.1  kiyohara 
    223  1.14     njoly 	DPRINTF(("%s: exec: op %d, addr 0x%02x, cmdlen %zu, len %zu, "
    224  1.14     njoly 	    "flags 0x%02x\n", device_xname(sc->sc_dev), op, addr, cmdlen,
    225   1.1  kiyohara 	    len, flags));
    226   1.1  kiyohara 
    227  1.32     soren 	/* Clear status bits */
    228  1.32     soren 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS,
    229  1.32     soren 	    LPCIB_SMB_HS_INTR | LPCIB_SMB_HS_DEVERR |
    230  1.32     soren 	    LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED);
    231  1.32     soren 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, 1,
    232  1.32     soren 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
    233  1.32     soren 
    234   1.1  kiyohara 	/* Wait for bus to be idle */
    235   1.1  kiyohara 	for (retries = 100; retries > 0; retries--) {
    236   1.5   xtraeme 		st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
    237   1.5   xtraeme 		if (!(st & LPCIB_SMB_HS_BUSY))
    238   1.1  kiyohara 			break;
    239   1.1  kiyohara 		DELAY(ICHIIC_DELAY);
    240   1.1  kiyohara 	}
    241   1.4  kiyohara #ifdef ICHIIC_DEBUG
    242  1.18  christos 	snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
    243  1.14     njoly 	printf("%s: exec: st 0x%s\n", device_xname(sc->sc_dev), fbuf);
    244   1.4  kiyohara #endif
    245   1.5   xtraeme 	if (st & LPCIB_SMB_HS_BUSY)
    246   1.1  kiyohara 		return (1);
    247   1.1  kiyohara 
    248   1.1  kiyohara 	if (cold || sc->sc_poll)
    249   1.1  kiyohara 		flags |= I2C_F_POLL;
    250   1.1  kiyohara 
    251  1.24   hannken 	if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2 ||
    252  1.24   hannken 	    (cmdlen == 0 && len > 1))
    253   1.1  kiyohara 		return (1);
    254   1.1  kiyohara 
    255   1.1  kiyohara 	/* Setup transfer */
    256   1.1  kiyohara 	sc->sc_i2c_xfer.op = op;
    257   1.1  kiyohara 	sc->sc_i2c_xfer.buf = buf;
    258   1.1  kiyohara 	sc->sc_i2c_xfer.len = len;
    259   1.1  kiyohara 	sc->sc_i2c_xfer.flags = flags;
    260   1.1  kiyohara 	sc->sc_i2c_xfer.error = 0;
    261   1.1  kiyohara 
    262   1.1  kiyohara 	/* Set slave address and transfer direction */
    263   1.5   xtraeme 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_TXSLVA,
    264   1.5   xtraeme 	    LPCIB_SMB_TXSLVA_ADDR(addr) |
    265   1.5   xtraeme 	    (I2C_OP_READ_P(op) ? LPCIB_SMB_TXSLVA_READ : 0));
    266   1.1  kiyohara 
    267   1.1  kiyohara 	b = (const uint8_t *)cmdbuf;
    268   1.1  kiyohara 	if (cmdlen > 0)
    269   1.1  kiyohara 		/* Set command byte */
    270   1.5   xtraeme 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HCMD, b[0]);
    271   1.1  kiyohara 
    272   1.1  kiyohara 	if (I2C_OP_WRITE_P(op)) {
    273   1.1  kiyohara 		/* Write data */
    274   1.1  kiyohara 		b = buf;
    275  1.24   hannken 		if (cmdlen == 0 && len == 1)
    276  1.24   hannken 			bus_space_write_1(sc->sc_iot, sc->sc_ioh,
    277  1.24   hannken 			    LPCIB_SMB_HCMD, b[0]);
    278  1.24   hannken 		else if (len > 0)
    279   1.1  kiyohara 			bus_space_write_1(sc->sc_iot, sc->sc_ioh,
    280   1.5   xtraeme 			    LPCIB_SMB_HD0, b[0]);
    281   1.1  kiyohara 		if (len > 1)
    282   1.1  kiyohara 			bus_space_write_1(sc->sc_iot, sc->sc_ioh,
    283   1.5   xtraeme 			    LPCIB_SMB_HD1, b[1]);
    284   1.1  kiyohara 	}
    285   1.1  kiyohara 
    286   1.1  kiyohara 	/* Set SMBus command */
    287  1.24   hannken 	if (cmdlen == 0) {
    288  1.24   hannken 		if (len == 0)
    289  1.19  pgoyette 			ctl = LPCIB_SMB_HC_CMD_QUICK;
    290  1.19  pgoyette 		else
    291  1.19  pgoyette 			ctl = LPCIB_SMB_HC_CMD_BYTE;
    292  1.19  pgoyette 	} else if (len == 1)
    293   1.5   xtraeme 		ctl = LPCIB_SMB_HC_CMD_BDATA;
    294   1.1  kiyohara 	else if (len == 2)
    295   1.5   xtraeme 		ctl = LPCIB_SMB_HC_CMD_WDATA;
    296   1.1  kiyohara 
    297   1.1  kiyohara 	if ((flags & I2C_F_POLL) == 0)
    298   1.5   xtraeme 		ctl |= LPCIB_SMB_HC_INTREN;
    299   1.1  kiyohara 
    300   1.1  kiyohara 	/* Start transaction */
    301   1.5   xtraeme 	ctl |= LPCIB_SMB_HC_START;
    302   1.5   xtraeme 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, ctl);
    303   1.1  kiyohara 
    304   1.1  kiyohara 	if (flags & I2C_F_POLL) {
    305   1.1  kiyohara 		/* Poll for completion */
    306   1.1  kiyohara 		DELAY(ICHIIC_DELAY);
    307   1.1  kiyohara 		for (retries = 1000; retries > 0; retries--) {
    308   1.1  kiyohara 			st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
    309   1.5   xtraeme 			    LPCIB_SMB_HS);
    310   1.5   xtraeme 			if ((st & LPCIB_SMB_HS_BUSY) == 0)
    311   1.1  kiyohara 				break;
    312   1.1  kiyohara 			DELAY(ICHIIC_DELAY);
    313   1.1  kiyohara 		}
    314   1.5   xtraeme 		if (st & LPCIB_SMB_HS_BUSY)
    315   1.1  kiyohara 			goto timeout;
    316   1.1  kiyohara 		ichsmb_intr(sc);
    317   1.1  kiyohara 	} else {
    318   1.1  kiyohara 		/* Wait for interrupt */
    319   1.1  kiyohara 		if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz))
    320   1.1  kiyohara 			goto timeout;
    321   1.1  kiyohara 	}
    322   1.1  kiyohara 
    323   1.1  kiyohara 	if (sc->sc_i2c_xfer.error)
    324   1.1  kiyohara 		return (1);
    325   1.1  kiyohara 
    326   1.1  kiyohara 	return (0);
    327   1.1  kiyohara 
    328   1.1  kiyohara timeout:
    329   1.1  kiyohara 	/*
    330   1.1  kiyohara 	 * Transfer timeout. Kill the transaction and clear status bits.
    331   1.1  kiyohara 	 */
    332  1.18  christos 	snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
    333  1.12  kiyohara 	aprint_error_dev(sc->sc_dev,
    334  1.12  kiyohara 	    "exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, "
    335   1.4  kiyohara 	    "flags 0x%02x: timeout, status 0x%s\n",
    336  1.12  kiyohara 	    op, addr, cmdlen, len, flags, fbuf);
    337   1.5   xtraeme 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC,
    338   1.5   xtraeme 	    LPCIB_SMB_HC_KILL);
    339   1.1  kiyohara 	DELAY(ICHIIC_DELAY);
    340   1.5   xtraeme 	st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
    341   1.5   xtraeme 	if ((st & LPCIB_SMB_HS_FAILED) == 0) {
    342  1.18  christos 		snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
    343  1.12  kiyohara 		aprint_error_dev(sc->sc_dev, "abort failed, status 0x%s\n",
    344  1.12  kiyohara 		    fbuf);
    345   1.4  kiyohara 	}
    346   1.5   xtraeme 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
    347   1.1  kiyohara 	return (1);
    348   1.1  kiyohara }
    349   1.1  kiyohara 
    350   1.1  kiyohara static int
    351   1.1  kiyohara ichsmb_intr(void *arg)
    352   1.1  kiyohara {
    353   1.1  kiyohara 	struct ichsmb_softc *sc = arg;
    354   1.1  kiyohara 	uint8_t st;
    355   1.1  kiyohara 	uint8_t *b;
    356   1.1  kiyohara 	size_t len;
    357   1.4  kiyohara #ifdef ICHIIC_DEBUG
    358   1.4  kiyohara 	char fbuf[64];
    359   1.4  kiyohara #endif
    360   1.1  kiyohara 
    361   1.1  kiyohara 	/* Read status */
    362   1.5   xtraeme 	st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
    363   1.5   xtraeme 	if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR |
    364   1.5   xtraeme 	    LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED |
    365   1.5   xtraeme 	    LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0)
    366   1.1  kiyohara 		/* Interrupt was not for us */
    367   1.1  kiyohara 		return (0);
    368   1.1  kiyohara 
    369   1.4  kiyohara #ifdef ICHIIC_DEBUG
    370  1.18  christos 	snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
    371  1.12  kiyohara 	printf("%s: intr st 0x%s\n", device_xname(sc->sc_dev), fbuf);
    372   1.4  kiyohara #endif
    373   1.1  kiyohara 
    374   1.1  kiyohara 	/* Clear status bits */
    375   1.5   xtraeme 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
    376   1.1  kiyohara 
    377   1.1  kiyohara 	/* Check for errors */
    378   1.5   xtraeme 	if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) {
    379   1.1  kiyohara 		sc->sc_i2c_xfer.error = 1;
    380   1.1  kiyohara 		goto done;
    381   1.1  kiyohara 	}
    382   1.1  kiyohara 
    383   1.5   xtraeme 	if (st & LPCIB_SMB_HS_INTR) {
    384   1.1  kiyohara 		if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
    385   1.1  kiyohara 			goto done;
    386   1.1  kiyohara 
    387   1.1  kiyohara 		/* Read data */
    388   1.1  kiyohara 		b = sc->sc_i2c_xfer.buf;
    389   1.1  kiyohara 		len = sc->sc_i2c_xfer.len;
    390   1.1  kiyohara 		if (len > 0)
    391   1.1  kiyohara 			b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
    392   1.5   xtraeme 			    LPCIB_SMB_HD0);
    393   1.1  kiyohara 		if (len > 1)
    394   1.1  kiyohara 			b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
    395   1.5   xtraeme 			    LPCIB_SMB_HD1);
    396   1.1  kiyohara 	}
    397   1.1  kiyohara 
    398   1.1  kiyohara done:
    399   1.1  kiyohara 	if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
    400   1.1  kiyohara 		wakeup(sc);
    401   1.1  kiyohara 	return (1);
    402   1.1  kiyohara }
    403