ichsmb.c revision 1.57.2.1
1 /* $NetBSD: ichsmb.c,v 1.57.2.1 2019/06/10 22:07:16 christos Exp $ */ 2 /* $OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $ */ 3 4 /* 5 * Copyright (c) 2005, 2006 Alexander Yurchenko <grange (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* 21 * Intel ICH SMBus controller driver. 22 */ 23 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.57.2.1 2019/06/10 22:07:16 christos Exp $"); 26 27 #include <sys/param.h> 28 #include <sys/device.h> 29 #include <sys/errno.h> 30 #include <sys/kernel.h> 31 #include <sys/mutex.h> 32 #include <sys/proc.h> 33 #include <sys/module.h> 34 35 #include <sys/bus.h> 36 37 #include <dev/pci/pcidevs.h> 38 #include <dev/pci/pcireg.h> 39 #include <dev/pci/pcivar.h> 40 41 #include <dev/ic/i82801lpcreg.h> 42 43 #include <dev/i2c/i2cvar.h> 44 45 #ifdef ICHIIC_DEBUG 46 #define DPRINTF(x) printf x 47 #else 48 #define DPRINTF(x) 49 #endif 50 51 #define ICHIIC_DELAY 100 52 #define ICHIIC_TIMEOUT 1 53 54 struct ichsmb_softc { 55 device_t sc_dev; 56 57 bus_space_tag_t sc_iot; 58 bus_space_handle_t sc_ioh; 59 bus_size_t sc_size; 60 pci_chipset_tag_t sc_pc; 61 void * sc_ih; 62 int sc_poll; 63 pci_intr_handle_t *sc_pihp; 64 65 struct i2c_controller sc_i2c_tag; 66 kmutex_t sc_i2c_mutex; 67 struct { 68 i2c_op_t op; 69 void * buf; 70 size_t len; 71 int flags; 72 volatile int error; 73 } sc_i2c_xfer; 74 device_t sc_i2c_device; 75 }; 76 77 static int ichsmb_match(device_t, cfdata_t, void *); 78 static void ichsmb_attach(device_t, device_t, void *); 79 static int ichsmb_detach(device_t, int); 80 static int ichsmb_rescan(device_t, const char *, const int *); 81 static void ichsmb_chdet(device_t, device_t); 82 83 static int ichsmb_i2c_acquire_bus(void *, int); 84 static void ichsmb_i2c_release_bus(void *, int); 85 static int ichsmb_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, 86 size_t, void *, size_t, int); 87 88 static int ichsmb_intr(void *); 89 90 #include "ioconf.h" 91 92 CFATTACH_DECL3_NEW(ichsmb, sizeof(struct ichsmb_softc), 93 ichsmb_match, ichsmb_attach, ichsmb_detach, NULL, ichsmb_rescan, 94 ichsmb_chdet, DVF_DETACH_SHUTDOWN); 95 96 97 static int 98 ichsmb_match(device_t parent, cfdata_t match, void *aux) 99 { 100 struct pci_attach_args *pa = aux; 101 102 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) { 103 switch (PCI_PRODUCT(pa->pa_id)) { 104 case PCI_PRODUCT_INTEL_6300ESB_SMB: 105 case PCI_PRODUCT_INTEL_63XXESB_SMB: 106 case PCI_PRODUCT_INTEL_82801AA_SMB: 107 case PCI_PRODUCT_INTEL_82801AB_SMB: 108 case PCI_PRODUCT_INTEL_82801BA_SMB: 109 case PCI_PRODUCT_INTEL_82801CA_SMB: 110 case PCI_PRODUCT_INTEL_82801DB_SMB: 111 case PCI_PRODUCT_INTEL_82801E_SMB: 112 case PCI_PRODUCT_INTEL_82801EB_SMB: 113 case PCI_PRODUCT_INTEL_82801FB_SMB: 114 case PCI_PRODUCT_INTEL_82801G_SMB: 115 case PCI_PRODUCT_INTEL_82801H_SMB: 116 case PCI_PRODUCT_INTEL_82801I_SMB: 117 case PCI_PRODUCT_INTEL_82801JD_SMB: 118 case PCI_PRODUCT_INTEL_82801JI_SMB: 119 case PCI_PRODUCT_INTEL_3400_SMB: 120 case PCI_PRODUCT_INTEL_6SERIES_SMB: 121 case PCI_PRODUCT_INTEL_7SERIES_SMB: 122 case PCI_PRODUCT_INTEL_8SERIES_SMB: 123 case PCI_PRODUCT_INTEL_9SERIES_SMB: 124 case PCI_PRODUCT_INTEL_100SERIES_SMB: 125 case PCI_PRODUCT_INTEL_100SERIES_LP_SMB: 126 case PCI_PRODUCT_INTEL_2HS_SMB: 127 case PCI_PRODUCT_INTEL_3HS_SMB: 128 case PCI_PRODUCT_INTEL_CORE4G_M_SMB: 129 case PCI_PRODUCT_INTEL_CORE5G_M_SMB: 130 case PCI_PRODUCT_INTEL_BAYTRAIL_PCU_SMB: 131 case PCI_PRODUCT_INTEL_BSW_PCU_SMB: 132 case PCI_PRODUCT_INTEL_APL_SMB: 133 case PCI_PRODUCT_INTEL_GLK_SMB: 134 case PCI_PRODUCT_INTEL_C600_SMBUS: 135 case PCI_PRODUCT_INTEL_C600_SMB_0: 136 case PCI_PRODUCT_INTEL_C600_SMB_1: 137 case PCI_PRODUCT_INTEL_C600_SMB_2: 138 case PCI_PRODUCT_INTEL_C610_SMB: 139 case PCI_PRODUCT_INTEL_C620_SMB: 140 case PCI_PRODUCT_INTEL_C620_SMB_S: 141 case PCI_PRODUCT_INTEL_EP80579_SMB: 142 case PCI_PRODUCT_INTEL_DH89XXCC_SMB: 143 case PCI_PRODUCT_INTEL_DH89XXCL_SMB: 144 case PCI_PRODUCT_INTEL_C2000_PCU_SMBUS: 145 case PCI_PRODUCT_INTEL_C3K_SMBUS_LEGACY: 146 return 1; 147 } 148 } 149 return 0; 150 } 151 152 static void 153 ichsmb_attach(device_t parent, device_t self, void *aux) 154 { 155 struct ichsmb_softc *sc = device_private(self); 156 struct pci_attach_args *pa = aux; 157 pcireg_t conf; 158 const char *intrstr = NULL; 159 char intrbuf[PCI_INTRSTR_LEN]; 160 int flags; 161 162 sc->sc_dev = self; 163 sc->sc_pc = pa->pa_pc; 164 165 pci_aprint_devinfo(pa, NULL); 166 167 /* Read configuration */ 168 conf = pci_conf_read(pa->pa_pc, pa->pa_tag, LPCIB_SMB_HOSTC); 169 DPRINTF(("%s: conf 0x%08x\n", device_xname(sc->sc_dev), conf)); 170 171 if ((conf & LPCIB_SMB_HOSTC_HSTEN) == 0) { 172 aprint_error_dev(self, "SMBus disabled\n"); 173 goto out; 174 } 175 176 /* Map I/O space */ 177 if (pci_mapreg_map(pa, LPCIB_SMB_BASE, PCI_MAPREG_TYPE_IO, 0, 178 &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) { 179 aprint_error_dev(self, "can't map I/O space\n"); 180 goto out; 181 } 182 183 sc->sc_poll = 1; 184 sc->sc_ih = NULL; 185 if (conf & LPCIB_SMB_HOSTC_SMIEN) { 186 /* No PCI IRQ */ 187 aprint_normal_dev(self, "interrupting at SMI\n"); 188 } else { 189 /* Install interrupt handler */ 190 if (pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0) == 0) { 191 intrstr = pci_intr_string(pa->pa_pc, sc->sc_pihp[0], 192 intrbuf, sizeof(intrbuf)); 193 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, 194 sc->sc_pihp[0], IPL_BIO, ichsmb_intr, sc, 195 device_xname(sc->sc_dev)); 196 if (sc->sc_ih != NULL) { 197 aprint_normal_dev(self, "interrupting at %s\n", 198 intrstr); 199 sc->sc_poll = 0; 200 } else { 201 pci_intr_release(pa->pa_pc, sc->sc_pihp, 1); 202 sc->sc_pihp = NULL; 203 } 204 } 205 if (sc->sc_poll) 206 aprint_normal_dev(self, "polling\n"); 207 } 208 209 sc->sc_i2c_device = NULL; 210 flags = 0; 211 mutex_init(&sc->sc_i2c_mutex, MUTEX_DEFAULT, IPL_NONE); 212 ichsmb_rescan(self, "i2cbus", &flags); 213 214 out: if (!pmf_device_register(self, NULL, NULL)) 215 aprint_error_dev(self, "couldn't establish power handler\n"); 216 } 217 218 static int 219 ichsmb_rescan(device_t self, const char *ifattr, const int *flags) 220 { 221 struct ichsmb_softc *sc = device_private(self); 222 struct i2cbus_attach_args iba; 223 224 if (!ifattr_match(ifattr, "i2cbus")) 225 return 0; 226 227 if (sc->sc_i2c_device) 228 return 0; 229 230 /* Attach I2C bus */ 231 sc->sc_i2c_tag.ic_cookie = sc; 232 sc->sc_i2c_tag.ic_acquire_bus = ichsmb_i2c_acquire_bus; 233 sc->sc_i2c_tag.ic_release_bus = ichsmb_i2c_release_bus; 234 sc->sc_i2c_tag.ic_exec = ichsmb_i2c_exec; 235 236 memset(&iba, 0, sizeof(iba)); 237 iba.iba_type = I2C_TYPE_SMBUS; 238 iba.iba_tag = &sc->sc_i2c_tag; 239 sc->sc_i2c_device = config_found_ia(self, ifattr, &iba, iicbus_print); 240 241 return 0; 242 } 243 244 static int 245 ichsmb_detach(device_t self, int flags) 246 { 247 struct ichsmb_softc *sc = device_private(self); 248 int error; 249 250 if (sc->sc_i2c_device) { 251 error = config_detach(sc->sc_i2c_device, flags); 252 if (error) 253 return error; 254 } 255 256 mutex_destroy(&sc->sc_i2c_mutex); 257 258 if (sc->sc_ih) { 259 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 260 sc->sc_ih = NULL; 261 } 262 263 if (sc->sc_pihp) { 264 pci_intr_release(sc->sc_pc, sc->sc_pihp, 1); 265 sc->sc_pihp = NULL; 266 } 267 268 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size); 269 270 return 0; 271 } 272 273 static void 274 ichsmb_chdet(device_t self, device_t child) 275 { 276 struct ichsmb_softc *sc = device_private(self); 277 278 if (sc->sc_i2c_device == child) 279 sc->sc_i2c_device = NULL; 280 } 281 282 static int 283 ichsmb_i2c_acquire_bus(void *cookie, int flags) 284 { 285 struct ichsmb_softc *sc = cookie; 286 287 if (cold) 288 return 0; 289 290 mutex_enter(&sc->sc_i2c_mutex); 291 return 0; 292 } 293 294 static void 295 ichsmb_i2c_release_bus(void *cookie, int flags) 296 { 297 struct ichsmb_softc *sc = cookie; 298 299 if (cold) 300 return; 301 302 mutex_exit(&sc->sc_i2c_mutex); 303 } 304 305 static int 306 ichsmb_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, 307 const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) 308 { 309 struct ichsmb_softc *sc = cookie; 310 const uint8_t *b; 311 uint8_t ctl = 0, st; 312 int retries; 313 char fbuf[64]; 314 315 DPRINTF(("%s: exec: op %d, addr 0x%02x, cmdlen %zu, len %zu, " 316 "flags 0x%02x\n", device_xname(sc->sc_dev), op, addr, cmdlen, 317 len, flags)); 318 319 /* Clear status bits */ 320 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, 321 LPCIB_SMB_HS_INTR | LPCIB_SMB_HS_DEVERR | 322 LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED); 323 bus_space_barrier(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, 1, 324 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 325 326 /* Wait for bus to be idle */ 327 for (retries = 100; retries > 0; retries--) { 328 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 329 if (!(st & LPCIB_SMB_HS_BUSY)) 330 break; 331 DELAY(ICHIIC_DELAY); 332 } 333 #ifdef ICHIIC_DEBUG 334 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 335 printf("%s: exec: st %s\n", device_xname(sc->sc_dev), fbuf); 336 #endif 337 if (st & LPCIB_SMB_HS_BUSY) 338 return (1); 339 340 if (cold || sc->sc_poll) 341 flags |= I2C_F_POLL; 342 343 if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2 || 344 (cmdlen == 0 && len > 1)) 345 return (1); 346 347 /* Setup transfer */ 348 sc->sc_i2c_xfer.op = op; 349 sc->sc_i2c_xfer.buf = buf; 350 sc->sc_i2c_xfer.len = len; 351 sc->sc_i2c_xfer.flags = flags; 352 sc->sc_i2c_xfer.error = 0; 353 354 /* Set slave address and transfer direction */ 355 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_TXSLVA, 356 LPCIB_SMB_TXSLVA_ADDR(addr) | 357 (I2C_OP_READ_P(op) ? LPCIB_SMB_TXSLVA_READ : 0)); 358 359 b = (const uint8_t *)cmdbuf; 360 if (cmdlen > 0) 361 /* Set command byte */ 362 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HCMD, b[0]); 363 364 if (I2C_OP_WRITE_P(op)) { 365 /* Write data */ 366 b = buf; 367 if (cmdlen == 0 && len == 1) 368 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 369 LPCIB_SMB_HCMD, b[0]); 370 else if (len > 0) 371 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 372 LPCIB_SMB_HD0, b[0]); 373 if (len > 1) 374 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 375 LPCIB_SMB_HD1, b[1]); 376 } 377 378 /* Set SMBus command */ 379 if (cmdlen == 0) { 380 if (len == 0) 381 ctl = LPCIB_SMB_HC_CMD_QUICK; 382 else 383 ctl = LPCIB_SMB_HC_CMD_BYTE; 384 } else if (len == 1) 385 ctl = LPCIB_SMB_HC_CMD_BDATA; 386 else if (len == 2) 387 ctl = LPCIB_SMB_HC_CMD_WDATA; 388 389 if ((flags & I2C_F_POLL) == 0) 390 ctl |= LPCIB_SMB_HC_INTREN; 391 392 /* Start transaction */ 393 ctl |= LPCIB_SMB_HC_START; 394 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, ctl); 395 396 if (flags & I2C_F_POLL) { 397 /* Poll for completion */ 398 DELAY(ICHIIC_DELAY); 399 for (retries = 1000; retries > 0; retries--) { 400 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 401 LPCIB_SMB_HS); 402 if ((st & LPCIB_SMB_HS_BUSY) == 0) 403 break; 404 DELAY(ICHIIC_DELAY); 405 } 406 if (st & LPCIB_SMB_HS_BUSY) 407 goto timeout; 408 ichsmb_intr(sc); 409 } else { 410 /* Wait for interrupt */ 411 if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz)) 412 goto timeout; 413 } 414 415 if (sc->sc_i2c_xfer.error) 416 return (1); 417 418 return (0); 419 420 timeout: 421 /* 422 * Transfer timeout. Kill the transaction and clear status bits. 423 */ 424 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 425 aprint_error_dev(sc->sc_dev, 426 "exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, " 427 "flags 0x%02x: timeout, status %s\n", 428 op, addr, cmdlen, len, flags, fbuf); 429 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, 430 LPCIB_SMB_HC_KILL); 431 DELAY(ICHIIC_DELAY); 432 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 433 if ((st & LPCIB_SMB_HS_FAILED) == 0) { 434 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 435 aprint_error_dev(sc->sc_dev, "abort failed, status %s\n", 436 fbuf); 437 } 438 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); 439 return (1); 440 } 441 442 static int 443 ichsmb_intr(void *arg) 444 { 445 struct ichsmb_softc *sc = arg; 446 uint8_t st; 447 uint8_t *b; 448 size_t len; 449 #ifdef ICHIIC_DEBUG 450 char fbuf[64]; 451 #endif 452 453 /* Read status */ 454 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 455 if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR | 456 LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED | 457 LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0) 458 /* Interrupt was not for us */ 459 return (0); 460 461 #ifdef ICHIIC_DEBUG 462 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 463 printf("%s: intr st %s\n", device_xname(sc->sc_dev), fbuf); 464 #endif 465 466 /* Clear status bits */ 467 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); 468 469 /* Check for errors */ 470 if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) { 471 sc->sc_i2c_xfer.error = 1; 472 goto done; 473 } 474 475 if (st & LPCIB_SMB_HS_INTR) { 476 if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op)) 477 goto done; 478 479 /* Read data */ 480 b = sc->sc_i2c_xfer.buf; 481 len = sc->sc_i2c_xfer.len; 482 if (len > 0) 483 b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 484 LPCIB_SMB_HD0); 485 if (len > 1) 486 b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 487 LPCIB_SMB_HD1); 488 } 489 490 done: 491 if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0) 492 wakeup(sc); 493 return (1); 494 } 495 496 MODULE(MODULE_CLASS_DRIVER, ichsmb, "pci,iic"); 497 498 #ifdef _MODULE 499 #include "ioconf.c" 500 #endif 501 502 static int 503 ichsmb_modcmd(modcmd_t cmd, void *opaque) 504 { 505 int error = 0; 506 507 switch (cmd) { 508 case MODULE_CMD_INIT: 509 #ifdef _MODULE 510 error = config_init_component(cfdriver_ioconf_ichsmb, 511 cfattach_ioconf_ichsmb, cfdata_ioconf_ichsmb); 512 #endif 513 break; 514 case MODULE_CMD_FINI: 515 #ifdef _MODULE 516 error = config_fini_component(cfdriver_ioconf_ichsmb, 517 cfattach_ioconf_ichsmb, cfdata_ioconf_ichsmb); 518 #endif 519 break; 520 default: 521 #ifdef _MODULE 522 error = ENOTTY; 523 #endif 524 break; 525 } 526 527 return error; 528 } 529
Indexes created Thu Oct 02 14:10:14 GMT 2025