ichsmb.c revision 1.6
1 /* $NetBSD: ichsmb.c,v 1.6 2007/08/27 06:01:10 xtraeme Exp $ */ 2 /* $OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $ */ 3 4 /* 5 * Copyright (c) 2005, 2006 Alexander Yurchenko <grange (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* 21 * Intel ICH SMBus controller driver. 22 */ 23 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.6 2007/08/27 06:01:10 xtraeme Exp $"); 26 27 #include <sys/param.h> 28 #include <sys/device.h> 29 #include <sys/errno.h> 30 #include <sys/kernel.h> 31 #include <sys/lock.h> 32 #include <sys/proc.h> 33 34 #include <machine/bus.h> 35 36 #include <dev/pci/pcidevs.h> 37 #include <dev/pci/pcireg.h> 38 #include <dev/pci/pcivar.h> 39 40 #include <dev/ic/i82801lpcreg.h> 41 42 #include <dev/i2c/i2cvar.h> 43 44 #ifdef ICHIIC_DEBUG 45 #define DPRINTF(x) printf x 46 #else 47 #define DPRINTF(x) 48 #endif 49 50 #define ICHIIC_DELAY 100 51 #define ICHIIC_TIMEOUT 1 52 53 struct ichsmb_softc { 54 struct device sc_dev; 55 56 bus_space_tag_t sc_iot; 57 bus_space_handle_t sc_ioh; 58 void * sc_ih; 59 int sc_poll; 60 61 struct i2c_controller sc_i2c_tag; 62 struct lock sc_i2c_lock; 63 struct { 64 i2c_op_t op; 65 void * buf; 66 size_t len; 67 int flags; 68 volatile int error; 69 } sc_i2c_xfer; 70 }; 71 72 static int ichsmb_match(struct device *, struct cfdata *, void *); 73 static void ichsmb_attach(struct device *, struct device *, void *); 74 75 static int ichsmb_i2c_acquire_bus(void *, int); 76 static void ichsmb_i2c_release_bus(void *, int); 77 static int ichsmb_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, 78 size_t, void *, size_t, int); 79 80 static int ichsmb_intr(void *); 81 82 83 CFATTACH_DECL(ichsmb, sizeof(struct ichsmb_softc), 84 ichsmb_match, ichsmb_attach, NULL, NULL); 85 86 87 static int 88 ichsmb_match(struct device *parent, struct cfdata *match, void *aux) 89 { 90 struct pci_attach_args *pa = aux; 91 92 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) { 93 switch (PCI_PRODUCT(pa->pa_id)) { 94 case PCI_PRODUCT_INTEL_6300ESB_SMB: 95 case PCI_PRODUCT_INTEL_63XXESB_SMB: 96 case PCI_PRODUCT_INTEL_82801AA_SMB: 97 case PCI_PRODUCT_INTEL_82801AB_SMB: 98 case PCI_PRODUCT_INTEL_82801BA_SMB: 99 case PCI_PRODUCT_INTEL_82801CA_SMB: 100 case PCI_PRODUCT_INTEL_82801DB_SMB: 101 case PCI_PRODUCT_INTEL_82801E_SMB: 102 case PCI_PRODUCT_INTEL_82801EB_SMB: 103 case PCI_PRODUCT_INTEL_82801FB_SMB: 104 case PCI_PRODUCT_INTEL_82801G_SMB: 105 case PCI_PRODUCT_INTEL_82801H_SMB: 106 return 1; 107 } 108 } 109 return 0; 110 } 111 112 static void 113 ichsmb_attach(struct device *parent, struct device *self, void *aux) 114 { 115 struct ichsmb_softc *sc = (struct ichsmb_softc *)self; 116 struct pci_attach_args *pa = aux; 117 struct i2cbus_attach_args iba; 118 pcireg_t conf; 119 bus_size_t iosize; 120 pci_intr_handle_t ih; 121 const char *intrstr = NULL; 122 char devinfo[256]; 123 124 aprint_naive("\n"); 125 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 126 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 127 PCI_REVISION(pa->pa_class)); 128 129 /* Read configuration */ 130 conf = pci_conf_read(pa->pa_pc, pa->pa_tag, LPCIB_SMB_HOSTC); 131 DPRINTF(("%s: conf 0x%08x", sc->sc_dev.dv_xname, conf)); 132 133 if ((conf & LPCIB_SMB_HOSTC_HSTEN) == 0) { 134 aprint_error("%s: SMBus disabled\n", sc->sc_dev.dv_xname); 135 return; 136 } 137 138 /* Map I/O space */ 139 if (pci_mapreg_map(pa, LPCIB_SMB_BASE, PCI_MAPREG_TYPE_IO, 0, 140 &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) { 141 aprint_error("%s: can't map I/O space\n", sc->sc_dev.dv_xname); 142 return; 143 } 144 145 sc->sc_poll = 1; 146 if (conf & LPCIB_SMB_HOSTC_SMIEN) { 147 /* No PCI IRQ */ 148 aprint_normal("%s: SMI\n", sc->sc_dev.dv_xname); 149 } else { 150 /* Install interrupt handler */ 151 if (pci_intr_map(pa, &ih) == 0) { 152 intrstr = pci_intr_string(pa->pa_pc, ih); 153 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, 154 ichsmb_intr, sc); 155 if (sc->sc_ih != NULL) { 156 aprint_normal("%s: interrupting at %s\n", 157 sc->sc_dev.dv_xname, intrstr); 158 sc->sc_poll = 0; 159 } 160 } 161 if (sc->sc_poll) 162 aprint_normal("%s: polling\n", sc->sc_dev.dv_xname); 163 } 164 165 /* Attach I2C bus */ 166 lockinit(&sc->sc_i2c_lock, PZERO, "smblk", 0, 0); 167 sc->sc_i2c_tag.ic_cookie = sc; 168 sc->sc_i2c_tag.ic_acquire_bus = ichsmb_i2c_acquire_bus; 169 sc->sc_i2c_tag.ic_release_bus = ichsmb_i2c_release_bus; 170 sc->sc_i2c_tag.ic_exec = ichsmb_i2c_exec; 171 172 bzero(&iba, sizeof(iba)); 173 iba.iba_tag = &sc->sc_i2c_tag; 174 config_found(self, &iba, iicbus_print); 175 176 return; 177 } 178 179 static int 180 ichsmb_i2c_acquire_bus(void *cookie, int flags) 181 { 182 struct ichsmb_softc *sc = cookie; 183 184 if (cold || sc->sc_poll || (flags & I2C_F_POLL)) 185 return (0); 186 187 return (lockmgr(&sc->sc_i2c_lock, LK_EXCLUSIVE, NULL)); 188 } 189 190 static void 191 ichsmb_i2c_release_bus(void *cookie, int flags) 192 { 193 struct ichsmb_softc *sc = cookie; 194 195 if (cold || sc->sc_poll || (flags & I2C_F_POLL)) 196 return; 197 198 lockmgr(&sc->sc_i2c_lock, LK_RELEASE, NULL); 199 } 200 201 static int 202 ichsmb_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, 203 const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) 204 { 205 struct ichsmb_softc *sc = cookie; 206 const uint8_t *b; 207 uint8_t ctl = 0, st; 208 int retries; 209 char fbuf[64]; 210 211 DPRINTF(("%s: exec: op %d, addr 0x%02x, cmdlen %zu, len %d, " 212 "flags 0x%02x\n", sc->sc_dev.dv_xname, op, addr, cmdlen, 213 len, flags)); 214 215 /* Wait for bus to be idle */ 216 for (retries = 100; retries > 0; retries--) { 217 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 218 if (!(st & LPCIB_SMB_HS_BUSY)) 219 break; 220 DELAY(ICHIIC_DELAY); 221 } 222 #ifdef ICHIIC_DEBUG 223 bitmask_snprintf(st, LPCIB_SMB_HS_BITS, fbuf, sizeof(fbuf)); 224 printf("%s: exec: st 0x%s\n", sc->sc_dev.dv_xname, fbuf); 225 #endif 226 if (st & LPCIB_SMB_HS_BUSY) 227 return (1); 228 229 if (cold || sc->sc_poll) 230 flags |= I2C_F_POLL; 231 232 if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2) 233 return (1); 234 235 /* Setup transfer */ 236 sc->sc_i2c_xfer.op = op; 237 sc->sc_i2c_xfer.buf = buf; 238 sc->sc_i2c_xfer.len = len; 239 sc->sc_i2c_xfer.flags = flags; 240 sc->sc_i2c_xfer.error = 0; 241 242 /* Set slave address and transfer direction */ 243 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_TXSLVA, 244 LPCIB_SMB_TXSLVA_ADDR(addr) | 245 (I2C_OP_READ_P(op) ? LPCIB_SMB_TXSLVA_READ : 0)); 246 247 b = (const uint8_t *)cmdbuf; 248 if (cmdlen > 0) 249 /* Set command byte */ 250 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HCMD, b[0]); 251 252 if (I2C_OP_WRITE_P(op)) { 253 /* Write data */ 254 b = buf; 255 if (len > 0) 256 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 257 LPCIB_SMB_HD0, b[0]); 258 if (len > 1) 259 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 260 LPCIB_SMB_HD1, b[1]); 261 } 262 263 /* Set SMBus command */ 264 if (len == 0) 265 ctl = LPCIB_SMB_HC_CMD_BYTE; 266 else if (len == 1) 267 ctl = LPCIB_SMB_HC_CMD_BDATA; 268 else if (len == 2) 269 ctl = LPCIB_SMB_HC_CMD_WDATA; 270 271 if ((flags & I2C_F_POLL) == 0) 272 ctl |= LPCIB_SMB_HC_INTREN; 273 274 /* Start transaction */ 275 ctl |= LPCIB_SMB_HC_START; 276 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, ctl); 277 278 if (flags & I2C_F_POLL) { 279 /* Poll for completion */ 280 DELAY(ICHIIC_DELAY); 281 for (retries = 1000; retries > 0; retries--) { 282 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 283 LPCIB_SMB_HS); 284 if ((st & LPCIB_SMB_HS_BUSY) == 0) 285 break; 286 DELAY(ICHIIC_DELAY); 287 } 288 if (st & LPCIB_SMB_HS_BUSY) 289 goto timeout; 290 ichsmb_intr(sc); 291 } else { 292 /* Wait for interrupt */ 293 if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz)) 294 goto timeout; 295 } 296 297 if (sc->sc_i2c_xfer.error) 298 return (1); 299 300 return (0); 301 302 timeout: 303 /* 304 * Transfer timeout. Kill the transaction and clear status bits. 305 */ 306 bitmask_snprintf(st, LPCIB_SMB_HS_BITS, fbuf, sizeof(fbuf)); 307 printf("%s: exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, " 308 "flags 0x%02x: timeout, status 0x%s\n", 309 sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags, fbuf); 310 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, 311 LPCIB_SMB_HC_KILL); 312 DELAY(ICHIIC_DELAY); 313 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 314 if ((st & LPCIB_SMB_HS_FAILED) == 0) { 315 bitmask_snprintf(st, LPCIB_SMB_HS_BITS, fbuf, sizeof(fbuf)); 316 printf("%s: abort failed, status 0x%s\n", 317 sc->sc_dev.dv_xname, fbuf); 318 } 319 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); 320 return (1); 321 } 322 323 static int 324 ichsmb_intr(void *arg) 325 { 326 struct ichsmb_softc *sc = arg; 327 uint8_t st; 328 uint8_t *b; 329 size_t len; 330 #ifdef ICHIIC_DEBUG 331 char fbuf[64]; 332 #endif 333 334 /* Read status */ 335 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 336 if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR | 337 LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED | 338 LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0) 339 /* Interrupt was not for us */ 340 return (0); 341 342 #ifdef ICHIIC_DEBUG 343 bitmask_snprintf(st, LPCIB_SMB_HS_BITS, fbuf, sizeof(fbuf)); 344 printf("%s: intr st 0x%s\n", sc->sc_dev.dv_xname, fbuf); 345 #endif 346 347 /* Clear status bits */ 348 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); 349 350 /* Check for errors */ 351 if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) { 352 sc->sc_i2c_xfer.error = 1; 353 goto done; 354 } 355 356 if (st & LPCIB_SMB_HS_INTR) { 357 if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op)) 358 goto done; 359 360 /* Read data */ 361 b = sc->sc_i2c_xfer.buf; 362 len = sc->sc_i2c_xfer.len; 363 if (len > 0) 364 b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 365 LPCIB_SMB_HD0); 366 if (len > 1) 367 b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 368 LPCIB_SMB_HD1); 369 } 370 371 done: 372 if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0) 373 wakeup(sc); 374 return (1); 375 } 376
Indexes created Thu Oct 02 14:10:14 GMT 2025