ichsmb.c revision 1.62
1 /* $NetBSD: ichsmb.c,v 1.62 2019/12/09 21:00:48 ad Exp $ */ 2 /* $OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $ */ 3 4 /* 5 * Copyright (c) 2005, 2006 Alexander Yurchenko <grange (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* 21 * Intel ICH SMBus controller driver. 22 */ 23 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.62 2019/12/09 21:00:48 ad Exp $"); 26 27 #include <sys/param.h> 28 #include <sys/device.h> 29 #include <sys/errno.h> 30 #include <sys/kernel.h> 31 #include <sys/mutex.h> 32 #include <sys/proc.h> 33 #include <sys/module.h> 34 35 #include <sys/bus.h> 36 37 #include <dev/pci/pcidevs.h> 38 #include <dev/pci/pcireg.h> 39 #include <dev/pci/pcivar.h> 40 41 #include <dev/ic/i82801lpcreg.h> 42 43 #include <dev/i2c/i2cvar.h> 44 45 #ifdef ICHIIC_DEBUG 46 #define DPRINTF(x) printf x 47 #else 48 #define DPRINTF(x) 49 #endif 50 51 #define ICHIIC_DELAY 100 52 #define ICHIIC_TIMEOUT 1 53 54 struct ichsmb_softc { 55 device_t sc_dev; 56 57 bus_space_tag_t sc_iot; 58 bus_space_handle_t sc_ioh; 59 bus_size_t sc_size; 60 pci_chipset_tag_t sc_pc; 61 void * sc_ih; 62 int sc_poll; 63 pci_intr_handle_t *sc_pihp; 64 65 struct i2c_controller sc_i2c_tag; 66 kmutex_t sc_i2c_mutex; 67 struct { 68 i2c_op_t op; 69 void * buf; 70 size_t len; 71 int flags; 72 volatile int error; 73 } sc_i2c_xfer; 74 device_t sc_i2c_device; 75 }; 76 77 static int ichsmb_match(device_t, cfdata_t, void *); 78 static void ichsmb_attach(device_t, device_t, void *); 79 static int ichsmb_detach(device_t, int); 80 static int ichsmb_rescan(device_t, const char *, const int *); 81 static void ichsmb_chdet(device_t, device_t); 82 83 static int ichsmb_i2c_acquire_bus(void *, int); 84 static void ichsmb_i2c_release_bus(void *, int); 85 static int ichsmb_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, 86 size_t, void *, size_t, int); 87 88 static int ichsmb_intr(void *); 89 90 #include "ioconf.h" 91 92 CFATTACH_DECL3_NEW(ichsmb, sizeof(struct ichsmb_softc), 93 ichsmb_match, ichsmb_attach, ichsmb_detach, NULL, ichsmb_rescan, 94 ichsmb_chdet, DVF_DETACH_SHUTDOWN); 95 96 97 static int 98 ichsmb_match(device_t parent, cfdata_t match, void *aux) 99 { 100 struct pci_attach_args *pa = aux; 101 102 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) { 103 switch (PCI_PRODUCT(pa->pa_id)) { 104 case PCI_PRODUCT_INTEL_6300ESB_SMB: 105 case PCI_PRODUCT_INTEL_63XXESB_SMB: 106 case PCI_PRODUCT_INTEL_82801AA_SMB: 107 case PCI_PRODUCT_INTEL_82801AB_SMB: 108 case PCI_PRODUCT_INTEL_82801BA_SMB: 109 case PCI_PRODUCT_INTEL_82801CA_SMB: 110 case PCI_PRODUCT_INTEL_82801DB_SMB: 111 case PCI_PRODUCT_INTEL_82801E_SMB: 112 case PCI_PRODUCT_INTEL_82801EB_SMB: 113 case PCI_PRODUCT_INTEL_82801FB_SMB: 114 case PCI_PRODUCT_INTEL_82801G_SMB: 115 case PCI_PRODUCT_INTEL_82801H_SMB: 116 case PCI_PRODUCT_INTEL_82801I_SMB: 117 case PCI_PRODUCT_INTEL_82801JD_SMB: 118 case PCI_PRODUCT_INTEL_82801JI_SMB: 119 case PCI_PRODUCT_INTEL_3400_SMB: 120 case PCI_PRODUCT_INTEL_6SERIES_SMB: 121 case PCI_PRODUCT_INTEL_7SERIES_SMB: 122 case PCI_PRODUCT_INTEL_8SERIES_SMB: 123 case PCI_PRODUCT_INTEL_9SERIES_SMB: 124 case PCI_PRODUCT_INTEL_100SERIES_SMB: 125 case PCI_PRODUCT_INTEL_100SERIES_LP_SMB: 126 case PCI_PRODUCT_INTEL_2HS_SMB: 127 case PCI_PRODUCT_INTEL_3HS_SMB: 128 case PCI_PRODUCT_INTEL_CORE4G_M_SMB: 129 case PCI_PRODUCT_INTEL_CORE5G_M_SMB: 130 case PCI_PRODUCT_INTEL_BAYTRAIL_PCU_SMB: 131 case PCI_PRODUCT_INTEL_BSW_PCU_SMB: 132 case PCI_PRODUCT_INTEL_APL_SMB: 133 case PCI_PRODUCT_INTEL_GLK_SMB: 134 case PCI_PRODUCT_INTEL_C600_SMBUS: 135 case PCI_PRODUCT_INTEL_C600_SMB_0: 136 case PCI_PRODUCT_INTEL_C600_SMB_1: 137 case PCI_PRODUCT_INTEL_C600_SMB_2: 138 case PCI_PRODUCT_INTEL_C610_SMB: 139 case PCI_PRODUCT_INTEL_C620_SMB: 140 case PCI_PRODUCT_INTEL_C620_SMB_S: 141 case PCI_PRODUCT_INTEL_EP80579_SMB: 142 case PCI_PRODUCT_INTEL_DH89XXCC_SMB: 143 case PCI_PRODUCT_INTEL_DH89XXCL_SMB: 144 case PCI_PRODUCT_INTEL_C2000_PCU_SMBUS: 145 case PCI_PRODUCT_INTEL_C3K_SMBUS_LEGACY: 146 return 1; 147 } 148 } 149 return 0; 150 } 151 152 static void 153 ichsmb_attach(device_t parent, device_t self, void *aux) 154 { 155 struct ichsmb_softc *sc = device_private(self); 156 struct pci_attach_args *pa = aux; 157 pcireg_t conf; 158 const char *intrstr = NULL; 159 char intrbuf[PCI_INTRSTR_LEN]; 160 int flags; 161 162 sc->sc_dev = self; 163 sc->sc_pc = pa->pa_pc; 164 165 pci_aprint_devinfo(pa, NULL); 166 mutex_init(&sc->sc_i2c_mutex, MUTEX_DEFAULT, IPL_NONE); 167 168 /* Read configuration */ 169 conf = pci_conf_read(pa->pa_pc, pa->pa_tag, LPCIB_SMB_HOSTC); 170 DPRINTF(("%s: conf 0x%08x\n", device_xname(sc->sc_dev), conf)); 171 172 if ((conf & LPCIB_SMB_HOSTC_HSTEN) == 0) { 173 aprint_error_dev(self, "SMBus disabled\n"); 174 goto out; 175 } 176 177 /* Map I/O space */ 178 if (pci_mapreg_map(pa, LPCIB_SMB_BASE, PCI_MAPREG_TYPE_IO, 0, 179 &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) { 180 aprint_error_dev(self, "can't map I/O space\n"); 181 goto out; 182 } 183 184 sc->sc_poll = 1; 185 sc->sc_ih = NULL; 186 if (conf & LPCIB_SMB_HOSTC_SMIEN) { 187 /* No PCI IRQ */ 188 aprint_normal_dev(self, "interrupting at SMI\n"); 189 } else { 190 /* Install interrupt handler */ 191 if (pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0) == 0) { 192 intrstr = pci_intr_string(pa->pa_pc, sc->sc_pihp[0], 193 intrbuf, sizeof(intrbuf)); 194 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, 195 sc->sc_pihp[0], IPL_BIO, ichsmb_intr, sc, 196 device_xname(sc->sc_dev)); 197 if (sc->sc_ih != NULL) { 198 aprint_normal_dev(self, "interrupting at %s\n", 199 intrstr); 200 sc->sc_poll = 0; 201 } else { 202 pci_intr_release(pa->pa_pc, sc->sc_pihp, 1); 203 sc->sc_pihp = NULL; 204 } 205 } 206 if (sc->sc_poll) 207 aprint_normal_dev(self, "polling\n"); 208 } 209 210 sc->sc_i2c_device = NULL; 211 flags = 0; 212 ichsmb_rescan(self, "i2cbus", &flags); 213 214 out: if (!pmf_device_register(self, NULL, NULL)) 215 aprint_error_dev(self, "couldn't establish power handler\n"); 216 } 217 218 static int 219 ichsmb_rescan(device_t self, const char *ifattr, const int *flags) 220 { 221 struct ichsmb_softc *sc = device_private(self); 222 struct i2cbus_attach_args iba; 223 224 if (!ifattr_match(ifattr, "i2cbus")) 225 return 0; 226 227 if (sc->sc_i2c_device) 228 return 0; 229 230 /* Attach I2C bus */ 231 sc->sc_i2c_tag.ic_cookie = sc; 232 sc->sc_i2c_tag.ic_acquire_bus = ichsmb_i2c_acquire_bus; 233 sc->sc_i2c_tag.ic_release_bus = ichsmb_i2c_release_bus; 234 sc->sc_i2c_tag.ic_exec = ichsmb_i2c_exec; 235 236 memset(&iba, 0, sizeof(iba)); 237 iba.iba_type = I2C_TYPE_SMBUS; 238 iba.iba_tag = &sc->sc_i2c_tag; 239 sc->sc_i2c_device = config_found_ia(self, ifattr, &iba, iicbus_print); 240 241 return 0; 242 } 243 244 static int 245 ichsmb_detach(device_t self, int flags) 246 { 247 struct ichsmb_softc *sc = device_private(self); 248 int error; 249 250 if (sc->sc_i2c_device) { 251 error = config_detach(sc->sc_i2c_device, flags); 252 if (error) 253 return error; 254 } 255 256 mutex_destroy(&sc->sc_i2c_mutex); 257 258 if (sc->sc_ih) { 259 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 260 sc->sc_ih = NULL; 261 } 262 263 if (sc->sc_pihp) { 264 pci_intr_release(sc->sc_pc, sc->sc_pihp, 1); 265 sc->sc_pihp = NULL; 266 } 267 268 if (sc->sc_size != 0) 269 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size); 270 271 return 0; 272 } 273 274 static void 275 ichsmb_chdet(device_t self, device_t child) 276 { 277 struct ichsmb_softc *sc = device_private(self); 278 279 if (sc->sc_i2c_device == child) 280 sc->sc_i2c_device = NULL; 281 } 282 283 static int 284 ichsmb_i2c_acquire_bus(void *cookie, int flags) 285 { 286 struct ichsmb_softc *sc = cookie; 287 288 if (cold) 289 return 0; 290 291 mutex_enter(&sc->sc_i2c_mutex); 292 return 0; 293 } 294 295 static void 296 ichsmb_i2c_release_bus(void *cookie, int flags) 297 { 298 struct ichsmb_softc *sc = cookie; 299 300 if (cold) 301 return; 302 303 mutex_exit(&sc->sc_i2c_mutex); 304 } 305 306 static int 307 ichsmb_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, 308 const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) 309 { 310 struct ichsmb_softc *sc = cookie; 311 const uint8_t *b; 312 uint8_t ctl = 0, st; 313 int retries; 314 char fbuf[64]; 315 316 DPRINTF(("%s: exec: op %d, addr 0x%02x, cmdlen %zu, len %zu, " 317 "flags 0x%02x\n", device_xname(sc->sc_dev), op, addr, cmdlen, 318 len, flags)); 319 320 /* Clear status bits */ 321 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, 322 LPCIB_SMB_HS_INTR | LPCIB_SMB_HS_DEVERR | 323 LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED); 324 bus_space_barrier(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, 1, 325 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 326 327 /* Wait for bus to be idle */ 328 for (retries = 100; retries > 0; retries--) { 329 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 330 if (!(st & LPCIB_SMB_HS_BUSY)) 331 break; 332 DELAY(ICHIIC_DELAY); 333 } 334 #ifdef ICHIIC_DEBUG 335 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 336 printf("%s: exec: st %s\n", device_xname(sc->sc_dev), fbuf); 337 #endif 338 if (st & LPCIB_SMB_HS_BUSY) 339 return (1); 340 341 if (cold || sc->sc_poll) 342 flags |= I2C_F_POLL; 343 344 if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2 || 345 (cmdlen == 0 && len > 1)) 346 return (1); 347 348 /* Setup transfer */ 349 sc->sc_i2c_xfer.op = op; 350 sc->sc_i2c_xfer.buf = buf; 351 sc->sc_i2c_xfer.len = len; 352 sc->sc_i2c_xfer.flags = flags; 353 sc->sc_i2c_xfer.error = 0; 354 355 /* Set slave address and transfer direction */ 356 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_TXSLVA, 357 LPCIB_SMB_TXSLVA_ADDR(addr) | 358 (I2C_OP_READ_P(op) ? LPCIB_SMB_TXSLVA_READ : 0)); 359 360 b = (const uint8_t *)cmdbuf; 361 if (cmdlen > 0) 362 /* Set command byte */ 363 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HCMD, b[0]); 364 365 if (I2C_OP_WRITE_P(op)) { 366 /* Write data */ 367 b = buf; 368 if (cmdlen == 0 && len == 1) 369 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 370 LPCIB_SMB_HCMD, b[0]); 371 else if (len > 0) 372 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 373 LPCIB_SMB_HD0, b[0]); 374 if (len > 1) 375 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 376 LPCIB_SMB_HD1, b[1]); 377 } 378 379 /* Set SMBus command */ 380 if (cmdlen == 0) { 381 if (len == 0) 382 ctl = LPCIB_SMB_HC_CMD_QUICK; 383 else 384 ctl = LPCIB_SMB_HC_CMD_BYTE; 385 } else if (len == 1) 386 ctl = LPCIB_SMB_HC_CMD_BDATA; 387 else if (len == 2) 388 ctl = LPCIB_SMB_HC_CMD_WDATA; 389 390 if ((flags & I2C_F_POLL) == 0) 391 ctl |= LPCIB_SMB_HC_INTREN; 392 393 /* Start transaction */ 394 ctl |= LPCIB_SMB_HC_START; 395 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, ctl); 396 397 if (flags & I2C_F_POLL) { 398 /* Poll for completion */ 399 DELAY(ICHIIC_DELAY); 400 for (retries = 1000; retries > 0; retries--) { 401 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 402 LPCIB_SMB_HS); 403 if ((st & LPCIB_SMB_HS_BUSY) == 0) 404 break; 405 DELAY(ICHIIC_DELAY); 406 } 407 if (st & LPCIB_SMB_HS_BUSY) 408 goto timeout; 409 ichsmb_intr(sc); 410 } else { 411 /* Wait for interrupt */ 412 if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz)) 413 goto timeout; 414 } 415 416 if (sc->sc_i2c_xfer.error) 417 return (1); 418 419 return (0); 420 421 timeout: 422 /* 423 * Transfer timeout. Kill the transaction and clear status bits. 424 */ 425 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 426 aprint_error_dev(sc->sc_dev, 427 "exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, " 428 "flags 0x%02x: timeout, status %s\n", 429 op, addr, cmdlen, len, flags, fbuf); 430 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, 431 LPCIB_SMB_HC_KILL); 432 DELAY(ICHIIC_DELAY); 433 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 434 if ((st & LPCIB_SMB_HS_FAILED) == 0) { 435 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 436 aprint_error_dev(sc->sc_dev, "abort failed, status %s\n", 437 fbuf); 438 } 439 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); 440 return (1); 441 } 442 443 static int 444 ichsmb_intr(void *arg) 445 { 446 struct ichsmb_softc *sc = arg; 447 uint8_t st; 448 uint8_t *b; 449 size_t len; 450 #ifdef ICHIIC_DEBUG 451 char fbuf[64]; 452 #endif 453 454 /* Read status */ 455 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); 456 if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR | 457 LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED | 458 LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0) 459 /* Interrupt was not for us */ 460 return (0); 461 462 #ifdef ICHIIC_DEBUG 463 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); 464 printf("%s: intr st %s\n", device_xname(sc->sc_dev), fbuf); 465 #endif 466 467 /* Clear status bits */ 468 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); 469 470 /* Check for errors */ 471 if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) { 472 sc->sc_i2c_xfer.error = 1; 473 goto done; 474 } 475 476 if (st & LPCIB_SMB_HS_INTR) { 477 if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op)) 478 goto done; 479 480 /* Read data */ 481 b = sc->sc_i2c_xfer.buf; 482 len = sc->sc_i2c_xfer.len; 483 if (len > 0) 484 b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 485 LPCIB_SMB_HD0); 486 if (len > 1) 487 b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 488 LPCIB_SMB_HD1); 489 } 490 491 done: 492 if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0) 493 wakeup(sc); 494 return (1); 495 } 496 497 MODULE(MODULE_CLASS_DRIVER, ichsmb, "pci,iic"); 498 499 #ifdef _MODULE 500 #include "ioconf.c" 501 #endif 502 503 static int 504 ichsmb_modcmd(modcmd_t cmd, void *opaque) 505 { 506 int error = 0; 507 508 switch (cmd) { 509 case MODULE_CMD_INIT: 510 #ifdef _MODULE 511 error = config_init_component(cfdriver_ioconf_ichsmb, 512 cfattach_ioconf_ichsmb, cfdata_ioconf_ichsmb); 513 #endif 514 break; 515 case MODULE_CMD_FINI: 516 #ifdef _MODULE 517 error = config_fini_component(cfdriver_ioconf_ichsmb, 518 cfattach_ioconf_ichsmb, cfdata_ioconf_ichsmb); 519 #endif 520 break; 521 default: 522 #ifdef _MODULE 523 error = ENOTTY; 524 #endif 525 break; 526 } 527 528 return error; 529 } 530
Indexes created Thu Oct 02 14:10:14 GMT 2025