if_epic_pci.c revision 1.6
1 /* $NetBSD: if_epic_pci.c,v 1.6 1999/03/24 01:05:15 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Standard Microsystems Corp. 83C170 42 * Ethernet PCI Integrated Controller (EPIC/100) driver. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <net/if.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/if_ether.h> 63 64 #if NBPFILTER > 0 65 #include <net/bpf.h> 66 #endif 67 68 #ifdef INET 69 #include <netinet/in.h> 70 #include <netinet/if_inarp.h> 71 #endif 72 73 #ifdef NS 74 #include <netns/ns.h> 75 #include <netns/ns_if.h> 76 #endif 77 78 #include <machine/bus.h> 79 #include <machine/intr.h> 80 81 #include <dev/mii/miivar.h> 82 83 #include <dev/ic/smc83c170reg.h> 84 #include <dev/ic/smc83c170var.h> 85 86 #include <dev/pci/pcivar.h> 87 #include <dev/pci/pcireg.h> 88 #include <dev/pci/pcidevs.h> 89 90 /* 91 * PCI configuration space registers used by the EPIC. 92 */ 93 #define EPIC_PCI_IOBA 0x10 /* i/o mapped base */ 94 #define EPIC_PCI_MMBA 0x14 /* memory mapped base */ 95 96 struct epic_pci_softc { 97 struct epic_softc sc_epic; /* real EPIC softc */ 98 99 /* PCI-specific goo. */ 100 void *sc_ih; /* interrupt handle */ 101 }; 102 103 int epic_pci_match __P((struct device *, struct cfdata *, void *)); 104 void epic_pci_attach __P((struct device *, struct device *, void *)); 105 106 struct cfattach epic_pci_ca = { 107 sizeof(struct epic_pci_softc), epic_pci_match, epic_pci_attach, 108 }; 109 110 int 111 epic_pci_match(parent, match, aux) 112 struct device *parent; 113 struct cfdata *match; 114 void *aux; 115 { 116 struct pci_attach_args *pa = aux; 117 118 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SMC && 119 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SMC_83C170) 120 return (1); 121 122 return (0); 123 } 124 125 void 126 epic_pci_attach(parent, self, aux) 127 struct device *parent, *self; 128 void *aux; 129 { 130 struct epic_pci_softc *psc = (struct epic_pci_softc *)self; 131 struct epic_softc *sc = &psc->sc_epic; 132 struct pci_attach_args *pa = aux; 133 pci_chipset_tag_t pc = pa->pa_pc; 134 pci_intr_handle_t ih; 135 const char *intrstr = NULL; 136 bus_space_tag_t iot, memt; 137 bus_space_handle_t ioh, memh; 138 int ioh_valid, memh_valid; 139 140 /* 141 * Map the device. 142 */ 143 ioh_valid = (pci_mapreg_map(pa, EPIC_PCI_IOBA, 144 PCI_MAPREG_TYPE_IO, 0, 145 &iot, &ioh, NULL, NULL) == 0); 146 memh_valid = (pci_mapreg_map(pa, EPIC_PCI_MMBA, 147 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 148 &memt, &memh, NULL, NULL) == 0); 149 150 if (memh_valid) { 151 sc->sc_st = memt; 152 sc->sc_sh = memh; 153 } else if (ioh_valid) { 154 sc->sc_st = iot; 155 sc->sc_sh = ioh; 156 } else { 157 printf(": unable to map device registers\n"); 158 return; 159 } 160 161 sc->sc_dmat = pa->pa_dmat; 162 163 printf(": SMC EPIC/100 Fast Ethernet\n"); 164 165 /* Make sure bus mastering is enabled. */ 166 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 167 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 168 PCI_COMMAND_MASTER_ENABLE); 169 170 /* 171 * Map and establish our interrupt. 172 */ 173 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 174 pa->pa_intrline, &ih)) { 175 printf("%s: unable to map interrupt\n", sc->sc_dev.dv_xname); 176 return; 177 } 178 intrstr = pci_intr_string(pc, ih); 179 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, epic_intr, sc); 180 if (psc->sc_ih == NULL) { 181 printf("%s: unable to establish interrupt", 182 sc->sc_dev.dv_xname); 183 if (intrstr != NULL) 184 printf(" at %s", intrstr); 185 printf("\n"); 186 return; 187 } 188 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 189 190 /* 191 * Finish off the attach. 192 */ 193 epic_attach(sc); 194 } 195
Indexes created Thu Oct 02 14:10:14 GMT 2025