if_ex_pci.c revision 1.15.2.5 1 1.15.2.5 nathanw /* $NetBSD: if_ex_pci.c,v 1.15.2.5 2002/08/01 02:45:15 nathanw Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.3 thorpej * by Frank van der Linden; Jason R. Thorpe of the Numerical Aerospace
9 1.3 thorpej * Simulation Facility, NASA Ames Research Center.
10 1.1 fvdl *
11 1.1 fvdl * Redistribution and use in source and binary forms, with or without
12 1.1 fvdl * modification, are permitted provided that the following conditions
13 1.1 fvdl * are met:
14 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
15 1.1 fvdl * notice, this list of conditions and the following disclaimer.
16 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
18 1.1 fvdl * documentation and/or other materials provided with the distribution.
19 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
20 1.1 fvdl * must display the following acknowledgement:
21 1.1 fvdl * This product includes software developed by the NetBSD
22 1.1 fvdl * Foundation, Inc. and its contributors.
23 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 fvdl * contributors may be used to endorse or promote products derived
25 1.1 fvdl * from this software without specific prior written permission.
26 1.1 fvdl *
27 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
38 1.1 fvdl */
39 1.15.2.3 nathanw
40 1.15.2.3 nathanw #include <sys/cdefs.h>
41 1.15.2.5 nathanw __KERNEL_RCSID(0, "$NetBSD: if_ex_pci.c,v 1.15.2.5 2002/08/01 02:45:15 nathanw Exp $");
42 1.1 fvdl
43 1.1 fvdl #include <sys/param.h>
44 1.1 fvdl #include <sys/systm.h>
45 1.1 fvdl #include <sys/mbuf.h>
46 1.1 fvdl #include <sys/socket.h>
47 1.1 fvdl #include <sys/ioctl.h>
48 1.1 fvdl #include <sys/errno.h>
49 1.1 fvdl #include <sys/syslog.h>
50 1.1 fvdl #include <sys/select.h>
51 1.1 fvdl #include <sys/device.h>
52 1.1 fvdl
53 1.1 fvdl #include <net/if.h>
54 1.1 fvdl #include <net/if_dl.h>
55 1.1 fvdl #include <net/if_ether.h>
56 1.1 fvdl #include <net/if_media.h>
57 1.1 fvdl
58 1.1 fvdl #include <machine/cpu.h>
59 1.1 fvdl #include <machine/bus.h>
60 1.1 fvdl #include <machine/intr.h>
61 1.1 fvdl
62 1.1 fvdl #include <dev/mii/miivar.h>
63 1.1 fvdl #include <dev/mii/mii.h>
64 1.1 fvdl
65 1.1 fvdl #include <dev/ic/elink3var.h>
66 1.1 fvdl #include <dev/ic/elink3reg.h>
67 1.1 fvdl #include <dev/ic/elinkxlreg.h>
68 1.1 fvdl #include <dev/ic/elinkxlvar.h>
69 1.1 fvdl
70 1.1 fvdl #include <dev/pci/pcivar.h>
71 1.1 fvdl #include <dev/pci/pcireg.h>
72 1.1 fvdl #include <dev/pci/pcidevs.h>
73 1.1 fvdl
74 1.14 fvdl struct ex_pci_softc {
75 1.14 fvdl struct ex_softc sc_ex;
76 1.15.2.2 nathanw
77 1.15.2.2 nathanw /* PCI function status space. 556,556B requests it. */
78 1.15.2.2 nathanw bus_space_tag_t sc_funct;
79 1.15.2.2 nathanw bus_space_handle_t sc_funch;
80 1.15.2.2 nathanw
81 1.15.2.5 nathanw pci_chipset_tag_t psc_pc; /* pci chipset tag */
82 1.15.2.5 nathanw pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */
83 1.15.2.5 nathanw pcitag_t psc_tag; /* pci device tag */
84 1.15.2.5 nathanw
85 1.15.2.5 nathanw int psc_pwrmgmt_csr_reg; /* ACPI power management register */
86 1.15.2.5 nathanw pcireg_t psc_pwrmgmt_csr; /* ...and the contents at D0 */
87 1.14 fvdl };
88 1.14 fvdl
89 1.1 fvdl /*
90 1.1 fvdl * PCI constants.
91 1.1 fvdl * XXX These should be in a common file!
92 1.1 fvdl */
93 1.1 fvdl #define PCI_CONN 0x48 /* Connector type */
94 1.1 fvdl #define PCI_CBIO 0x10 /* Configuration Base IO Address */
95 1.1 fvdl #define PCI_POWERCTL 0xe0
96 1.14 fvdl #define PCI_FUNCMEM 0x18
97 1.14 fvdl
98 1.15.2.2 nathanw #define PCI_INTR 4
99 1.14 fvdl #define PCI_INTRACK 0x00008000
100 1.1 fvdl
101 1.1 fvdl int ex_pci_match __P((struct device *, struct cfdata *, void *));
102 1.1 fvdl void ex_pci_attach __P((struct device *, struct device *, void *));
103 1.14 fvdl void ex_pci_intr_ack __P((struct ex_softc *));
104 1.1 fvdl
105 1.15.2.5 nathanw int ex_pci_enable __P((struct ex_softc *));
106 1.15.2.5 nathanw void ex_pci_disable __P((struct ex_softc *));
107 1.15.2.5 nathanw
108 1.15.2.5 nathanw void ex_pci_confreg_restore __P((struct ex_pci_softc *));
109 1.15.2.5 nathanw
110 1.1 fvdl struct cfattach ex_pci_ca = {
111 1.14 fvdl sizeof(struct ex_pci_softc), ex_pci_match, ex_pci_attach
112 1.1 fvdl };
113 1.1 fvdl
114 1.3 thorpej const struct ex_pci_product {
115 1.3 thorpej u_int32_t epp_prodid; /* PCI product ID */
116 1.3 thorpej int epp_flags; /* initial softc flags */
117 1.3 thorpej const char *epp_name; /* device name */
118 1.3 thorpej } ex_pci_products[] = {
119 1.3 thorpej { PCI_PRODUCT_3COM_3C900TPO, 0,
120 1.4 thorpej "3c900-TPO Ethernet" },
121 1.3 thorpej { PCI_PRODUCT_3COM_3C900COMBO, 0,
122 1.4 thorpej "3c900-COMBO Ethernet" },
123 1.3 thorpej
124 1.3 thorpej { PCI_PRODUCT_3COM_3C905TX, EX_CONF_MII,
125 1.4 thorpej "3c905-TX 10/100 Ethernet" },
126 1.3 thorpej { PCI_PRODUCT_3COM_3C905T4, EX_CONF_MII,
127 1.4 thorpej "3c905-T4 10/100 Ethernet" },
128 1.3 thorpej
129 1.3 thorpej { PCI_PRODUCT_3COM_3C900BTPO, EX_CONF_90XB,
130 1.4 thorpej "3c900B-TPO Ethernet" },
131 1.3 thorpej { PCI_PRODUCT_3COM_3C900BCOMBO, EX_CONF_90XB,
132 1.4 thorpej "3c900B-COMBO Ethernet" },
133 1.6 fvdl { PCI_PRODUCT_3COM_3C900BTPC, EX_CONF_90XB,
134 1.6 fvdl "3c900B-TPC Ethernet" },
135 1.3 thorpej
136 1.3 thorpej { PCI_PRODUCT_3COM_3C905BTX, EX_CONF_90XB|EX_CONF_MII|EX_CONF_INTPHY,
137 1.4 thorpej "3c905B-TX 10/100 Ethernet" },
138 1.3 thorpej { PCI_PRODUCT_3COM_3C905BT4, EX_CONF_90XB|EX_CONF_MII,
139 1.4 thorpej "3c905B-T4 10/100 Ethernet" },
140 1.9 drochner { PCI_PRODUCT_3COM_3C905BCOMBO, EX_CONF_90XB/*|EX_CONF_MII|EX_CONF_INTPHY*/,
141 1.9 drochner "3c905B-COMBO 10/100 Ethernet" },
142 1.8 fvdl { PCI_PRODUCT_3COM_3C905BFX, EX_CONF_90XB,
143 1.4 thorpej "3c905B-FX 10/100 Ethernet" },
144 1.4 thorpej
145 1.4 thorpej /* XXX Internal PHY? */
146 1.10 mycroft { PCI_PRODUCT_3COM_3C980SRV, EX_CONF_90XB,
147 1.4 thorpej "3c980 Server Adapter 10/100 Ethernet" },
148 1.15.2.4 nathanw { PCI_PRODUCT_3COM_3C980CTXM, EX_CONF_90XB|EX_CONF_MII,
149 1.12 thorpej "3c980C-TXM 10/100 Ethernet" },
150 1.12 thorpej
151 1.7 ross { PCI_PRODUCT_3COM_3C905CTX, EX_CONF_90XB|EX_CONF_MII,
152 1.7 ross "3c905C-TX 10/100 Ethernet with mngmt" },
153 1.13 billc
154 1.13 billc { PCI_PRODUCT_3COM_3C450TX, EX_CONF_90XB,
155 1.13 billc "3c450-TX 10/100 Ethernet" },
156 1.13 billc
157 1.13 billc { PCI_PRODUCT_3COM_3CSOHO100TX, EX_CONF_90XB,
158 1.13 billc "3cSOHO100-TX 10/100 Ethernet" },
159 1.3 thorpej
160 1.14 fvdl { PCI_PRODUCT_3COM_3C555,
161 1.14 fvdl EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
162 1.14 fvdl EX_CONF_EEPROM_8BIT,
163 1.14 fvdl "3c555 MiniPCI 10/100 Ethernet" },
164 1.14 fvdl
165 1.14 fvdl { PCI_PRODUCT_3COM_3C556,
166 1.14 fvdl EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
167 1.14 fvdl EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
168 1.14 fvdl EX_CONF_PHY_POWER | EX_CONF_EEPROM_8BIT,
169 1.14 fvdl "3c556 MiniPCI 10/100 Ethernet" },
170 1.14 fvdl
171 1.14 fvdl { PCI_PRODUCT_3COM_3C556B,
172 1.14 fvdl EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
173 1.14 fvdl EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
174 1.14 fvdl EX_CONF_PHY_POWER,
175 1.14 fvdl "3c556B MiniPCI 10/100 Ethernet" },
176 1.14 fvdl
177 1.3 thorpej { 0, 0,
178 1.3 thorpej NULL },
179 1.3 thorpej };
180 1.3 thorpej
181 1.3 thorpej const struct ex_pci_product *ex_pci_lookup
182 1.3 thorpej __P((const struct pci_attach_args *));
183 1.3 thorpej
184 1.3 thorpej const struct ex_pci_product *
185 1.3 thorpej ex_pci_lookup(pa)
186 1.3 thorpej const struct pci_attach_args *pa;
187 1.3 thorpej {
188 1.3 thorpej const struct ex_pci_product *epp;
189 1.3 thorpej
190 1.3 thorpej if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3COM)
191 1.3 thorpej return (NULL);
192 1.3 thorpej
193 1.3 thorpej for (epp = ex_pci_products; epp->epp_name != NULL; epp++)
194 1.3 thorpej if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid)
195 1.3 thorpej return (epp);
196 1.3 thorpej return (NULL);
197 1.3 thorpej }
198 1.3 thorpej
199 1.1 fvdl int
200 1.1 fvdl ex_pci_match(parent, match, aux)
201 1.1 fvdl struct device *parent;
202 1.1 fvdl struct cfdata *match;
203 1.1 fvdl void *aux;
204 1.1 fvdl {
205 1.1 fvdl struct pci_attach_args *pa = (struct pci_attach_args *) aux;
206 1.1 fvdl
207 1.3 thorpej if (ex_pci_lookup(pa) != NULL)
208 1.3 thorpej return (2); /* beat ep_pci */
209 1.1 fvdl
210 1.3 thorpej return (0);
211 1.1 fvdl }
212 1.1 fvdl
213 1.1 fvdl void
214 1.1 fvdl ex_pci_attach(parent, self, aux)
215 1.1 fvdl struct device *parent, *self;
216 1.1 fvdl void *aux;
217 1.1 fvdl {
218 1.1 fvdl struct ex_softc *sc = (void *)self;
219 1.14 fvdl struct ex_pci_softc *psc = (void *)self;
220 1.1 fvdl struct pci_attach_args *pa = aux;
221 1.1 fvdl pci_chipset_tag_t pc = pa->pa_pc;
222 1.1 fvdl pci_intr_handle_t ih;
223 1.3 thorpej const struct ex_pci_product *epp;
224 1.1 fvdl const char *intrstr = NULL;
225 1.11 mycroft int rev, pmreg;
226 1.11 mycroft pcireg_t reg;
227 1.1 fvdl
228 1.1 fvdl if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
229 1.1 fvdl &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
230 1.1 fvdl printf(": can't map i/o space\n");
231 1.1 fvdl return;
232 1.1 fvdl }
233 1.1 fvdl
234 1.3 thorpej epp = ex_pci_lookup(pa);
235 1.3 thorpej if (epp == NULL) {
236 1.3 thorpej printf("\n");
237 1.3 thorpej panic("ex_pci_attach: impossible");
238 1.1 fvdl }
239 1.1 fvdl
240 1.9 drochner rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG));
241 1.9 drochner printf(": 3Com %s (rev. 0x%x)\n", epp->epp_name, rev);
242 1.1 fvdl
243 1.3 thorpej sc->sc_dmat = pa->pa_dmat;
244 1.3 thorpej
245 1.3 thorpej sc->ex_bustype = EX_BUS_PCI;
246 1.3 thorpej sc->ex_conf = epp->epp_flags;
247 1.3 thorpej
248 1.1 fvdl /* Enable the card. */
249 1.1 fvdl pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
250 1.1 fvdl pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
251 1.1 fvdl PCI_COMMAND_MASTER_ENABLE);
252 1.1 fvdl
253 1.15.2.5 nathanw psc->psc_pc = pc;
254 1.15.2.5 nathanw psc->psc_tag = pa->pa_tag;
255 1.15.2.5 nathanw psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] =
256 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
257 1.15.2.5 nathanw psc->psc_regs[PCI_BHLC_REG>>2] =
258 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
259 1.15.2.5 nathanw psc->psc_regs[PCI_CBIO>>2] =
260 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_CBIO);
261 1.15.2.5 nathanw
262 1.15.2.2 nathanw if (sc->ex_conf & EX_CONF_PCI_FUNCREG) {
263 1.15.2.2 nathanw /* Map PCI function status window. */
264 1.15.2.2 nathanw if (pci_mapreg_map(pa, PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0,
265 1.15.2.2 nathanw &psc->sc_funct, &psc->sc_funch, NULL, NULL)) {
266 1.15.2.2 nathanw printf("%s: unable to map function status window\n",
267 1.15.2.2 nathanw sc->sc_dev.dv_xname);
268 1.15.2.2 nathanw return;
269 1.15.2.2 nathanw }
270 1.15.2.2 nathanw sc->intr_ack = ex_pci_intr_ack;
271 1.15.2.5 nathanw
272 1.15.2.5 nathanw psc->psc_regs[PCI_FUNCMEM>>2] =
273 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM);
274 1.15.2.2 nathanw }
275 1.15.2.5 nathanw
276 1.15.2.5 nathanw psc->psc_regs[PCI_INTERRUPT_REG>>2] =
277 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
278 1.15.2.5 nathanw
279 1.1 fvdl /* Get it out of power save mode if needed (BIOS bugs) */
280 1.11 mycroft if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
281 1.15.2.5 nathanw sc->enable = ex_pci_enable;
282 1.15.2.5 nathanw sc->disable = ex_pci_disable;
283 1.15.2.5 nathanw
284 1.15.2.5 nathanw psc->psc_pwrmgmt_csr_reg = pmreg + 4;
285 1.15.2.5 nathanw reg = pci_conf_read(pc, pa->pa_tag,
286 1.15.2.5 nathanw psc->psc_pwrmgmt_csr_reg) & 0x3;
287 1.15.2.5 nathanw
288 1.15.2.5 nathanw psc->psc_pwrmgmt_csr = (reg & ~PCI_PMCSR_STATE_MASK) |
289 1.15.2.5 nathanw PCI_PMCSR_STATE_D0;
290 1.15.2.5 nathanw
291 1.15.2.5 nathanw if (reg == PCI_PMCSR_STATE_D3) {
292 1.1 fvdl /*
293 1.1 fvdl * The card has lost all configuration data in
294 1.1 fvdl * this state, so punt.
295 1.1 fvdl */
296 1.1 fvdl printf("%s: unable to wake up from power state D3\n",
297 1.1 fvdl sc->sc_dev.dv_xname);
298 1.1 fvdl return;
299 1.1 fvdl }
300 1.15.2.5 nathanw if (reg != PCI_PMCSR_STATE_D0) {
301 1.1 fvdl printf("%s: waking up from power state D%d\n",
302 1.11 mycroft sc->sc_dev.dv_xname, reg);
303 1.11 mycroft pci_conf_write(pc, pa->pa_tag, pmreg + 4, 0);
304 1.1 fvdl }
305 1.1 fvdl }
306 1.1 fvdl
307 1.15.2.5 nathanw sc->enabled = 1;
308 1.15.2.5 nathanw
309 1.1 fvdl /* Map and establish the interrupt. */
310 1.15 sommerfe if (pci_intr_map(pa, &ih)) {
311 1.1 fvdl printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
312 1.1 fvdl return;
313 1.1 fvdl }
314 1.14 fvdl
315 1.1 fvdl intrstr = pci_intr_string(pc, ih);
316 1.1 fvdl sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ex_intr, sc);
317 1.1 fvdl if (sc->sc_ih == NULL) {
318 1.1 fvdl printf("%s: couldn't establish interrupt",
319 1.1 fvdl sc->sc_dev.dv_xname);
320 1.1 fvdl if (intrstr != NULL)
321 1.1 fvdl printf(" at %s", intrstr);
322 1.1 fvdl printf("\n");
323 1.1 fvdl return;
324 1.1 fvdl }
325 1.1 fvdl printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
326 1.1 fvdl
327 1.1 fvdl ex_config(sc);
328 1.15.2.2 nathanw
329 1.15.2.2 nathanw if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
330 1.15.2.2 nathanw bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
331 1.15.2.2 nathanw PCI_INTRACK);
332 1.15.2.5 nathanw
333 1.15.2.5 nathanw if (sc->disable != NULL)
334 1.15.2.5 nathanw ex_disable(sc);
335 1.14 fvdl }
336 1.14 fvdl
337 1.14 fvdl void
338 1.14 fvdl ex_pci_intr_ack(sc)
339 1.14 fvdl struct ex_softc *sc;
340 1.14 fvdl {
341 1.14 fvdl struct ex_pci_softc *psc = (struct ex_pci_softc *)sc;
342 1.14 fvdl
343 1.15.2.2 nathanw bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
344 1.14 fvdl PCI_INTRACK);
345 1.15.2.5 nathanw }
346 1.15.2.5 nathanw
347 1.15.2.5 nathanw void
348 1.15.2.5 nathanw ex_pci_confreg_restore(psc)
349 1.15.2.5 nathanw struct ex_pci_softc *psc;
350 1.15.2.5 nathanw {
351 1.15.2.5 nathanw struct ex_softc *sc = (void *) psc;
352 1.15.2.5 nathanw pcireg_t reg;
353 1.15.2.5 nathanw
354 1.15.2.5 nathanw reg = pci_conf_read(psc->psc_pc, psc->psc_tag, PCI_COMMAND_STATUS_REG);
355 1.15.2.5 nathanw
356 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag,
357 1.15.2.5 nathanw PCI_COMMAND_STATUS_REG,
358 1.15.2.5 nathanw (reg & 0xffff0000) |
359 1.15.2.5 nathanw (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff));
360 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG,
361 1.15.2.5 nathanw psc->psc_regs[PCI_BHLC_REG>>2]);
362 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_CBIO,
363 1.15.2.5 nathanw psc->psc_regs[PCI_CBIO>>2]);
364 1.15.2.5 nathanw if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
365 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_FUNCMEM,
366 1.15.2.5 nathanw psc->psc_regs[PCI_FUNCMEM>>2]);
367 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_INTERRUPT_REG,
368 1.15.2.5 nathanw psc->psc_regs[PCI_INTERRUPT_REG>>2]);
369 1.15.2.5 nathanw }
370 1.15.2.5 nathanw
371 1.15.2.5 nathanw int
372 1.15.2.5 nathanw ex_pci_enable(sc)
373 1.15.2.5 nathanw struct ex_softc *sc;
374 1.15.2.5 nathanw {
375 1.15.2.5 nathanw struct ex_pci_softc *psc = (void *) sc;
376 1.15.2.5 nathanw
377 1.15.2.5 nathanw #if 0
378 1.15.2.5 nathanw printf("%s: going to power state D0\n", sc->sc_dev.dv_xname);
379 1.15.2.5 nathanw #endif
380 1.15.2.5 nathanw
381 1.15.2.5 nathanw /* Bring the device into D0 power state. */
382 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag,
383 1.15.2.5 nathanw psc->psc_pwrmgmt_csr_reg, psc->psc_pwrmgmt_csr);
384 1.15.2.5 nathanw
385 1.15.2.5 nathanw /* Now restore the configuration registers. */
386 1.15.2.5 nathanw ex_pci_confreg_restore(psc);
387 1.15.2.5 nathanw
388 1.15.2.5 nathanw return (0);
389 1.15.2.5 nathanw }
390 1.15.2.5 nathanw
391 1.15.2.5 nathanw void
392 1.15.2.5 nathanw ex_pci_disable(sc)
393 1.15.2.5 nathanw struct ex_softc *sc;
394 1.15.2.5 nathanw {
395 1.15.2.5 nathanw struct ex_pci_softc *psc = (void *) sc;
396 1.15.2.5 nathanw
397 1.15.2.5 nathanw #if 0
398 1.15.2.5 nathanw printf("%s: going to power state D3\n", sc->sc_dev.dv_xname);
399 1.15.2.5 nathanw #endif
400 1.15.2.5 nathanw
401 1.15.2.5 nathanw /* Put the device into D3 state. */
402 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag,
403 1.15.2.5 nathanw psc->psc_pwrmgmt_csr_reg, (psc->psc_pwrmgmt_csr &
404 1.15.2.5 nathanw ~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_STATE_D3);
405 1.1 fvdl }
406