if_ex_pci.c revision 1.15.2.7 1 1.15.2.7 thorpej /* $NetBSD: if_ex_pci.c,v 1.15.2.7 2002/12/29 20:49:22 thorpej Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.3 thorpej * by Frank van der Linden; Jason R. Thorpe of the Numerical Aerospace
9 1.3 thorpej * Simulation Facility, NASA Ames Research Center.
10 1.1 fvdl *
11 1.1 fvdl * Redistribution and use in source and binary forms, with or without
12 1.1 fvdl * modification, are permitted provided that the following conditions
13 1.1 fvdl * are met:
14 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
15 1.1 fvdl * notice, this list of conditions and the following disclaimer.
16 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
18 1.1 fvdl * documentation and/or other materials provided with the distribution.
19 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
20 1.1 fvdl * must display the following acknowledgement:
21 1.1 fvdl * This product includes software developed by the NetBSD
22 1.1 fvdl * Foundation, Inc. and its contributors.
23 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 fvdl * contributors may be used to endorse or promote products derived
25 1.1 fvdl * from this software without specific prior written permission.
26 1.1 fvdl *
27 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
38 1.1 fvdl */
39 1.15.2.3 nathanw
40 1.15.2.3 nathanw #include <sys/cdefs.h>
41 1.15.2.7 thorpej __KERNEL_RCSID(0, "$NetBSD: if_ex_pci.c,v 1.15.2.7 2002/12/29 20:49:22 thorpej Exp $");
42 1.1 fvdl
43 1.1 fvdl #include <sys/param.h>
44 1.1 fvdl #include <sys/systm.h>
45 1.1 fvdl #include <sys/mbuf.h>
46 1.1 fvdl #include <sys/socket.h>
47 1.1 fvdl #include <sys/ioctl.h>
48 1.1 fvdl #include <sys/errno.h>
49 1.1 fvdl #include <sys/syslog.h>
50 1.1 fvdl #include <sys/select.h>
51 1.1 fvdl #include <sys/device.h>
52 1.1 fvdl
53 1.1 fvdl #include <net/if.h>
54 1.1 fvdl #include <net/if_dl.h>
55 1.1 fvdl #include <net/if_ether.h>
56 1.1 fvdl #include <net/if_media.h>
57 1.1 fvdl
58 1.1 fvdl #include <machine/cpu.h>
59 1.1 fvdl #include <machine/bus.h>
60 1.1 fvdl #include <machine/intr.h>
61 1.1 fvdl
62 1.1 fvdl #include <dev/mii/miivar.h>
63 1.1 fvdl #include <dev/mii/mii.h>
64 1.1 fvdl
65 1.1 fvdl #include <dev/ic/elink3var.h>
66 1.1 fvdl #include <dev/ic/elink3reg.h>
67 1.1 fvdl #include <dev/ic/elinkxlreg.h>
68 1.1 fvdl #include <dev/ic/elinkxlvar.h>
69 1.1 fvdl
70 1.1 fvdl #include <dev/pci/pcivar.h>
71 1.1 fvdl #include <dev/pci/pcireg.h>
72 1.1 fvdl #include <dev/pci/pcidevs.h>
73 1.1 fvdl
74 1.14 fvdl struct ex_pci_softc {
75 1.14 fvdl struct ex_softc sc_ex;
76 1.15.2.2 nathanw
77 1.15.2.2 nathanw /* PCI function status space. 556,556B requests it. */
78 1.15.2.2 nathanw bus_space_tag_t sc_funct;
79 1.15.2.2 nathanw bus_space_handle_t sc_funch;
80 1.15.2.2 nathanw
81 1.15.2.5 nathanw pci_chipset_tag_t psc_pc; /* pci chipset tag */
82 1.15.2.5 nathanw pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */
83 1.15.2.5 nathanw pcitag_t psc_tag; /* pci device tag */
84 1.15.2.5 nathanw
85 1.15.2.5 nathanw int psc_pwrmgmt_csr_reg; /* ACPI power management register */
86 1.15.2.5 nathanw pcireg_t psc_pwrmgmt_csr; /* ...and the contents at D0 */
87 1.14 fvdl };
88 1.14 fvdl
89 1.1 fvdl /*
90 1.1 fvdl * PCI constants.
91 1.1 fvdl * XXX These should be in a common file!
92 1.1 fvdl */
93 1.1 fvdl #define PCI_CONN 0x48 /* Connector type */
94 1.1 fvdl #define PCI_CBIO 0x10 /* Configuration Base IO Address */
95 1.1 fvdl #define PCI_POWERCTL 0xe0
96 1.14 fvdl #define PCI_FUNCMEM 0x18
97 1.14 fvdl
98 1.15.2.2 nathanw #define PCI_INTR 4
99 1.14 fvdl #define PCI_INTRACK 0x00008000
100 1.1 fvdl
101 1.1 fvdl int ex_pci_match __P((struct device *, struct cfdata *, void *));
102 1.1 fvdl void ex_pci_attach __P((struct device *, struct device *, void *));
103 1.14 fvdl void ex_pci_intr_ack __P((struct ex_softc *));
104 1.1 fvdl
105 1.15.2.5 nathanw int ex_pci_enable __P((struct ex_softc *));
106 1.15.2.5 nathanw void ex_pci_disable __P((struct ex_softc *));
107 1.15.2.5 nathanw
108 1.15.2.5 nathanw void ex_pci_confreg_restore __P((struct ex_pci_softc *));
109 1.15.2.5 nathanw
110 1.15.2.6 nathanw CFATTACH_DECL(ex_pci, sizeof(struct ex_pci_softc),
111 1.15.2.6 nathanw ex_pci_match, ex_pci_attach, NULL, NULL);
112 1.1 fvdl
113 1.3 thorpej const struct ex_pci_product {
114 1.3 thorpej u_int32_t epp_prodid; /* PCI product ID */
115 1.3 thorpej int epp_flags; /* initial softc flags */
116 1.3 thorpej const char *epp_name; /* device name */
117 1.3 thorpej } ex_pci_products[] = {
118 1.3 thorpej { PCI_PRODUCT_3COM_3C900TPO, 0,
119 1.4 thorpej "3c900-TPO Ethernet" },
120 1.3 thorpej { PCI_PRODUCT_3COM_3C900COMBO, 0,
121 1.4 thorpej "3c900-COMBO Ethernet" },
122 1.3 thorpej
123 1.3 thorpej { PCI_PRODUCT_3COM_3C905TX, EX_CONF_MII,
124 1.4 thorpej "3c905-TX 10/100 Ethernet" },
125 1.3 thorpej { PCI_PRODUCT_3COM_3C905T4, EX_CONF_MII,
126 1.4 thorpej "3c905-T4 10/100 Ethernet" },
127 1.3 thorpej
128 1.3 thorpej { PCI_PRODUCT_3COM_3C900BTPO, EX_CONF_90XB,
129 1.4 thorpej "3c900B-TPO Ethernet" },
130 1.3 thorpej { PCI_PRODUCT_3COM_3C900BCOMBO, EX_CONF_90XB,
131 1.4 thorpej "3c900B-COMBO Ethernet" },
132 1.6 fvdl { PCI_PRODUCT_3COM_3C900BTPC, EX_CONF_90XB,
133 1.6 fvdl "3c900B-TPC Ethernet" },
134 1.3 thorpej
135 1.3 thorpej { PCI_PRODUCT_3COM_3C905BTX, EX_CONF_90XB|EX_CONF_MII|EX_CONF_INTPHY,
136 1.4 thorpej "3c905B-TX 10/100 Ethernet" },
137 1.3 thorpej { PCI_PRODUCT_3COM_3C905BT4, EX_CONF_90XB|EX_CONF_MII,
138 1.4 thorpej "3c905B-T4 10/100 Ethernet" },
139 1.9 drochner { PCI_PRODUCT_3COM_3C905BCOMBO, EX_CONF_90XB/*|EX_CONF_MII|EX_CONF_INTPHY*/,
140 1.9 drochner "3c905B-COMBO 10/100 Ethernet" },
141 1.8 fvdl { PCI_PRODUCT_3COM_3C905BFX, EX_CONF_90XB,
142 1.4 thorpej "3c905B-FX 10/100 Ethernet" },
143 1.4 thorpej
144 1.4 thorpej /* XXX Internal PHY? */
145 1.10 mycroft { PCI_PRODUCT_3COM_3C980SRV, EX_CONF_90XB,
146 1.4 thorpej "3c980 Server Adapter 10/100 Ethernet" },
147 1.15.2.4 nathanw { PCI_PRODUCT_3COM_3C980CTXM, EX_CONF_90XB|EX_CONF_MII,
148 1.12 thorpej "3c980C-TXM 10/100 Ethernet" },
149 1.12 thorpej
150 1.7 ross { PCI_PRODUCT_3COM_3C905CTX, EX_CONF_90XB|EX_CONF_MII,
151 1.7 ross "3c905C-TX 10/100 Ethernet with mngmt" },
152 1.13 billc
153 1.13 billc { PCI_PRODUCT_3COM_3C450TX, EX_CONF_90XB,
154 1.13 billc "3c450-TX 10/100 Ethernet" },
155 1.13 billc
156 1.13 billc { PCI_PRODUCT_3COM_3CSOHO100TX, EX_CONF_90XB,
157 1.13 billc "3cSOHO100-TX 10/100 Ethernet" },
158 1.3 thorpej
159 1.14 fvdl { PCI_PRODUCT_3COM_3C555,
160 1.14 fvdl EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
161 1.14 fvdl EX_CONF_EEPROM_8BIT,
162 1.14 fvdl "3c555 MiniPCI 10/100 Ethernet" },
163 1.14 fvdl
164 1.14 fvdl { PCI_PRODUCT_3COM_3C556,
165 1.14 fvdl EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
166 1.14 fvdl EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
167 1.14 fvdl EX_CONF_PHY_POWER | EX_CONF_EEPROM_8BIT,
168 1.14 fvdl "3c556 MiniPCI 10/100 Ethernet" },
169 1.14 fvdl
170 1.14 fvdl { PCI_PRODUCT_3COM_3C556B,
171 1.14 fvdl EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
172 1.14 fvdl EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
173 1.14 fvdl EX_CONF_PHY_POWER,
174 1.14 fvdl "3c556B MiniPCI 10/100 Ethernet" },
175 1.14 fvdl
176 1.3 thorpej { 0, 0,
177 1.3 thorpej NULL },
178 1.3 thorpej };
179 1.3 thorpej
180 1.3 thorpej const struct ex_pci_product *ex_pci_lookup
181 1.3 thorpej __P((const struct pci_attach_args *));
182 1.3 thorpej
183 1.3 thorpej const struct ex_pci_product *
184 1.3 thorpej ex_pci_lookup(pa)
185 1.3 thorpej const struct pci_attach_args *pa;
186 1.3 thorpej {
187 1.3 thorpej const struct ex_pci_product *epp;
188 1.3 thorpej
189 1.3 thorpej if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3COM)
190 1.3 thorpej return (NULL);
191 1.3 thorpej
192 1.3 thorpej for (epp = ex_pci_products; epp->epp_name != NULL; epp++)
193 1.3 thorpej if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid)
194 1.3 thorpej return (epp);
195 1.3 thorpej return (NULL);
196 1.3 thorpej }
197 1.3 thorpej
198 1.1 fvdl int
199 1.1 fvdl ex_pci_match(parent, match, aux)
200 1.1 fvdl struct device *parent;
201 1.1 fvdl struct cfdata *match;
202 1.1 fvdl void *aux;
203 1.1 fvdl {
204 1.1 fvdl struct pci_attach_args *pa = (struct pci_attach_args *) aux;
205 1.1 fvdl
206 1.3 thorpej if (ex_pci_lookup(pa) != NULL)
207 1.3 thorpej return (2); /* beat ep_pci */
208 1.1 fvdl
209 1.3 thorpej return (0);
210 1.1 fvdl }
211 1.1 fvdl
212 1.1 fvdl void
213 1.1 fvdl ex_pci_attach(parent, self, aux)
214 1.1 fvdl struct device *parent, *self;
215 1.1 fvdl void *aux;
216 1.1 fvdl {
217 1.1 fvdl struct ex_softc *sc = (void *)self;
218 1.14 fvdl struct ex_pci_softc *psc = (void *)self;
219 1.1 fvdl struct pci_attach_args *pa = aux;
220 1.1 fvdl pci_chipset_tag_t pc = pa->pa_pc;
221 1.1 fvdl pci_intr_handle_t ih;
222 1.3 thorpej const struct ex_pci_product *epp;
223 1.1 fvdl const char *intrstr = NULL;
224 1.11 mycroft int rev, pmreg;
225 1.11 mycroft pcireg_t reg;
226 1.1 fvdl
227 1.1 fvdl if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
228 1.1 fvdl &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
229 1.1 fvdl printf(": can't map i/o space\n");
230 1.1 fvdl return;
231 1.1 fvdl }
232 1.1 fvdl
233 1.3 thorpej epp = ex_pci_lookup(pa);
234 1.3 thorpej if (epp == NULL) {
235 1.3 thorpej printf("\n");
236 1.3 thorpej panic("ex_pci_attach: impossible");
237 1.1 fvdl }
238 1.1 fvdl
239 1.9 drochner rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG));
240 1.9 drochner printf(": 3Com %s (rev. 0x%x)\n", epp->epp_name, rev);
241 1.1 fvdl
242 1.3 thorpej sc->sc_dmat = pa->pa_dmat;
243 1.3 thorpej
244 1.3 thorpej sc->ex_bustype = EX_BUS_PCI;
245 1.3 thorpej sc->ex_conf = epp->epp_flags;
246 1.3 thorpej
247 1.1 fvdl /* Enable the card. */
248 1.1 fvdl pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
249 1.1 fvdl pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
250 1.1 fvdl PCI_COMMAND_MASTER_ENABLE);
251 1.1 fvdl
252 1.15.2.5 nathanw psc->psc_pc = pc;
253 1.15.2.5 nathanw psc->psc_tag = pa->pa_tag;
254 1.15.2.5 nathanw psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] =
255 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
256 1.15.2.5 nathanw psc->psc_regs[PCI_BHLC_REG>>2] =
257 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
258 1.15.2.5 nathanw psc->psc_regs[PCI_CBIO>>2] =
259 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_CBIO);
260 1.15.2.5 nathanw
261 1.15.2.2 nathanw if (sc->ex_conf & EX_CONF_PCI_FUNCREG) {
262 1.15.2.2 nathanw /* Map PCI function status window. */
263 1.15.2.2 nathanw if (pci_mapreg_map(pa, PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0,
264 1.15.2.2 nathanw &psc->sc_funct, &psc->sc_funch, NULL, NULL)) {
265 1.15.2.2 nathanw printf("%s: unable to map function status window\n",
266 1.15.2.2 nathanw sc->sc_dev.dv_xname);
267 1.15.2.2 nathanw return;
268 1.15.2.2 nathanw }
269 1.15.2.2 nathanw sc->intr_ack = ex_pci_intr_ack;
270 1.15.2.5 nathanw
271 1.15.2.5 nathanw psc->psc_regs[PCI_FUNCMEM>>2] =
272 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM);
273 1.15.2.2 nathanw }
274 1.15.2.5 nathanw
275 1.15.2.5 nathanw psc->psc_regs[PCI_INTERRUPT_REG>>2] =
276 1.15.2.5 nathanw pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
277 1.15.2.5 nathanw
278 1.1 fvdl /* Get it out of power save mode if needed (BIOS bugs) */
279 1.11 mycroft if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
280 1.15.2.5 nathanw sc->enable = ex_pci_enable;
281 1.15.2.5 nathanw sc->disable = ex_pci_disable;
282 1.15.2.5 nathanw
283 1.15.2.7 thorpej psc->psc_pwrmgmt_csr_reg = pmreg + PCI_PMCSR;
284 1.15.2.7 thorpej reg = pci_conf_read(pc, pa->pa_tag, psc->psc_pwrmgmt_csr_reg);
285 1.15.2.5 nathanw
286 1.15.2.5 nathanw psc->psc_pwrmgmt_csr = (reg & ~PCI_PMCSR_STATE_MASK) |
287 1.15.2.5 nathanw PCI_PMCSR_STATE_D0;
288 1.15.2.5 nathanw
289 1.15.2.7 thorpej switch (reg & PCI_PMCSR_STATE_MASK) {
290 1.15.2.7 thorpej case PCI_PMCSR_STATE_D3:
291 1.1 fvdl /*
292 1.1 fvdl * The card has lost all configuration data in
293 1.1 fvdl * this state, so punt.
294 1.1 fvdl */
295 1.1 fvdl printf("%s: unable to wake up from power state D3\n",
296 1.1 fvdl sc->sc_dev.dv_xname);
297 1.1 fvdl return;
298 1.15.2.7 thorpej case PCI_PMCSR_STATE_D1:
299 1.15.2.7 thorpej case PCI_PMCSR_STATE_D2:
300 1.1 fvdl printf("%s: waking up from power state D%d\n",
301 1.11 mycroft sc->sc_dev.dv_xname, reg);
302 1.15.2.7 thorpej pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
303 1.15.2.7 thorpej (reg & ~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_STATE_D0);
304 1.15.2.7 thorpej break;
305 1.1 fvdl }
306 1.1 fvdl }
307 1.1 fvdl
308 1.15.2.5 nathanw sc->enabled = 1;
309 1.15.2.5 nathanw
310 1.1 fvdl /* Map and establish the interrupt. */
311 1.15 sommerfe if (pci_intr_map(pa, &ih)) {
312 1.1 fvdl printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
313 1.1 fvdl return;
314 1.1 fvdl }
315 1.14 fvdl
316 1.1 fvdl intrstr = pci_intr_string(pc, ih);
317 1.1 fvdl sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ex_intr, sc);
318 1.1 fvdl if (sc->sc_ih == NULL) {
319 1.1 fvdl printf("%s: couldn't establish interrupt",
320 1.1 fvdl sc->sc_dev.dv_xname);
321 1.1 fvdl if (intrstr != NULL)
322 1.1 fvdl printf(" at %s", intrstr);
323 1.1 fvdl printf("\n");
324 1.1 fvdl return;
325 1.1 fvdl }
326 1.1 fvdl printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
327 1.1 fvdl
328 1.1 fvdl ex_config(sc);
329 1.15.2.2 nathanw
330 1.15.2.2 nathanw if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
331 1.15.2.2 nathanw bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
332 1.15.2.2 nathanw PCI_INTRACK);
333 1.15.2.5 nathanw
334 1.15.2.5 nathanw if (sc->disable != NULL)
335 1.15.2.5 nathanw ex_disable(sc);
336 1.14 fvdl }
337 1.14 fvdl
338 1.14 fvdl void
339 1.14 fvdl ex_pci_intr_ack(sc)
340 1.14 fvdl struct ex_softc *sc;
341 1.14 fvdl {
342 1.14 fvdl struct ex_pci_softc *psc = (struct ex_pci_softc *)sc;
343 1.14 fvdl
344 1.15.2.2 nathanw bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
345 1.14 fvdl PCI_INTRACK);
346 1.15.2.5 nathanw }
347 1.15.2.5 nathanw
348 1.15.2.5 nathanw void
349 1.15.2.5 nathanw ex_pci_confreg_restore(psc)
350 1.15.2.5 nathanw struct ex_pci_softc *psc;
351 1.15.2.5 nathanw {
352 1.15.2.5 nathanw struct ex_softc *sc = (void *) psc;
353 1.15.2.5 nathanw pcireg_t reg;
354 1.15.2.5 nathanw
355 1.15.2.5 nathanw reg = pci_conf_read(psc->psc_pc, psc->psc_tag, PCI_COMMAND_STATUS_REG);
356 1.15.2.5 nathanw
357 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag,
358 1.15.2.5 nathanw PCI_COMMAND_STATUS_REG,
359 1.15.2.5 nathanw (reg & 0xffff0000) |
360 1.15.2.5 nathanw (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff));
361 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG,
362 1.15.2.5 nathanw psc->psc_regs[PCI_BHLC_REG>>2]);
363 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_CBIO,
364 1.15.2.5 nathanw psc->psc_regs[PCI_CBIO>>2]);
365 1.15.2.5 nathanw if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
366 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_FUNCMEM,
367 1.15.2.5 nathanw psc->psc_regs[PCI_FUNCMEM>>2]);
368 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_INTERRUPT_REG,
369 1.15.2.5 nathanw psc->psc_regs[PCI_INTERRUPT_REG>>2]);
370 1.15.2.5 nathanw }
371 1.15.2.5 nathanw
372 1.15.2.5 nathanw int
373 1.15.2.5 nathanw ex_pci_enable(sc)
374 1.15.2.5 nathanw struct ex_softc *sc;
375 1.15.2.5 nathanw {
376 1.15.2.5 nathanw struct ex_pci_softc *psc = (void *) sc;
377 1.15.2.5 nathanw
378 1.15.2.5 nathanw #if 0
379 1.15.2.5 nathanw printf("%s: going to power state D0\n", sc->sc_dev.dv_xname);
380 1.15.2.5 nathanw #endif
381 1.15.2.5 nathanw
382 1.15.2.5 nathanw /* Bring the device into D0 power state. */
383 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag,
384 1.15.2.5 nathanw psc->psc_pwrmgmt_csr_reg, psc->psc_pwrmgmt_csr);
385 1.15.2.5 nathanw
386 1.15.2.5 nathanw /* Now restore the configuration registers. */
387 1.15.2.5 nathanw ex_pci_confreg_restore(psc);
388 1.15.2.5 nathanw
389 1.15.2.5 nathanw return (0);
390 1.15.2.5 nathanw }
391 1.15.2.5 nathanw
392 1.15.2.5 nathanw void
393 1.15.2.5 nathanw ex_pci_disable(sc)
394 1.15.2.5 nathanw struct ex_softc *sc;
395 1.15.2.5 nathanw {
396 1.15.2.5 nathanw struct ex_pci_softc *psc = (void *) sc;
397 1.15.2.5 nathanw
398 1.15.2.5 nathanw #if 0
399 1.15.2.5 nathanw printf("%s: going to power state D3\n", sc->sc_dev.dv_xname);
400 1.15.2.5 nathanw #endif
401 1.15.2.5 nathanw
402 1.15.2.5 nathanw /* Put the device into D3 state. */
403 1.15.2.5 nathanw pci_conf_write(psc->psc_pc, psc->psc_tag,
404 1.15.2.5 nathanw psc->psc_pwrmgmt_csr_reg, (psc->psc_pwrmgmt_csr &
405 1.15.2.5 nathanw ~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_STATE_D3);
406 1.1 fvdl }
407