if_ex_pci.c revision 1.15.2.6
1 /* $NetBSD: if_ex_pci.c,v 1.15.2.6 2002/10/18 02:43:04 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden; Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: if_ex_pci.c,v 1.15.2.6 2002/10/18 02:43:04 nathanw Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/mbuf.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/syslog.h> 50 #include <sys/select.h> 51 #include <sys/device.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_ether.h> 56 #include <net/if_media.h> 57 58 #include <machine/cpu.h> 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/mii/miivar.h> 63 #include <dev/mii/mii.h> 64 65 #include <dev/ic/elink3var.h> 66 #include <dev/ic/elink3reg.h> 67 #include <dev/ic/elinkxlreg.h> 68 #include <dev/ic/elinkxlvar.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 struct ex_pci_softc { 75 struct ex_softc sc_ex; 76 77 /* PCI function status space. 556,556B requests it. */ 78 bus_space_tag_t sc_funct; 79 bus_space_handle_t sc_funch; 80 81 pci_chipset_tag_t psc_pc; /* pci chipset tag */ 82 pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */ 83 pcitag_t psc_tag; /* pci device tag */ 84 85 int psc_pwrmgmt_csr_reg; /* ACPI power management register */ 86 pcireg_t psc_pwrmgmt_csr; /* ...and the contents at D0 */ 87 }; 88 89 /* 90 * PCI constants. 91 * XXX These should be in a common file! 92 */ 93 #define PCI_CONN 0x48 /* Connector type */ 94 #define PCI_CBIO 0x10 /* Configuration Base IO Address */ 95 #define PCI_POWERCTL 0xe0 96 #define PCI_FUNCMEM 0x18 97 98 #define PCI_INTR 4 99 #define PCI_INTRACK 0x00008000 100 101 int ex_pci_match __P((struct device *, struct cfdata *, void *)); 102 void ex_pci_attach __P((struct device *, struct device *, void *)); 103 void ex_pci_intr_ack __P((struct ex_softc *)); 104 105 int ex_pci_enable __P((struct ex_softc *)); 106 void ex_pci_disable __P((struct ex_softc *)); 107 108 void ex_pci_confreg_restore __P((struct ex_pci_softc *)); 109 110 CFATTACH_DECL(ex_pci, sizeof(struct ex_pci_softc), 111 ex_pci_match, ex_pci_attach, NULL, NULL); 112 113 const struct ex_pci_product { 114 u_int32_t epp_prodid; /* PCI product ID */ 115 int epp_flags; /* initial softc flags */ 116 const char *epp_name; /* device name */ 117 } ex_pci_products[] = { 118 { PCI_PRODUCT_3COM_3C900TPO, 0, 119 "3c900-TPO Ethernet" }, 120 { PCI_PRODUCT_3COM_3C900COMBO, 0, 121 "3c900-COMBO Ethernet" }, 122 123 { PCI_PRODUCT_3COM_3C905TX, EX_CONF_MII, 124 "3c905-TX 10/100 Ethernet" }, 125 { PCI_PRODUCT_3COM_3C905T4, EX_CONF_MII, 126 "3c905-T4 10/100 Ethernet" }, 127 128 { PCI_PRODUCT_3COM_3C900BTPO, EX_CONF_90XB, 129 "3c900B-TPO Ethernet" }, 130 { PCI_PRODUCT_3COM_3C900BCOMBO, EX_CONF_90XB, 131 "3c900B-COMBO Ethernet" }, 132 { PCI_PRODUCT_3COM_3C900BTPC, EX_CONF_90XB, 133 "3c900B-TPC Ethernet" }, 134 135 { PCI_PRODUCT_3COM_3C905BTX, EX_CONF_90XB|EX_CONF_MII|EX_CONF_INTPHY, 136 "3c905B-TX 10/100 Ethernet" }, 137 { PCI_PRODUCT_3COM_3C905BT4, EX_CONF_90XB|EX_CONF_MII, 138 "3c905B-T4 10/100 Ethernet" }, 139 { PCI_PRODUCT_3COM_3C905BCOMBO, EX_CONF_90XB/*|EX_CONF_MII|EX_CONF_INTPHY*/, 140 "3c905B-COMBO 10/100 Ethernet" }, 141 { PCI_PRODUCT_3COM_3C905BFX, EX_CONF_90XB, 142 "3c905B-FX 10/100 Ethernet" }, 143 144 /* XXX Internal PHY? */ 145 { PCI_PRODUCT_3COM_3C980SRV, EX_CONF_90XB, 146 "3c980 Server Adapter 10/100 Ethernet" }, 147 { PCI_PRODUCT_3COM_3C980CTXM, EX_CONF_90XB|EX_CONF_MII, 148 "3c980C-TXM 10/100 Ethernet" }, 149 150 { PCI_PRODUCT_3COM_3C905CTX, EX_CONF_90XB|EX_CONF_MII, 151 "3c905C-TX 10/100 Ethernet with mngmt" }, 152 153 { PCI_PRODUCT_3COM_3C450TX, EX_CONF_90XB, 154 "3c450-TX 10/100 Ethernet" }, 155 156 { PCI_PRODUCT_3COM_3CSOHO100TX, EX_CONF_90XB, 157 "3cSOHO100-TX 10/100 Ethernet" }, 158 159 { PCI_PRODUCT_3COM_3C555, 160 EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF | 161 EX_CONF_EEPROM_8BIT, 162 "3c555 MiniPCI 10/100 Ethernet" }, 163 164 { PCI_PRODUCT_3COM_3C556, 165 EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF | 166 EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY | 167 EX_CONF_PHY_POWER | EX_CONF_EEPROM_8BIT, 168 "3c556 MiniPCI 10/100 Ethernet" }, 169 170 { PCI_PRODUCT_3COM_3C556B, 171 EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF | 172 EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY | 173 EX_CONF_PHY_POWER, 174 "3c556B MiniPCI 10/100 Ethernet" }, 175 176 { 0, 0, 177 NULL }, 178 }; 179 180 const struct ex_pci_product *ex_pci_lookup 181 __P((const struct pci_attach_args *)); 182 183 const struct ex_pci_product * 184 ex_pci_lookup(pa) 185 const struct pci_attach_args *pa; 186 { 187 const struct ex_pci_product *epp; 188 189 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3COM) 190 return (NULL); 191 192 for (epp = ex_pci_products; epp->epp_name != NULL; epp++) 193 if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid) 194 return (epp); 195 return (NULL); 196 } 197 198 int 199 ex_pci_match(parent, match, aux) 200 struct device *parent; 201 struct cfdata *match; 202 void *aux; 203 { 204 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 205 206 if (ex_pci_lookup(pa) != NULL) 207 return (2); /* beat ep_pci */ 208 209 return (0); 210 } 211 212 void 213 ex_pci_attach(parent, self, aux) 214 struct device *parent, *self; 215 void *aux; 216 { 217 struct ex_softc *sc = (void *)self; 218 struct ex_pci_softc *psc = (void *)self; 219 struct pci_attach_args *pa = aux; 220 pci_chipset_tag_t pc = pa->pa_pc; 221 pci_intr_handle_t ih; 222 const struct ex_pci_product *epp; 223 const char *intrstr = NULL; 224 int rev, pmreg; 225 pcireg_t reg; 226 227 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 228 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 229 printf(": can't map i/o space\n"); 230 return; 231 } 232 233 epp = ex_pci_lookup(pa); 234 if (epp == NULL) { 235 printf("\n"); 236 panic("ex_pci_attach: impossible"); 237 } 238 239 rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG)); 240 printf(": 3Com %s (rev. 0x%x)\n", epp->epp_name, rev); 241 242 sc->sc_dmat = pa->pa_dmat; 243 244 sc->ex_bustype = EX_BUS_PCI; 245 sc->ex_conf = epp->epp_flags; 246 247 /* Enable the card. */ 248 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 249 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 250 PCI_COMMAND_MASTER_ENABLE); 251 252 psc->psc_pc = pc; 253 psc->psc_tag = pa->pa_tag; 254 psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] = 255 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 256 psc->psc_regs[PCI_BHLC_REG>>2] = 257 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG); 258 psc->psc_regs[PCI_CBIO>>2] = 259 pci_conf_read(pc, pa->pa_tag, PCI_CBIO); 260 261 if (sc->ex_conf & EX_CONF_PCI_FUNCREG) { 262 /* Map PCI function status window. */ 263 if (pci_mapreg_map(pa, PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0, 264 &psc->sc_funct, &psc->sc_funch, NULL, NULL)) { 265 printf("%s: unable to map function status window\n", 266 sc->sc_dev.dv_xname); 267 return; 268 } 269 sc->intr_ack = ex_pci_intr_ack; 270 271 psc->psc_regs[PCI_FUNCMEM>>2] = 272 pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM); 273 } 274 275 psc->psc_regs[PCI_INTERRUPT_REG>>2] = 276 pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG); 277 278 /* Get it out of power save mode if needed (BIOS bugs) */ 279 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 280 sc->enable = ex_pci_enable; 281 sc->disable = ex_pci_disable; 282 283 psc->psc_pwrmgmt_csr_reg = pmreg + 4; 284 reg = pci_conf_read(pc, pa->pa_tag, 285 psc->psc_pwrmgmt_csr_reg) & 0x3; 286 287 psc->psc_pwrmgmt_csr = (reg & ~PCI_PMCSR_STATE_MASK) | 288 PCI_PMCSR_STATE_D0; 289 290 if (reg == PCI_PMCSR_STATE_D3) { 291 /* 292 * The card has lost all configuration data in 293 * this state, so punt. 294 */ 295 printf("%s: unable to wake up from power state D3\n", 296 sc->sc_dev.dv_xname); 297 return; 298 } 299 if (reg != PCI_PMCSR_STATE_D0) { 300 printf("%s: waking up from power state D%d\n", 301 sc->sc_dev.dv_xname, reg); 302 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 0); 303 } 304 } 305 306 sc->enabled = 1; 307 308 /* Map and establish the interrupt. */ 309 if (pci_intr_map(pa, &ih)) { 310 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 311 return; 312 } 313 314 intrstr = pci_intr_string(pc, ih); 315 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ex_intr, sc); 316 if (sc->sc_ih == NULL) { 317 printf("%s: couldn't establish interrupt", 318 sc->sc_dev.dv_xname); 319 if (intrstr != NULL) 320 printf(" at %s", intrstr); 321 printf("\n"); 322 return; 323 } 324 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 325 326 ex_config(sc); 327 328 if (sc->ex_conf & EX_CONF_PCI_FUNCREG) 329 bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR, 330 PCI_INTRACK); 331 332 if (sc->disable != NULL) 333 ex_disable(sc); 334 } 335 336 void 337 ex_pci_intr_ack(sc) 338 struct ex_softc *sc; 339 { 340 struct ex_pci_softc *psc = (struct ex_pci_softc *)sc; 341 342 bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR, 343 PCI_INTRACK); 344 } 345 346 void 347 ex_pci_confreg_restore(psc) 348 struct ex_pci_softc *psc; 349 { 350 struct ex_softc *sc = (void *) psc; 351 pcireg_t reg; 352 353 reg = pci_conf_read(psc->psc_pc, psc->psc_tag, PCI_COMMAND_STATUS_REG); 354 355 pci_conf_write(psc->psc_pc, psc->psc_tag, 356 PCI_COMMAND_STATUS_REG, 357 (reg & 0xffff0000) | 358 (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff)); 359 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG, 360 psc->psc_regs[PCI_BHLC_REG>>2]); 361 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_CBIO, 362 psc->psc_regs[PCI_CBIO>>2]); 363 if (sc->ex_conf & EX_CONF_PCI_FUNCREG) 364 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_FUNCMEM, 365 psc->psc_regs[PCI_FUNCMEM>>2]); 366 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_INTERRUPT_REG, 367 psc->psc_regs[PCI_INTERRUPT_REG>>2]); 368 } 369 370 int 371 ex_pci_enable(sc) 372 struct ex_softc *sc; 373 { 374 struct ex_pci_softc *psc = (void *) sc; 375 376 #if 0 377 printf("%s: going to power state D0\n", sc->sc_dev.dv_xname); 378 #endif 379 380 /* Bring the device into D0 power state. */ 381 pci_conf_write(psc->psc_pc, psc->psc_tag, 382 psc->psc_pwrmgmt_csr_reg, psc->psc_pwrmgmt_csr); 383 384 /* Now restore the configuration registers. */ 385 ex_pci_confreg_restore(psc); 386 387 return (0); 388 } 389 390 void 391 ex_pci_disable(sc) 392 struct ex_softc *sc; 393 { 394 struct ex_pci_softc *psc = (void *) sc; 395 396 #if 0 397 printf("%s: going to power state D3\n", sc->sc_dev.dv_xname); 398 #endif 399 400 /* Put the device into D3 state. */ 401 pci_conf_write(psc->psc_pc, psc->psc_tag, 402 psc->psc_pwrmgmt_csr_reg, (psc->psc_pwrmgmt_csr & 403 ~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_STATE_D3); 404 } 405
Indexes created Wed Sep 24 22:09:59 GMT 2025