if_ex_pci.c revision 1.17.2.4
1 /* $NetBSD: if_ex_pci.c,v 1.17.2.4 2002/09/06 08:45:15 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden; Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: if_ex_pci.c,v 1.17.2.4 2002/09/06 08:45:15 jdolecek Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/mbuf.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/syslog.h> 50 #include <sys/select.h> 51 #include <sys/device.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_ether.h> 56 #include <net/if_media.h> 57 58 #include <machine/cpu.h> 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/mii/miivar.h> 63 #include <dev/mii/mii.h> 64 65 #include <dev/ic/elink3var.h> 66 #include <dev/ic/elink3reg.h> 67 #include <dev/ic/elinkxlreg.h> 68 #include <dev/ic/elinkxlvar.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 struct ex_pci_softc { 75 struct ex_softc sc_ex; 76 77 /* PCI function status space. 556,556B requests it. */ 78 bus_space_tag_t sc_funct; 79 bus_space_handle_t sc_funch; 80 81 pci_chipset_tag_t psc_pc; /* pci chipset tag */ 82 pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */ 83 pcitag_t psc_tag; /* pci device tag */ 84 85 int psc_pwrmgmt_csr_reg; /* ACPI power management register */ 86 pcireg_t psc_pwrmgmt_csr; /* ...and the contents at D0 */ 87 }; 88 89 /* 90 * PCI constants. 91 * XXX These should be in a common file! 92 */ 93 #define PCI_CONN 0x48 /* Connector type */ 94 #define PCI_CBIO 0x10 /* Configuration Base IO Address */ 95 #define PCI_POWERCTL 0xe0 96 #define PCI_FUNCMEM 0x18 97 98 #define PCI_INTR 4 99 #define PCI_INTRACK 0x00008000 100 101 int ex_pci_match __P((struct device *, struct cfdata *, void *)); 102 void ex_pci_attach __P((struct device *, struct device *, void *)); 103 void ex_pci_intr_ack __P((struct ex_softc *)); 104 105 int ex_pci_enable __P((struct ex_softc *)); 106 void ex_pci_disable __P((struct ex_softc *)); 107 108 void ex_pci_confreg_restore __P((struct ex_pci_softc *)); 109 110 struct cfattach ex_pci_ca = { 111 sizeof(struct ex_pci_softc), ex_pci_match, ex_pci_attach 112 }; 113 114 const struct ex_pci_product { 115 u_int32_t epp_prodid; /* PCI product ID */ 116 int epp_flags; /* initial softc flags */ 117 const char *epp_name; /* device name */ 118 } ex_pci_products[] = { 119 { PCI_PRODUCT_3COM_3C900TPO, 0, 120 "3c900-TPO Ethernet" }, 121 { PCI_PRODUCT_3COM_3C900COMBO, 0, 122 "3c900-COMBO Ethernet" }, 123 124 { PCI_PRODUCT_3COM_3C905TX, EX_CONF_MII, 125 "3c905-TX 10/100 Ethernet" }, 126 { PCI_PRODUCT_3COM_3C905T4, EX_CONF_MII, 127 "3c905-T4 10/100 Ethernet" }, 128 129 { PCI_PRODUCT_3COM_3C900BTPO, EX_CONF_90XB, 130 "3c900B-TPO Ethernet" }, 131 { PCI_PRODUCT_3COM_3C900BCOMBO, EX_CONF_90XB, 132 "3c900B-COMBO Ethernet" }, 133 { PCI_PRODUCT_3COM_3C900BTPC, EX_CONF_90XB, 134 "3c900B-TPC Ethernet" }, 135 136 { PCI_PRODUCT_3COM_3C905BTX, EX_CONF_90XB|EX_CONF_MII|EX_CONF_INTPHY, 137 "3c905B-TX 10/100 Ethernet" }, 138 { PCI_PRODUCT_3COM_3C905BT4, EX_CONF_90XB|EX_CONF_MII, 139 "3c905B-T4 10/100 Ethernet" }, 140 { PCI_PRODUCT_3COM_3C905BCOMBO, EX_CONF_90XB/*|EX_CONF_MII|EX_CONF_INTPHY*/, 141 "3c905B-COMBO 10/100 Ethernet" }, 142 { PCI_PRODUCT_3COM_3C905BFX, EX_CONF_90XB, 143 "3c905B-FX 10/100 Ethernet" }, 144 145 /* XXX Internal PHY? */ 146 { PCI_PRODUCT_3COM_3C980SRV, EX_CONF_90XB, 147 "3c980 Server Adapter 10/100 Ethernet" }, 148 { PCI_PRODUCT_3COM_3C980CTXM, EX_CONF_90XB|EX_CONF_MII, 149 "3c980C-TXM 10/100 Ethernet" }, 150 151 { PCI_PRODUCT_3COM_3C905CTX, EX_CONF_90XB|EX_CONF_MII, 152 "3c905C-TX 10/100 Ethernet with mngmt" }, 153 154 { PCI_PRODUCT_3COM_3C450TX, EX_CONF_90XB, 155 "3c450-TX 10/100 Ethernet" }, 156 157 { PCI_PRODUCT_3COM_3CSOHO100TX, EX_CONF_90XB, 158 "3cSOHO100-TX 10/100 Ethernet" }, 159 160 { PCI_PRODUCT_3COM_3C555, 161 EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF | 162 EX_CONF_EEPROM_8BIT, 163 "3c555 MiniPCI 10/100 Ethernet" }, 164 165 { PCI_PRODUCT_3COM_3C556, 166 EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF | 167 EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY | 168 EX_CONF_PHY_POWER | EX_CONF_EEPROM_8BIT, 169 "3c556 MiniPCI 10/100 Ethernet" }, 170 171 { PCI_PRODUCT_3COM_3C556B, 172 EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF | 173 EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY | 174 EX_CONF_PHY_POWER, 175 "3c556B MiniPCI 10/100 Ethernet" }, 176 177 { 0, 0, 178 NULL }, 179 }; 180 181 const struct ex_pci_product *ex_pci_lookup 182 __P((const struct pci_attach_args *)); 183 184 const struct ex_pci_product * 185 ex_pci_lookup(pa) 186 const struct pci_attach_args *pa; 187 { 188 const struct ex_pci_product *epp; 189 190 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3COM) 191 return (NULL); 192 193 for (epp = ex_pci_products; epp->epp_name != NULL; epp++) 194 if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid) 195 return (epp); 196 return (NULL); 197 } 198 199 int 200 ex_pci_match(parent, match, aux) 201 struct device *parent; 202 struct cfdata *match; 203 void *aux; 204 { 205 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 206 207 if (ex_pci_lookup(pa) != NULL) 208 return (2); /* beat ep_pci */ 209 210 return (0); 211 } 212 213 void 214 ex_pci_attach(parent, self, aux) 215 struct device *parent, *self; 216 void *aux; 217 { 218 struct ex_softc *sc = (void *)self; 219 struct ex_pci_softc *psc = (void *)self; 220 struct pci_attach_args *pa = aux; 221 pci_chipset_tag_t pc = pa->pa_pc; 222 pci_intr_handle_t ih; 223 const struct ex_pci_product *epp; 224 const char *intrstr = NULL; 225 int rev, pmreg; 226 pcireg_t reg; 227 228 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 229 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 230 printf(": can't map i/o space\n"); 231 return; 232 } 233 234 epp = ex_pci_lookup(pa); 235 if (epp == NULL) { 236 printf("\n"); 237 panic("ex_pci_attach: impossible"); 238 } 239 240 rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG)); 241 printf(": 3Com %s (rev. 0x%x)\n", epp->epp_name, rev); 242 243 sc->sc_dmat = pa->pa_dmat; 244 245 sc->ex_bustype = EX_BUS_PCI; 246 sc->ex_conf = epp->epp_flags; 247 248 /* Enable the card. */ 249 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 250 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 251 PCI_COMMAND_MASTER_ENABLE); 252 253 psc->psc_pc = pc; 254 psc->psc_tag = pa->pa_tag; 255 psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] = 256 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 257 psc->psc_regs[PCI_BHLC_REG>>2] = 258 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG); 259 psc->psc_regs[PCI_CBIO>>2] = 260 pci_conf_read(pc, pa->pa_tag, PCI_CBIO); 261 262 if (sc->ex_conf & EX_CONF_PCI_FUNCREG) { 263 /* Map PCI function status window. */ 264 if (pci_mapreg_map(pa, PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0, 265 &psc->sc_funct, &psc->sc_funch, NULL, NULL)) { 266 printf("%s: unable to map function status window\n", 267 sc->sc_dev.dv_xname); 268 return; 269 } 270 sc->intr_ack = ex_pci_intr_ack; 271 272 psc->psc_regs[PCI_FUNCMEM>>2] = 273 pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM); 274 } 275 276 psc->psc_regs[PCI_INTERRUPT_REG>>2] = 277 pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG); 278 279 /* Get it out of power save mode if needed (BIOS bugs) */ 280 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 281 sc->enable = ex_pci_enable; 282 sc->disable = ex_pci_disable; 283 284 psc->psc_pwrmgmt_csr_reg = pmreg + 4; 285 reg = pci_conf_read(pc, pa->pa_tag, 286 psc->psc_pwrmgmt_csr_reg) & 0x3; 287 288 psc->psc_pwrmgmt_csr = (reg & ~PCI_PMCSR_STATE_MASK) | 289 PCI_PMCSR_STATE_D0; 290 291 if (reg == PCI_PMCSR_STATE_D3) { 292 /* 293 * The card has lost all configuration data in 294 * this state, so punt. 295 */ 296 printf("%s: unable to wake up from power state D3\n", 297 sc->sc_dev.dv_xname); 298 return; 299 } 300 if (reg != PCI_PMCSR_STATE_D0) { 301 printf("%s: waking up from power state D%d\n", 302 sc->sc_dev.dv_xname, reg); 303 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 0); 304 } 305 } 306 307 sc->enabled = 1; 308 309 /* Map and establish the interrupt. */ 310 if (pci_intr_map(pa, &ih)) { 311 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 312 return; 313 } 314 315 intrstr = pci_intr_string(pc, ih); 316 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ex_intr, sc); 317 if (sc->sc_ih == NULL) { 318 printf("%s: couldn't establish interrupt", 319 sc->sc_dev.dv_xname); 320 if (intrstr != NULL) 321 printf(" at %s", intrstr); 322 printf("\n"); 323 return; 324 } 325 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 326 327 ex_config(sc); 328 329 if (sc->ex_conf & EX_CONF_PCI_FUNCREG) 330 bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR, 331 PCI_INTRACK); 332 333 if (sc->disable != NULL) 334 ex_disable(sc); 335 } 336 337 void 338 ex_pci_intr_ack(sc) 339 struct ex_softc *sc; 340 { 341 struct ex_pci_softc *psc = (struct ex_pci_softc *)sc; 342 343 bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR, 344 PCI_INTRACK); 345 } 346 347 void 348 ex_pci_confreg_restore(psc) 349 struct ex_pci_softc *psc; 350 { 351 struct ex_softc *sc = (void *) psc; 352 pcireg_t reg; 353 354 reg = pci_conf_read(psc->psc_pc, psc->psc_tag, PCI_COMMAND_STATUS_REG); 355 356 pci_conf_write(psc->psc_pc, psc->psc_tag, 357 PCI_COMMAND_STATUS_REG, 358 (reg & 0xffff0000) | 359 (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff)); 360 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG, 361 psc->psc_regs[PCI_BHLC_REG>>2]); 362 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_CBIO, 363 psc->psc_regs[PCI_CBIO>>2]); 364 if (sc->ex_conf & EX_CONF_PCI_FUNCREG) 365 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_FUNCMEM, 366 psc->psc_regs[PCI_FUNCMEM>>2]); 367 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_INTERRUPT_REG, 368 psc->psc_regs[PCI_INTERRUPT_REG>>2]); 369 } 370 371 int 372 ex_pci_enable(sc) 373 struct ex_softc *sc; 374 { 375 struct ex_pci_softc *psc = (void *) sc; 376 377 #if 0 378 printf("%s: going to power state D0\n", sc->sc_dev.dv_xname); 379 #endif 380 381 /* Bring the device into D0 power state. */ 382 pci_conf_write(psc->psc_pc, psc->psc_tag, 383 psc->psc_pwrmgmt_csr_reg, psc->psc_pwrmgmt_csr); 384 385 /* Now restore the configuration registers. */ 386 ex_pci_confreg_restore(psc); 387 388 return (0); 389 } 390 391 void 392 ex_pci_disable(sc) 393 struct ex_softc *sc; 394 { 395 struct ex_pci_softc *psc = (void *) sc; 396 397 #if 0 398 printf("%s: going to power state D3\n", sc->sc_dev.dv_xname); 399 #endif 400 401 /* Put the device into D3 state. */ 402 pci_conf_write(psc->psc_pc, psc->psc_tag, 403 psc->psc_pwrmgmt_csr_reg, (psc->psc_pwrmgmt_csr & 404 ~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_STATE_D3); 405 } 406
Indexes created Wed Sep 24 22:09:59 GMT 2025