if_fxp_pci.c revision 1.1.6.1
1 /* $NetBSD: if_fxp_pci.c,v 1.1.6.1 1999/11/15 00:41:00 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Intel i82557 fast Ethernet controller 42 * driver. Works with Intel Etherexpress Pro 10+, 100B, 100+ cards. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 #include "rnd.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #if NRND > 0 61 #include <sys/rnd.h> 62 #endif 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_media.h> 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/if_inarp.h> 76 #endif 77 78 #ifdef NS 79 #include <netns/ns.h> 80 #include <netns/ns_if.h> 81 #endif 82 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 86 #include <dev/mii/miivar.h> 87 88 #include <dev/ic/i82557reg.h> 89 #include <dev/ic/i82557var.h> 90 91 #include <dev/pci/pcivar.h> 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcidevs.h> 94 95 int fxp_pci_match __P((struct device *, struct cfdata *, void *)); 96 void fxp_pci_attach __P((struct device *, struct device *, void *)); 97 98 struct cfattach fxp_pci_ca = { 99 sizeof(struct fxp_softc), fxp_pci_match, fxp_pci_attach 100 }; 101 102 int 103 fxp_pci_match(parent, match, aux) 104 struct device *parent; 105 struct cfdata *match; 106 void *aux; 107 { 108 struct pci_attach_args *pa = aux; 109 110 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 111 return (0); 112 113 switch (PCI_PRODUCT(pa->pa_id)) { 114 case PCI_PRODUCT_INTEL_82557: 115 return (1); 116 } 117 118 return (0); 119 } 120 121 void 122 fxp_pci_attach(parent, self, aux) 123 struct device *parent, *self; 124 void *aux; 125 { 126 struct fxp_softc *sc = (struct fxp_softc *)self; 127 struct pci_attach_args *pa = aux; 128 pci_chipset_tag_t pc = pa->pa_pc; 129 pci_intr_handle_t ih; 130 const char *intrstr = NULL; 131 bus_space_tag_t iot, memt; 132 bus_space_handle_t ioh, memh; 133 int ioh_valid, memh_valid; 134 bus_addr_t addr; 135 bus_size_t size; 136 int flags; 137 138 sc->sc_enabled = 1; 139 sc->sc_enable = NULL; 140 sc->sc_disable = NULL; 141 142 /* 143 * Map control/status registers. 144 */ 145 ioh_valid = (pci_mapreg_map(pa, FXP_PCI_IOBA, 146 PCI_MAPREG_TYPE_IO, 0, 147 &iot, &ioh, NULL, NULL) == 0); 148 149 /* 150 * Version 2.1 of the PCI spec, page 196, "Address Maps": 151 * 152 * Prefetchable 153 * 154 * Set to one if there are no side effects on reads, the 155 * device returns all bytes regardless of the byte enables, 156 * and host bridges can merge processor writes into this 157 * range without causing errors. Bit must be set to zero 158 * otherwise. 159 * 160 * The 82557 incorrectly sets the "prefetchable" bit, resulting 161 * in errors on systems which will do merged reads and writes. 162 * These errors manifest themselves as all-bits-set when reading 163 * from the EEPROM or other < 4 byte registers. 164 * 165 * We must work around this problem by always forcing the mapping 166 * for memory space to be uncacheable. On systems which cannot 167 * create an uncacheable mapping (because the firmware mapped it 168 * into only cacheable/prefetchable space due to the "prefetchable" 169 * bit), we can fall back onto i/o mapped access. 170 */ 171 memh_valid = 0; 172 memt = pa->pa_memt; 173 if (((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) != 0) && 174 pci_mapreg_info(pa->pa_pc, pa->pa_tag, FXP_PCI_MMBA, 175 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 176 &addr, &size, &flags) == 0) { 177 flags &= ~BUS_SPACE_MAP_CACHEABLE; 178 if (bus_space_map(memt, addr, size, flags, &memh) == 0) 179 memh_valid = 1; 180 } 181 182 if (memh_valid) { 183 sc->sc_st = memt; 184 sc->sc_sh = memh; 185 } else if (ioh_valid) { 186 sc->sc_st = iot; 187 sc->sc_sh = ioh; 188 } else { 189 printf(": unable to map device registers\n"); 190 return; 191 } 192 193 sc->sc_dmat = pa->pa_dmat; 194 195 /* 196 * XXX Perhaps report '557, '558, '559 based on revision? 197 */ 198 printf(": Intel i82557 Ethernet, rev %d\n", 199 PCI_REVISION(pa->pa_class)); 200 201 /* Make sure bus-mastering is enabled. */ 202 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 203 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 204 PCI_COMMAND_MASTER_ENABLE); 205 206 /* 207 * Map and establish our interrupt. 208 */ 209 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 210 pa->pa_intrline, &ih)) { 211 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 212 return; 213 } 214 intrstr = pci_intr_string(pc, ih); 215 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 216 if (sc->sc_ih == NULL) { 217 printf("%s: couldn't establish interrupt", 218 sc->sc_dev.dv_xname); 219 if (intrstr != NULL) 220 printf(" at %s", intrstr); 221 printf("\n"); 222 return; 223 } 224 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 225 226 /* Finish off the attach. */ 227 fxp_attach(sc); 228 } 229
Indexes created Thu Oct 02 01:09:59 GMT 2025