if_fxp_pci.c revision 1.4 1 /* $NetBSD: if_fxp_pci.c,v 1.4 2000/01/25 22:31:06 drochner Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Intel i82557 fast Ethernet controller
42 * driver. Works with Intel Etherexpress Pro 10+, 100B, 100+ cards.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48 #include "rnd.h"
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/mbuf.h>
53 #include <sys/malloc.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/ioctl.h>
57 #include <sys/errno.h>
58 #include <sys/device.h>
59
60 #if NRND > 0
61 #include <sys/rnd.h>
62 #endif
63
64 #include <machine/endian.h>
65
66 #include <net/if.h>
67 #include <net/if_dl.h>
68 #include <net/if_media.h>
69 #include <net/if_ether.h>
70
71 #if NBPFILTER > 0
72 #include <net/bpf.h>
73 #endif
74
75 #ifdef INET
76 #include <netinet/in.h>
77 #include <netinet/if_inarp.h>
78 #endif
79
80 #ifdef NS
81 #include <netns/ns.h>
82 #include <netns/ns_if.h>
83 #endif
84
85 #include <machine/bus.h>
86 #include <machine/intr.h>
87
88 #include <dev/mii/miivar.h>
89
90 #include <dev/ic/i82557reg.h>
91 #include <dev/ic/i82557var.h>
92
93 #include <dev/pci/pcivar.h>
94 #include <dev/pci/pcireg.h>
95 #include <dev/pci/pcidevs.h>
96
97 int fxp_pci_match __P((struct device *, struct cfdata *, void *));
98 void fxp_pci_attach __P((struct device *, struct device *, void *));
99
100 struct cfattach fxp_pci_ca = {
101 sizeof(struct fxp_softc), fxp_pci_match, fxp_pci_attach
102 };
103
104 int
105 fxp_pci_match(parent, match, aux)
106 struct device *parent;
107 struct cfdata *match;
108 void *aux;
109 {
110 struct pci_attach_args *pa = aux;
111
112 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
113 return (0);
114
115 switch (PCI_PRODUCT(pa->pa_id)) {
116 case PCI_PRODUCT_INTEL_82557:
117 return (1);
118 }
119
120 return (0);
121 }
122
123 void
124 fxp_pci_attach(parent, self, aux)
125 struct device *parent, *self;
126 void *aux;
127 {
128 struct fxp_softc *sc = (struct fxp_softc *)self;
129 struct pci_attach_args *pa = aux;
130 pci_chipset_tag_t pc = pa->pa_pc;
131 pci_intr_handle_t ih;
132 const char *intrstr = NULL;
133 bus_space_tag_t iot, memt;
134 bus_space_handle_t ioh, memh;
135 int ioh_valid, memh_valid;
136 bus_addr_t addr;
137 bus_size_t size;
138 int flags;
139
140 sc->sc_enabled = 1;
141 sc->sc_enable = NULL;
142 sc->sc_disable = NULL;
143
144 /*
145 * Map control/status registers.
146 */
147 ioh_valid = (pci_mapreg_map(pa, FXP_PCI_IOBA,
148 PCI_MAPREG_TYPE_IO, 0,
149 &iot, &ioh, NULL, NULL) == 0);
150
151 /*
152 * Version 2.1 of the PCI spec, page 196, "Address Maps":
153 *
154 * Prefetchable
155 *
156 * Set to one if there are no side effects on reads, the
157 * device returns all bytes regardless of the byte enables,
158 * and host bridges can merge processor writes into this
159 * range without causing errors. Bit must be set to zero
160 * otherwise.
161 *
162 * The 82557 incorrectly sets the "prefetchable" bit, resulting
163 * in errors on systems which will do merged reads and writes.
164 * These errors manifest themselves as all-bits-set when reading
165 * from the EEPROM or other < 4 byte registers.
166 *
167 * We must work around this problem by always forcing the mapping
168 * for memory space to be uncacheable. On systems which cannot
169 * create an uncacheable mapping (because the firmware mapped it
170 * into only cacheable/prefetchable space due to the "prefetchable"
171 * bit), we can fall back onto i/o mapped access.
172 */
173 memh_valid = 0;
174 memt = pa->pa_memt;
175 if (((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) != 0) &&
176 pci_mapreg_info(pa->pa_pc, pa->pa_tag, FXP_PCI_MMBA,
177 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT,
178 &addr, &size, &flags) == 0) {
179 flags &= ~BUS_SPACE_MAP_PREFETCHABLE;
180 if (bus_space_map(memt, addr, size, flags, &memh) == 0)
181 memh_valid = 1;
182 }
183
184 if (memh_valid) {
185 sc->sc_st = memt;
186 sc->sc_sh = memh;
187 } else if (ioh_valid) {
188 sc->sc_st = iot;
189 sc->sc_sh = ioh;
190 } else {
191 printf(": unable to map device registers\n");
192 return;
193 }
194
195 sc->sc_dmat = pa->pa_dmat;
196
197 /*
198 * XXX Perhaps report '557, '558, '559 based on revision?
199 */
200 printf(": Intel i82557 Ethernet, rev %d\n",
201 PCI_REVISION(pa->pa_class));
202
203 /* Make sure bus-mastering is enabled. */
204 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
205 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
206 PCI_COMMAND_MASTER_ENABLE);
207
208 /*
209 * Map and establish our interrupt.
210 */
211 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
212 pa->pa_intrline, &ih)) {
213 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
214 return;
215 }
216 intrstr = pci_intr_string(pc, ih);
217 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc);
218 if (sc->sc_ih == NULL) {
219 printf("%s: couldn't establish interrupt",
220 sc->sc_dev.dv_xname);
221 if (intrstr != NULL)
222 printf(" at %s", intrstr);
223 printf("\n");
224 return;
225 }
226 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
227
228 /* Finish off the attach. */
229 fxp_attach(sc);
230 }
231