if_gem_pci.c revision 1.49 1 1.49 thorpej /* $NetBSD: if_gem_pci.c,v 1.49 2020/03/01 05:51:46 thorpej Exp $ */
2 1.1 eeh
3 1.1 eeh /*
4 1.17 heas *
5 1.1 eeh * Copyright (C) 2001 Eduardo Horvath.
6 1.1 eeh * All rights reserved.
7 1.1 eeh *
8 1.1 eeh *
9 1.1 eeh * Redistribution and use in source and binary forms, with or without
10 1.1 eeh * modification, are permitted provided that the following conditions
11 1.1 eeh * are met:
12 1.1 eeh * 1. Redistributions of source code must retain the above copyright
13 1.1 eeh * notice, this list of conditions and the following disclaimer.
14 1.1 eeh * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 eeh * notice, this list of conditions and the following disclaimer in the
16 1.1 eeh * documentation and/or other materials provided with the distribution.
17 1.17 heas *
18 1.1 eeh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
19 1.1 eeh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 1.1 eeh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 1.1 eeh * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
22 1.1 eeh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 1.1 eeh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 1.1 eeh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 1.1 eeh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 1.1 eeh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 eeh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 eeh * SUCH DAMAGE.
29 1.1 eeh *
30 1.1 eeh */
31 1.1 eeh
32 1.1 eeh /*
33 1.25 jdc * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers
34 1.1 eeh */
35 1.8 lukem
36 1.8 lukem #include <sys/cdefs.h>
37 1.49 thorpej __KERNEL_RCSID(0, "$NetBSD: if_gem_pci.c,v 1.49 2020/03/01 05:51:46 thorpej Exp $");
38 1.1 eeh
39 1.1 eeh #include <sys/param.h>
40 1.17 heas #include <sys/systm.h>
41 1.1 eeh #include <sys/malloc.h>
42 1.1 eeh #include <sys/kernel.h>
43 1.1 eeh #include <sys/socket.h>
44 1.1 eeh #include <sys/errno.h>
45 1.1 eeh #include <sys/device.h>
46 1.1 eeh
47 1.1 eeh #include <machine/endian.h>
48 1.1 eeh
49 1.1 eeh #include <net/if.h>
50 1.1 eeh #include <net/if_dl.h>
51 1.1 eeh #include <net/if_media.h>
52 1.1 eeh #include <net/if_ether.h>
53 1.1 eeh
54 1.1 eeh #include <net/bpf.h>
55 1.1 eeh
56 1.24 ad #include <sys/bus.h>
57 1.24 ad #include <sys/intr.h>
58 1.1 eeh
59 1.1 eeh #include <dev/mii/mii.h>
60 1.1 eeh #include <dev/mii/miivar.h>
61 1.1 eeh #include <dev/mii/mii_bitbang.h>
62 1.1 eeh
63 1.1 eeh #include <dev/ic/gemreg.h>
64 1.1 eeh #include <dev/ic/gemvar.h>
65 1.1 eeh
66 1.1 eeh #include <dev/pci/pcivar.h>
67 1.1 eeh #include <dev/pci/pcireg.h>
68 1.1 eeh #include <dev/pci/pcidevs.h>
69 1.41 macallan #include <prop/proplib.h>
70 1.25 jdc
71 1.1 eeh struct gem_pci_softc {
72 1.1 eeh struct gem_softc gsc_gem; /* GEM device */
73 1.1 eeh void *gsc_ih;
74 1.36 dyoung pci_chipset_tag_t gsc_pc;
75 1.36 dyoung pci_intr_handle_t gsc_handle;
76 1.1 eeh };
77 1.1 eeh
78 1.36 dyoung static bool gem_pci_estintr(struct gem_pci_softc *);
79 1.42 dyoung static bool gem_pci_suspend(device_t, const pmf_qual_t *);
80 1.42 dyoung static bool gem_pci_resume(device_t, const pmf_qual_t *);
81 1.36 dyoung static int gem_pci_detach(device_t, int);
82 1.36 dyoung
83 1.36 dyoung int gem_pci_match(device_t, cfdata_t, void *);
84 1.36 dyoung void gem_pci_attach(device_t, device_t, void *);
85 1.36 dyoung
86 1.36 dyoung CFATTACH_DECL3_NEW(gem_pci, sizeof(struct gem_pci_softc),
87 1.36 dyoung gem_pci_match, gem_pci_attach, gem_pci_detach, NULL, NULL, NULL,
88 1.36 dyoung DVF_DETACH_SHUTDOWN);
89 1.1 eeh
90 1.1 eeh /*
91 1.1 eeh * Attach routines need to be split out to different bus-specific files.
92 1.1 eeh */
93 1.1 eeh
94 1.1 eeh int
95 1.36 dyoung gem_pci_match(device_t parent, cfdata_t cf, void *aux)
96 1.1 eeh {
97 1.1 eeh struct pci_attach_args *pa = aux;
98 1.1 eeh
99 1.17 heas if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
100 1.9 matt (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_ERINETWORK ||
101 1.9 matt PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_GEMNETWORK))
102 1.1 eeh return (1);
103 1.1 eeh
104 1.17 heas if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
105 1.9 matt (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC ||
106 1.10 matt PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 ||
107 1.21 sanjayl PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3 ||
108 1.25 jdc PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC ||
109 1.23 aymeric PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_K2_GMAC ||
110 1.30 chs PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC ||
111 1.23 aymeric PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_INTREPID2_GMAC))
112 1.1 eeh return (1);
113 1.1 eeh
114 1.1 eeh
115 1.1 eeh return (0);
116 1.1 eeh }
117 1.1 eeh
118 1.25 jdc static inline int
119 1.25 jdc gempromvalid(u_int8_t* buf)
120 1.25 jdc {
121 1.25 jdc return buf[0] == 0x18 && buf[1] == 0x00 && /* structure length */
122 1.25 jdc buf[2] == 0x00 && /* revision */
123 1.25 jdc (buf[3] == 0x00 || /* hme */
124 1.25 jdc buf[3] == 0x80) && /* qfe */
125 1.25 jdc buf[4] == PCI_SUBCLASS_NETWORK_ETHERNET && /* subclass code */
126 1.25 jdc buf[5] == PCI_CLASS_NETWORK; /* class code */
127 1.25 jdc }
128 1.25 jdc
129 1.25 jdc static inline int
130 1.25 jdc isshared_pins(u_int8_t* buf)
131 1.25 jdc {
132 1.25 jdc return buf[0] == 's' && buf[1] == 'h' && buf[2] == 'a' &&
133 1.25 jdc buf[3] == 'r' && buf[4] == 'e' && buf[5] == 'd' &&
134 1.25 jdc buf[6] == '-' && buf[7] == 'p' && buf[8] == 'i' &&
135 1.25 jdc buf[9] == 'n' && buf[10] == 's';
136 1.25 jdc }
137 1.25 jdc
138 1.25 jdc static inline int
139 1.25 jdc isserdes(u_int8_t* buf)
140 1.25 jdc {
141 1.25 jdc return buf[0] == 's' && buf[1] == 'e' && buf[2] == 'r' &&
142 1.25 jdc buf[3] == 'd' && buf[4] == 'e' && buf[5] == 's';
143 1.25 jdc }
144 1.25 jdc
145 1.1 eeh void
146 1.36 dyoung gem_pci_attach(device_t parent, device_t self, void *aux)
147 1.1 eeh {
148 1.1 eeh struct pci_attach_args *pa = aux;
149 1.35 cegger struct gem_pci_softc *gsc = device_private(self);
150 1.1 eeh struct gem_softc *sc = &gsc->gsc_gem;
151 1.41 macallan prop_data_t data;
152 1.7 thorpej uint8_t enaddr[ETHER_ADDR_LEN];
153 1.25 jdc u_int8_t *enp;
154 1.25 jdc bus_space_handle_t romh;
155 1.25 jdc u_int8_t buf[0x0800];
156 1.25 jdc int dataoff, vpdoff, serdes;
157 1.41 macallan int i, got_addr = 0;
158 1.25 jdc #ifdef GEM_DEBUG
159 1.28 martin int j;
160 1.25 jdc #endif
161 1.25 jdc struct pci_vpd *vpd;
162 1.25 jdc static const u_int8_t promhdr[] = { 0x55, 0xaa };
163 1.25 jdc #define PROMHDR_PTR_DATA 0x18
164 1.25 jdc static const u_int8_t promdat[] = {
165 1.25 jdc 0x50, 0x43, 0x49, 0x52, /* "PCIR" */
166 1.25 jdc PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8,
167 1.25 jdc PCI_PRODUCT_SUN_GEMNETWORK & 0xff,
168 1.25 jdc PCI_PRODUCT_SUN_GEMNETWORK >> 8
169 1.25 jdc };
170 1.25 jdc #define PROMDATA_PTR_VPD 0x08
171 1.25 jdc #define PROMDATA_DATA2 0x0a
172 1.2 eeh
173 1.44 drochner pci_aprint_devinfo(pa, "Ethernet controller");
174 1.14 thorpej
175 1.36 dyoung sc->sc_dev = self;
176 1.27 jdc sc->sc_chiprev = PCI_REVISION(pa->pa_class);
177 1.1 eeh
178 1.25 jdc /*
179 1.25 jdc * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
180 1.25 jdc * although it should be 1. correct that.
181 1.25 jdc */
182 1.25 jdc if (pa->pa_intrpin == 0)
183 1.25 jdc pa->pa_intrpin = 1;
184 1.25 jdc
185 1.25 jdc sc->sc_variant = GEM_UNKNOWN;
186 1.25 jdc
187 1.49 thorpej if (pci_dma64_available(pa))
188 1.49 thorpej sc->sc_dmatag = pa->pa_dmat64;
189 1.49 thorpej else
190 1.49 thorpej sc->sc_dmatag = pa->pa_dmat;
191 1.1 eeh
192 1.25 jdc sc->sc_flags |= GEM_PCI;
193 1.25 jdc
194 1.25 jdc if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN) {
195 1.25 jdc if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_GEMNETWORK)
196 1.25 jdc sc->sc_variant = GEM_SUN_GEM;
197 1.25 jdc if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_ERINETWORK)
198 1.25 jdc sc->sc_variant = GEM_SUN_ERI;
199 1.25 jdc } else if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) {
200 1.25 jdc if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC ||
201 1.25 jdc PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 ||
202 1.25 jdc PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3 ||
203 1.26 aymeric PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC ||
204 1.26 aymeric PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_INTREPID2_GMAC)
205 1.25 jdc sc->sc_variant = GEM_APPLE_GMAC;
206 1.25 jdc if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_K2_GMAC)
207 1.25 jdc sc->sc_variant = GEM_APPLE_K2_GMAC;
208 1.25 jdc }
209 1.9 matt
210 1.25 jdc if (sc->sc_variant == GEM_UNKNOWN) {
211 1.36 dyoung aprint_error_dev(sc->sc_dev, "unknown adaptor\n");
212 1.25 jdc return;
213 1.25 jdc }
214 1.1 eeh
215 1.3 thorpej #define PCI_GEM_BASEADDR (PCI_MAPREG_START + 0x00)
216 1.3 thorpej
217 1.3 thorpej /* XXX Need to check for a 64-bit mem BAR? */
218 1.3 thorpej if (pci_mapreg_map(pa, PCI_GEM_BASEADDR,
219 1.3 thorpej PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
220 1.36 dyoung &sc->sc_bustag, &sc->sc_h1, NULL, &sc->sc_size) != 0)
221 1.1 eeh {
222 1.36 dyoung aprint_error_dev(sc->sc_dev, "unable to map device registers\n");
223 1.1 eeh return;
224 1.1 eeh }
225 1.22 martin if (bus_space_subregion(sc->sc_bustag, sc->sc_h1,
226 1.22 martin GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE, &sc->sc_h2)) {
227 1.36 dyoung aprint_error_dev(sc->sc_dev, "unable to create bank 2 subregion\n");
228 1.22 martin return;
229 1.22 martin }
230 1.1 eeh
231 1.41 macallan if ((data = prop_dictionary_get(device_properties(sc->sc_dev),
232 1.41 macallan "mac-address")) != NULL) {
233 1.41 macallan memcpy(enaddr, prop_data_data_nocopy(data), ETHER_ADDR_LEN);
234 1.41 macallan got_addr = 1;
235 1.41 macallan if ((data = prop_dictionary_get(device_properties(sc->sc_dev),
236 1.41 macallan "shared-pins")) != NULL) {
237 1.41 macallan memcpy(buf, prop_data_data_nocopy(data),
238 1.41 macallan prop_data_size(data));
239 1.41 macallan if (isserdes(buf)) {
240 1.25 jdc sc->sc_flags |= GEM_SERDES;
241 1.25 jdc }
242 1.25 jdc }
243 1.41 macallan } else {
244 1.41 macallan /*
245 1.41 macallan * Dig out VPD (vital product data) and acquire Ethernet address.
246 1.41 macallan * The VPD of gem resides in the PCI PROM (PCI FCode).
247 1.41 macallan */
248 1.41 macallan /*
249 1.41 macallan * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
250 1.41 macallan * chapter 2 describes the data structure.
251 1.41 macallan */
252 1.41 macallan
253 1.41 macallan enp = NULL;
254 1.41 macallan
255 1.41 macallan if (sc->sc_variant == GEM_SUN_GEM &&
256 1.41 macallan (bus_space_subregion(sc->sc_bustag, sc->sc_h1,
257 1.41 macallan GEM_PCI_ROM_OFFSET, GEM_PCI_ROM_SIZE, &romh)) == 0) {
258 1.41 macallan
259 1.41 macallan /* read PCI Expansion PROM Header */
260 1.41 macallan bus_space_read_region_1(sc->sc_bustag,
261 1.41 macallan romh, 0, buf, sizeof buf);
262 1.41 macallan
263 1.41 macallan /* Check for "shared-pins = serdes" in FCode. */
264 1.41 macallan i = 0;
265 1.41 macallan serdes = 0;
266 1.41 macallan while (i < (sizeof buf) - sizeof "serdes") {
267 1.41 macallan if (!serdes) {
268 1.41 macallan if (isserdes(&buf[i]))
269 1.41 macallan serdes = 1;
270 1.41 macallan } else {
271 1.41 macallan if (isshared_pins(&buf[i]))
272 1.41 macallan serdes = 2;
273 1.41 macallan }
274 1.41 macallan if (serdes == 2) {
275 1.41 macallan sc->sc_flags |= GEM_SERDES;
276 1.41 macallan break;
277 1.41 macallan }
278 1.41 macallan i++;
279 1.41 macallan }
280 1.25 jdc #ifdef GEM_DEBUG
281 1.41 macallan /* PROM dump */
282 1.45 chs printf("%s: PROM dump (0x0000 to %04zx)\n", device_xname(sc->sc_dev),
283 1.41 macallan (sizeof buf) - 1);
284 1.41 macallan i = 0;
285 1.41 macallan j = 0;
286 1.41 macallan printf(" %04x ", i);
287 1.41 macallan while (i < sizeof buf) {
288 1.41 macallan printf("%02x ", buf[i]);
289 1.41 macallan if (i && !(i % 8))
290 1.41 macallan printf(" ");
291 1.41 macallan if (i && !(i % 16)) {
292 1.41 macallan printf(" ");
293 1.41 macallan while (j < i) {
294 1.41 macallan if (buf[j] > 31 && buf[j] < 128)
295 1.41 macallan printf("%c", buf[j]);
296 1.41 macallan else
297 1.41 macallan printf(".");
298 1.41 macallan j++;
299 1.41 macallan }
300 1.41 macallan j = i;
301 1.41 macallan printf("\n %04x ", i);
302 1.25 jdc }
303 1.41 macallan i++;
304 1.41 macallan }
305 1.41 macallan printf("\n");
306 1.25 jdc #endif
307 1.25 jdc
308 1.41 macallan if (memcmp(buf, promhdr, sizeof promhdr) == 0 &&
309 1.41 macallan (dataoff = (buf[PROMHDR_PTR_DATA] |
310 1.41 macallan (buf[PROMHDR_PTR_DATA + 1] << 8))) >= 0x1c) {
311 1.41 macallan
312 1.41 macallan /* read PCI Expansion PROM Data */
313 1.41 macallan bus_space_read_region_1(sc->sc_bustag, romh, dataoff,
314 1.41 macallan buf, 64);
315 1.41 macallan if (memcmp(buf, promdat, sizeof promdat) == 0 &&
316 1.41 macallan gempromvalid(buf + PROMDATA_DATA2) &&
317 1.41 macallan (vpdoff = (buf[PROMDATA_PTR_VPD] |
318 1.41 macallan (buf[PROMDATA_PTR_VPD + 1] << 8))) >= 0x1c) {
319 1.46 christos
320 1.25 jdc /*
321 1.41 macallan * The VPD of gem is not in PCI 2.2 standard
322 1.41 macallan * format. The length in the resource header
323 1.41 macallan * is in big endian, and resources are not
324 1.41 macallan * properly terminated (only one resource
325 1.41 macallan * and no end tag).
326 1.25 jdc */
327 1.41 macallan /* read PCI VPD */
328 1.41 macallan bus_space_read_region_1(sc->sc_bustag, romh,
329 1.41 macallan vpdoff, buf, 64);
330 1.41 macallan vpd = (void *)(buf + 3);
331 1.41 macallan if (PCI_VPDRES_ISLARGE(buf[0]) &&
332 1.41 macallan PCI_VPDRES_LARGE_NAME(buf[0])
333 1.41 macallan == PCI_VPDRES_TYPE_VPD &&
334 1.41 macallan vpd->vpd_key0 == 0x4e /* N */ &&
335 1.41 macallan vpd->vpd_key1 == 0x41 /* A */ &&
336 1.41 macallan vpd->vpd_len == ETHER_ADDR_LEN) {
337 1.41 macallan /*
338 1.41 macallan * Ethernet address found
339 1.41 macallan */
340 1.41 macallan enp = buf + 6;
341 1.41 macallan }
342 1.25 jdc }
343 1.25 jdc }
344 1.25 jdc }
345 1.25 jdc
346 1.41 macallan if (enp) {
347 1.41 macallan memcpy(enaddr, enp, ETHER_ADDR_LEN);
348 1.41 macallan got_addr = 1;
349 1.4 thorpej }
350 1.4 thorpej }
351 1.41 macallan if (!got_addr) {
352 1.36 dyoung printf("%s: no Ethernet address found\n", device_xname(sc->sc_dev));
353 1.41 macallan /* should we bail here? */
354 1.41 macallan }
355 1.1 eeh
356 1.36 dyoung if (pci_intr_map(pa, &gsc->gsc_handle) != 0) {
357 1.36 dyoung aprint_error_dev(sc->sc_dev, "unable to map interrupt\n");
358 1.6 thorpej return;
359 1.19 perry }
360 1.36 dyoung gsc->gsc_pc = pa->pa_pc;
361 1.36 dyoung gem_pci_estintr(gsc);
362 1.36 dyoung
363 1.36 dyoung /* Finish off the attach. */
364 1.36 dyoung gem_attach(sc, enaddr);
365 1.36 dyoung
366 1.37 tsutsui if (pmf_device_register1(sc->sc_dev,
367 1.37 tsutsui gem_pci_suspend, gem_pci_resume, gem_shutdown))
368 1.37 tsutsui pmf_class_network_register(sc->sc_dev, &sc->sc_ethercom.ec_if);
369 1.37 tsutsui else
370 1.36 dyoung aprint_error_dev(sc->sc_dev,
371 1.36 dyoung "could not establish power handlers\n");
372 1.36 dyoung }
373 1.36 dyoung
374 1.36 dyoung static bool
375 1.42 dyoung gem_pci_suspend(device_t self, const pmf_qual_t *qual)
376 1.36 dyoung {
377 1.36 dyoung struct gem_pci_softc *gsc = device_private(self);
378 1.36 dyoung
379 1.36 dyoung if (gsc->gsc_ih != NULL) {
380 1.36 dyoung pci_intr_disestablish(gsc->gsc_pc, gsc->gsc_ih);
381 1.36 dyoung gsc->gsc_ih = NULL;
382 1.36 dyoung }
383 1.36 dyoung
384 1.36 dyoung return true;
385 1.36 dyoung }
386 1.36 dyoung
387 1.36 dyoung static bool
388 1.36 dyoung gem_pci_estintr(struct gem_pci_softc *gsc)
389 1.36 dyoung {
390 1.36 dyoung struct gem_softc *sc = &gsc->gsc_gem;
391 1.36 dyoung const char *intrstr;
392 1.47 christos char intrbuf[PCI_INTRSTR_LEN];
393 1.36 dyoung
394 1.47 christos intrstr = pci_intr_string(gsc->gsc_pc, gsc->gsc_handle, intrbuf, sizeof(intrbuf));
395 1.48 jdolecek gsc->gsc_ih = pci_intr_establish_xname(gsc->gsc_pc, gsc->gsc_handle,
396 1.48 jdolecek IPL_NET, gem_intr, sc, device_xname(sc->sc_dev));
397 1.6 thorpej if (gsc->gsc_ih == NULL) {
398 1.36 dyoung aprint_error_dev(sc->sc_dev, "unable to establish interrupt");
399 1.1 eeh if (intrstr != NULL)
400 1.38 njoly aprint_error(" at %s", intrstr);
401 1.38 njoly aprint_error("\n");
402 1.36 dyoung return false;
403 1.1 eeh }
404 1.36 dyoung aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
405 1.36 dyoung return true;
406 1.36 dyoung }
407 1.36 dyoung
408 1.36 dyoung static bool
409 1.42 dyoung gem_pci_resume(device_t self, const pmf_qual_t *qual)
410 1.36 dyoung {
411 1.36 dyoung struct gem_pci_softc *gsc = device_private(self);
412 1.36 dyoung
413 1.36 dyoung return gem_pci_estintr(gsc);
414 1.36 dyoung }
415 1.36 dyoung
416 1.36 dyoung static int
417 1.36 dyoung gem_pci_detach(device_t self, int flags)
418 1.36 dyoung {
419 1.36 dyoung int rc;
420 1.36 dyoung struct gem_pci_softc *gsc = device_private(self);
421 1.36 dyoung struct gem_softc *sc = &gsc->gsc_gem;
422 1.6 thorpej
423 1.36 dyoung switch (sc->sc_att_stage) {
424 1.36 dyoung case GEM_ATT_BACKEND_2:
425 1.36 dyoung pmf_device_deregister(self);
426 1.36 dyoung sc->sc_att_stage = GEM_ATT_FINISHED;
427 1.36 dyoung /*FALLTHROUGH*/
428 1.36 dyoung default:
429 1.36 dyoung if ((rc = gem_detach(sc, flags)) != 0)
430 1.36 dyoung return rc;
431 1.36 dyoung /*FALLTHROUGH*/
432 1.36 dyoung case GEM_ATT_BACKEND_1:
433 1.36 dyoung if (gsc->gsc_ih != NULL)
434 1.36 dyoung pci_intr_disestablish(gsc->gsc_pc, gsc->gsc_ih);
435 1.36 dyoung
436 1.36 dyoung bus_space_unmap(sc->sc_bustag, sc->sc_h1, sc->sc_size);
437 1.36 dyoung /*FALLTHROUGH*/
438 1.36 dyoung case GEM_ATT_BACKEND_0:
439 1.36 dyoung sc->sc_att_stage = GEM_ATT_BACKEND_0;
440 1.36 dyoung break;
441 1.36 dyoung }
442 1.36 dyoung return 0;
443 1.1 eeh }
444