if_gem_pci.c revision 1.50
1 /* $NetBSD: if_gem_pci.c,v 1.50 2020/03/02 06:38:06 msaitoh Exp $ */ 2 3 /* 4 * 5 * Copyright (C) 2001 Eduardo Horvath. 6 * All rights reserved. 7 * 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 */ 31 32 /* 33 * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: if_gem_pci.c,v 1.50 2020/03/02 06:38:06 msaitoh Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/malloc.h> 42 #include <sys/kernel.h> 43 #include <sys/socket.h> 44 #include <sys/errno.h> 45 #include <sys/device.h> 46 47 #include <machine/endian.h> 48 49 #include <net/if.h> 50 #include <net/if_dl.h> 51 #include <net/if_media.h> 52 #include <net/if_ether.h> 53 54 #include <net/bpf.h> 55 56 #include <sys/bus.h> 57 #include <sys/intr.h> 58 59 #include <dev/mii/mii.h> 60 #include <dev/mii/miivar.h> 61 #include <dev/mii/mii_bitbang.h> 62 63 #include <dev/ic/gemreg.h> 64 #include <dev/ic/gemvar.h> 65 66 #include <dev/pci/pcivar.h> 67 #include <dev/pci/pcireg.h> 68 #include <dev/pci/pcidevs.h> 69 #include <prop/proplib.h> 70 71 struct gem_pci_softc { 72 struct gem_softc gsc_gem; /* GEM device */ 73 void *gsc_ih; 74 pci_chipset_tag_t gsc_pc; 75 pci_intr_handle_t gsc_handle; 76 }; 77 78 static bool gem_pci_estintr(struct gem_pci_softc *); 79 static bool gem_pci_suspend(device_t, const pmf_qual_t *); 80 static bool gem_pci_resume(device_t, const pmf_qual_t *); 81 static int gem_pci_detach(device_t, int); 82 83 int gem_pci_match(device_t, cfdata_t, void *); 84 void gem_pci_attach(device_t, device_t, void *); 85 86 CFATTACH_DECL3_NEW(gem_pci, sizeof(struct gem_pci_softc), 87 gem_pci_match, gem_pci_attach, gem_pci_detach, NULL, NULL, NULL, 88 DVF_DETACH_SHUTDOWN); 89 90 /* 91 * Attach routines need to be split out to different bus-specific files. 92 */ 93 94 int 95 gem_pci_match(device_t parent, cfdata_t cf, void *aux) 96 { 97 struct pci_attach_args *pa = aux; 98 99 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 100 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_ERINETWORK || 101 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_GEMNETWORK)) 102 return (1); 103 104 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 105 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC || 106 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 || 107 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3 || 108 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC || 109 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_K2_GMAC || 110 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC || 111 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_INTREPID2_GMAC)) 112 return (1); 113 114 115 return (0); 116 } 117 118 static inline int 119 gempromvalid(u_int8_t* buf) 120 { 121 return buf[0] == 0x18 && buf[1] == 0x00 && /* structure length */ 122 buf[2] == 0x00 && /* revision */ 123 (buf[3] == 0x00 || /* hme */ 124 buf[3] == 0x80) && /* qfe */ 125 buf[4] == PCI_SUBCLASS_NETWORK_ETHERNET && /* subclass code */ 126 buf[5] == PCI_CLASS_NETWORK; /* class code */ 127 } 128 129 static inline int 130 isshared_pins(u_int8_t* buf) 131 { 132 return buf[0] == 's' && buf[1] == 'h' && buf[2] == 'a' && 133 buf[3] == 'r' && buf[4] == 'e' && buf[5] == 'd' && 134 buf[6] == '-' && buf[7] == 'p' && buf[8] == 'i' && 135 buf[9] == 'n' && buf[10] == 's'; 136 } 137 138 static inline int 139 isserdes(u_int8_t* buf) 140 { 141 return buf[0] == 's' && buf[1] == 'e' && buf[2] == 'r' && 142 buf[3] == 'd' && buf[4] == 'e' && buf[5] == 's'; 143 } 144 145 void 146 gem_pci_attach(device_t parent, device_t self, void *aux) 147 { 148 struct pci_attach_args *pa = aux; 149 struct gem_pci_softc *gsc = device_private(self); 150 struct gem_softc *sc = &gsc->gsc_gem; 151 prop_data_t data; 152 uint8_t enaddr[ETHER_ADDR_LEN]; 153 u_int8_t *enp; 154 bus_space_handle_t romh; 155 u_int8_t buf[0x0800]; 156 int dataoff, vpdoff, serdes; 157 int i, got_addr = 0; 158 #ifdef GEM_DEBUG 159 int j; 160 #endif 161 struct pci_vpd *vpd; 162 static const u_int8_t promhdr[] = { 0x55, 0xaa }; 163 #define PROMHDR_PTR_DATA 0x18 164 static const u_int8_t promdat[] = { 165 0x50, 0x43, 0x49, 0x52, /* "PCIR" */ 166 PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8, 167 PCI_PRODUCT_SUN_GEMNETWORK & 0xff, 168 PCI_PRODUCT_SUN_GEMNETWORK >> 8 169 }; 170 #define PROMDATA_PTR_VPD 0x08 171 #define PROMDATA_DATA2 0x0a 172 173 pci_aprint_devinfo(pa, "Ethernet controller"); 174 175 sc->sc_dev = self; 176 sc->sc_chiprev = PCI_REVISION(pa->pa_class); 177 178 /* 179 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0, 180 * although it should be 1. correct that. 181 */ 182 if (pa->pa_intrpin == 0) 183 pa->pa_intrpin = 1; 184 185 sc->sc_variant = GEM_UNKNOWN; 186 187 if (pci_dma64_available(pa)) 188 sc->sc_dmatag = pa->pa_dmat64; 189 else 190 sc->sc_dmatag = pa->pa_dmat; 191 192 sc->sc_flags |= GEM_PCI; 193 194 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN) { 195 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_GEMNETWORK) 196 sc->sc_variant = GEM_SUN_GEM; 197 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_ERINETWORK) 198 sc->sc_variant = GEM_SUN_ERI; 199 } else if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) { 200 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC || 201 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 || 202 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3 || 203 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC || 204 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_INTREPID2_GMAC) 205 sc->sc_variant = GEM_APPLE_GMAC; 206 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_K2_GMAC) 207 sc->sc_variant = GEM_APPLE_K2_GMAC; 208 } 209 210 if (sc->sc_variant == GEM_UNKNOWN) { 211 aprint_error_dev(sc->sc_dev, "unknown adaptor\n"); 212 return; 213 } 214 215 #define PCI_GEM_BASEADDR (PCI_MAPREG_START + 0x00) 216 217 /* XXX Need to check for a 64-bit mem BAR? */ 218 if (pci_mapreg_map(pa, PCI_GEM_BASEADDR, 219 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 220 &sc->sc_bustag, &sc->sc_h1, NULL, &sc->sc_size) != 0) 221 { 222 aprint_error_dev(sc->sc_dev, 223 "unable to map device registers\n"); 224 return; 225 } 226 if (bus_space_subregion(sc->sc_bustag, sc->sc_h1, 227 GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE, &sc->sc_h2)) { 228 aprint_error_dev(sc->sc_dev, 229 "unable to create bank 2 subregion\n"); 230 return; 231 } 232 233 if ((data = prop_dictionary_get(device_properties(sc->sc_dev), 234 "mac-address")) != NULL) { 235 memcpy(enaddr, prop_data_data_nocopy(data), ETHER_ADDR_LEN); 236 got_addr = 1; 237 if ((data = prop_dictionary_get(device_properties(sc->sc_dev), 238 "shared-pins")) != NULL) { 239 memcpy(buf, prop_data_data_nocopy(data), 240 prop_data_size(data)); 241 if (isserdes(buf)) { 242 sc->sc_flags |= GEM_SERDES; 243 } 244 } 245 } else { 246 /* 247 * Dig out VPD (vital product data) and acquire Ethernet 248 * address. The VPD of gem resides in the PCI PROM (PCI FCode). 249 */ 250 /* 251 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and 252 * later) chapter 2 describes the data structure. 253 */ 254 255 enp = NULL; 256 257 if (sc->sc_variant == GEM_SUN_GEM && 258 (bus_space_subregion(sc->sc_bustag, sc->sc_h1, 259 GEM_PCI_ROM_OFFSET, GEM_PCI_ROM_SIZE, &romh)) == 0) { 260 261 /* read PCI Expansion PROM Header */ 262 bus_space_read_region_1(sc->sc_bustag, 263 romh, 0, buf, sizeof buf); 264 265 /* Check for "shared-pins = serdes" in FCode. */ 266 i = 0; 267 serdes = 0; 268 while (i < (sizeof buf) - sizeof "serdes") { 269 if (!serdes) { 270 if (isserdes(&buf[i])) 271 serdes = 1; 272 } else { 273 if (isshared_pins(&buf[i])) 274 serdes = 2; 275 } 276 if (serdes == 2) { 277 sc->sc_flags |= GEM_SERDES; 278 break; 279 } 280 i++; 281 } 282 #ifdef GEM_DEBUG 283 /* PROM dump */ 284 printf("%s: PROM dump (0x0000 to %04zx)\n", 285 device_xname(sc->sc_dev), (sizeof buf) - 1); 286 i = 0; 287 j = 0; 288 printf(" %04x ", i); 289 while (i < sizeof buf) { 290 printf("%02x ", buf[i]); 291 if (i && !(i % 8)) 292 printf(" "); 293 if (i && !(i % 16)) { 294 printf(" "); 295 while (j < i) { 296 if (buf[j] > 31 && buf[j] < 128) 297 printf("%c", buf[j]); 298 else 299 printf("."); 300 j++; 301 } 302 j = i; 303 printf("\n %04x ", i); 304 } 305 i++; 306 } 307 printf("\n"); 308 #endif 309 310 if (memcmp(buf, promhdr, sizeof promhdr) == 0 && 311 (dataoff = (buf[PROMHDR_PTR_DATA] | 312 (buf[PROMHDR_PTR_DATA + 1] << 8))) >= 0x1c) { 313 314 /* read PCI Expansion PROM Data */ 315 bus_space_read_region_1(sc->sc_bustag, romh, 316 dataoff, buf, 64); 317 if (memcmp(buf, promdat, sizeof promdat) == 0 && 318 gempromvalid(buf + PROMDATA_DATA2) && 319 (vpdoff = (buf[PROMDATA_PTR_VPD] | 320 (buf[PROMDATA_PTR_VPD + 1] << 8))) >= 0x1c) { 321 322 /* 323 * The VPD of gem is not in PCI 2.2 324 * standard format. The length in the 325 * resource header is in big endian, 326 * and resources are not properly 327 * terminated (only one resource and no 328 * end tag). 329 */ 330 /* read PCI VPD */ 331 bus_space_read_region_1(sc->sc_bustag, 332 romh, vpdoff, buf, 64); 333 vpd = (void *)(buf + 3); 334 if (PCI_VPDRES_ISLARGE(buf[0]) && 335 PCI_VPDRES_LARGE_NAME(buf[0]) 336 == PCI_VPDRES_TYPE_VPD && 337 vpd->vpd_key0 == 0x4e /* N */ && 338 vpd->vpd_key1 == 0x41 /* A */ && 339 vpd->vpd_len == ETHER_ADDR_LEN) { 340 /* 341 * Ethernet address found 342 */ 343 enp = buf + 6; 344 } 345 } 346 } 347 } 348 349 if (enp) { 350 memcpy(enaddr, enp, ETHER_ADDR_LEN); 351 got_addr = 1; 352 } 353 } 354 if (!got_addr) { 355 printf("%s: no Ethernet address found\n", 356 device_xname(sc->sc_dev)); 357 /* should we bail here? */ 358 } 359 360 if (pci_intr_map(pa, &gsc->gsc_handle) != 0) { 361 aprint_error_dev(sc->sc_dev, "unable to map interrupt\n"); 362 return; 363 } 364 gsc->gsc_pc = pa->pa_pc; 365 gem_pci_estintr(gsc); 366 367 /* Finish off the attach. */ 368 gem_attach(sc, enaddr); 369 370 if (pmf_device_register1(sc->sc_dev, 371 gem_pci_suspend, gem_pci_resume, gem_shutdown)) 372 pmf_class_network_register(sc->sc_dev, &sc->sc_ethercom.ec_if); 373 else 374 aprint_error_dev(sc->sc_dev, 375 "could not establish power handlers\n"); 376 } 377 378 static bool 379 gem_pci_suspend(device_t self, const pmf_qual_t *qual) 380 { 381 struct gem_pci_softc *gsc = device_private(self); 382 383 if (gsc->gsc_ih != NULL) { 384 pci_intr_disestablish(gsc->gsc_pc, gsc->gsc_ih); 385 gsc->gsc_ih = NULL; 386 } 387 388 return true; 389 } 390 391 static bool 392 gem_pci_estintr(struct gem_pci_softc *gsc) 393 { 394 struct gem_softc *sc = &gsc->gsc_gem; 395 const char *intrstr; 396 char intrbuf[PCI_INTRSTR_LEN]; 397 398 intrstr = pci_intr_string(gsc->gsc_pc, gsc->gsc_handle, intrbuf, 399 sizeof(intrbuf)); 400 gsc->gsc_ih = pci_intr_establish_xname(gsc->gsc_pc, gsc->gsc_handle, 401 IPL_NET, gem_intr, sc, device_xname(sc->sc_dev)); 402 if (gsc->gsc_ih == NULL) { 403 aprint_error_dev(sc->sc_dev, "unable to establish interrupt"); 404 if (intrstr != NULL) 405 aprint_error(" at %s", intrstr); 406 aprint_error("\n"); 407 return false; 408 } 409 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); 410 return true; 411 } 412 413 static bool 414 gem_pci_resume(device_t self, const pmf_qual_t *qual) 415 { 416 struct gem_pci_softc *gsc = device_private(self); 417 418 return gem_pci_estintr(gsc); 419 } 420 421 static int 422 gem_pci_detach(device_t self, int flags) 423 { 424 int rc; 425 struct gem_pci_softc *gsc = device_private(self); 426 struct gem_softc *sc = &gsc->gsc_gem; 427 428 switch (sc->sc_att_stage) { 429 case GEM_ATT_BACKEND_2: 430 pmf_device_deregister(self); 431 sc->sc_att_stage = GEM_ATT_FINISHED; 432 /*FALLTHROUGH*/ 433 default: 434 if ((rc = gem_detach(sc, flags)) != 0) 435 return rc; 436 /*FALLTHROUGH*/ 437 case GEM_ATT_BACKEND_1: 438 if (gsc->gsc_ih != NULL) 439 pci_intr_disestablish(gsc->gsc_pc, gsc->gsc_ih); 440 441 bus_space_unmap(sc->sc_bustag, sc->sc_h1, sc->sc_size); 442 /*FALLTHROUGH*/ 443 case GEM_ATT_BACKEND_0: 444 sc->sc_att_stage = GEM_ATT_BACKEND_0; 445 break; 446 } 447 return 0; 448 } 449
Indexes created Thu Sep 25 16:09:42 GMT 2025