if_hme_pci.c revision 1.3 1 1.3 sommerfe /* $NetBSD: if_hme_pci.c,v 1.3 2000/12/28 22:59:13 sommerfeld Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.1 mrg * Copyright (c) 2000 Matthew R. Green
5 1.1 mrg * All rights reserved.
6 1.1 mrg *
7 1.1 mrg * Redistribution and use in source and binary forms, with or without
8 1.1 mrg * modification, are permitted provided that the following conditions
9 1.1 mrg * are met:
10 1.1 mrg * 1. Redistributions of source code must retain the above copyright
11 1.1 mrg * notice, this list of conditions and the following disclaimer.
12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 mrg * notice, this list of conditions and the following disclaimer in the
14 1.1 mrg * documentation and/or other materials provided with the distribution.
15 1.1 mrg * 3. The name of the author may not be used to endorse or promote products
16 1.1 mrg * derived from this software without specific prior written permission.
17 1.1 mrg *
18 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 mrg * SUCH DAMAGE.
29 1.1 mrg */
30 1.1 mrg
31 1.1 mrg /*
32 1.1 mrg * PCI front-end device driver for the HME ethernet device.
33 1.1 mrg */
34 1.1 mrg
35 1.1 mrg #include <sys/param.h>
36 1.1 mrg #include <sys/systm.h>
37 1.1 mrg #include <sys/syslog.h>
38 1.1 mrg #include <sys/device.h>
39 1.1 mrg #include <sys/malloc.h>
40 1.1 mrg #include <sys/socket.h>
41 1.1 mrg
42 1.1 mrg #include <net/if.h>
43 1.1 mrg #include <net/if_dl.h>
44 1.1 mrg #include <net/if_ether.h>
45 1.1 mrg #include <net/if_media.h>
46 1.1 mrg
47 1.1 mrg #include <dev/mii/mii.h>
48 1.1 mrg #include <dev/mii/miivar.h>
49 1.1 mrg
50 1.1 mrg #include <machine/autoconf.h>
51 1.1 mrg #include <machine/cpu.h>
52 1.1 mrg
53 1.1 mrg #include <dev/pci/pcivar.h>
54 1.1 mrg #include <dev/pci/pcireg.h>
55 1.1 mrg #include <dev/pci/pcidevs.h>
56 1.1 mrg
57 1.1 mrg #include <dev/ic/hmevar.h>
58 1.1 mrg
59 1.1 mrg struct hme_pci_softc {
60 1.1 mrg struct hme_softc hsc_hme; /* HME device */
61 1.1 mrg bus_space_tag_t hsc_memt;
62 1.1 mrg bus_space_handle_t hsc_memh;
63 1.1 mrg void *hsc_ih;
64 1.1 mrg };
65 1.1 mrg
66 1.1 mrg int hmematch_pci __P((struct device *, struct cfdata *, void *));
67 1.1 mrg void hmeattach_pci __P((struct device *, struct device *, void *));
68 1.1 mrg
69 1.1 mrg struct cfattach hme_pci_ca = {
70 1.1 mrg sizeof(struct hme_pci_softc), hmematch_pci, hmeattach_pci
71 1.1 mrg };
72 1.1 mrg
73 1.1 mrg int
74 1.1 mrg hmematch_pci(parent, cf, aux)
75 1.1 mrg struct device *parent;
76 1.1 mrg struct cfdata *cf;
77 1.1 mrg void *aux;
78 1.1 mrg {
79 1.1 mrg struct pci_attach_args *pa = aux;
80 1.1 mrg
81 1.1 mrg if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
82 1.1 mrg PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_HMENETWORK)
83 1.1 mrg return (1);
84 1.1 mrg
85 1.1 mrg return (0);
86 1.1 mrg }
87 1.1 mrg
88 1.1 mrg void
89 1.1 mrg hmeattach_pci(parent, self, aux)
90 1.1 mrg struct device *parent, *self;
91 1.1 mrg void *aux;
92 1.1 mrg {
93 1.1 mrg struct pci_attach_args *pa = aux;
94 1.1 mrg struct hme_pci_softc *hsc = (void *)self;
95 1.1 mrg struct hme_softc *sc = &hsc->hsc_hme;
96 1.1 mrg pci_intr_handle_t intrhandle;
97 1.1 mrg /* XXX the following declarations should be elsewhere */
98 1.1 mrg extern void myetheraddr __P((u_char *));
99 1.1 mrg pcireg_t csr;
100 1.1 mrg const char *intrstr;
101 1.1 mrg int type;
102 1.1 mrg
103 1.1 mrg /*
104 1.1 mrg * enable io/memory-space accesses. this is kinda of gross; but
105 1.1 mrg # the hme comes up with neither IO space enabled, or memory space.
106 1.1 mrg */
107 1.1 mrg if (pa->pa_memt)
108 1.1 mrg pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
109 1.1 mrg if (pa->pa_iot)
110 1.1 mrg pa->pa_flags |= PCI_FLAGS_IO_ENABLED;
111 1.1 mrg csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
112 1.1 mrg if (pa->pa_memt) {
113 1.1 mrg type = PCI_MAPREG_TYPE_MEM;
114 1.1 mrg csr |= PCI_COMMAND_MEM_ENABLE;
115 1.1 mrg sc->sc_bustag = pa->pa_memt;
116 1.1 mrg } else {
117 1.1 mrg type = PCI_MAPREG_TYPE_IO;
118 1.1 mrg csr |= PCI_COMMAND_IO_ENABLE;
119 1.1 mrg sc->sc_bustag = pa->pa_iot;
120 1.1 mrg }
121 1.1 mrg pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
122 1.1 mrg csr | PCI_COMMAND_MEM_ENABLE);
123 1.1 mrg
124 1.1 mrg sc->sc_dmatag = pa->pa_dmat;
125 1.1 mrg
126 1.2 eeh sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
127 1.1 mrg /*
128 1.1 mrg * Map five register banks:
129 1.1 mrg *
130 1.1 mrg * bank 0: HME SEB registers: +0x0000
131 1.1 mrg * bank 1: HME ETX registers: +0x2000
132 1.1 mrg * bank 2: HME ERX registers: +0x4000
133 1.1 mrg * bank 3: HME MAC registers: +0x6000
134 1.1 mrg * bank 4: HME MIF registers: +0x7000
135 1.1 mrg *
136 1.1 mrg */
137 1.1 mrg
138 1.1 mrg #define PCI_HME_BASEADDR 0x10
139 1.1 mrg if (pci_mapreg_map(pa, PCI_HME_BASEADDR, type, 0,
140 1.1 mrg &hsc->hsc_memt, &hsc->hsc_memh, NULL, NULL) != 0)
141 1.1 mrg {
142 1.1 mrg printf(": could not map hme registers\n");
143 1.1 mrg return;
144 1.1 mrg }
145 1.1 mrg sc->sc_seb = hsc->hsc_memh;
146 1.1 mrg sc->sc_etx = hsc->hsc_memh + 0x2000;
147 1.1 mrg sc->sc_erx = hsc->hsc_memh + 0x4000;
148 1.1 mrg sc->sc_mac = hsc->hsc_memh + 0x6000;
149 1.1 mrg sc->sc_mif = hsc->hsc_memh + 0x7000;
150 1.1 mrg
151 1.1 mrg myetheraddr(sc->sc_enaddr);
152 1.1 mrg
153 1.1 mrg #if 0
154 1.1 mrg /*
155 1.1 mrg * Get transfer burst size from PROM and pass it on
156 1.1 mrg * to the back-end driver.
157 1.1 mrg */
158 1.1 mrg sbusburst = ((struct sbus_softc *)parent)->sc_burst;
159 1.1 mrg if (sbusburst == 0)
160 1.1 mrg sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
161 1.1 mrg
162 1.1 mrg burst = getpropint(node, "burst-sizes", -1);
163 1.1 mrg if (burst == -1)
164 1.1 mrg /* take SBus burst sizes */
165 1.1 mrg burst = sbusburst;
166 1.1 mrg
167 1.1 mrg /* Clamp at parent's burst sizes */
168 1.1 mrg burst &= sbusburst;
169 1.1 mrg
170 1.1 mrg /* Translate into plain numerical format */
171 1.1 mrg sc->sc_burst = (burst & SBUS_BURST_32) ? 32 :
172 1.1 mrg (burst & SBUS_BURST_16) ? 16 : 0;
173 1.1 mrg #endif
174 1.1 mrg
175 1.1 mrg sc->sc_burst = 16; /* XXX */
176 1.1 mrg
177 1.1 mrg /*
178 1.1 mrg * call the main configure
179 1.1 mrg */
180 1.1 mrg hme_config(sc);
181 1.1 mrg
182 1.1 mrg #if 0
183 1.1 mrg printf("%s: ", sc->sc_dev.dv_xname);
184 1.1 mrg pci_conf_print(pa->pa_pc, pa->pa_tag, 0);
185 1.1 mrg #endif
186 1.1 mrg
187 1.3 sommerfe if (pci_intr_map(pa, &intrhandle) != 0) {
188 1.1 mrg printf("%s: couldn't map interrupt\n",
189 1.1 mrg sc->sc_dev.dv_xname);
190 1.1 mrg return; /* bus_unmap ? */
191 1.1 mrg }
192 1.1 mrg intrstr = pci_intr_string(pa->pa_pc, intrhandle);
193 1.1 mrg hsc->hsc_ih = pci_intr_establish(pa->pa_pc,
194 1.1 mrg intrhandle, IPL_NET, hme_intr, sc);
195 1.1 mrg if (hsc->hsc_ih != NULL) {
196 1.1 mrg printf("%s: using %s for interrupt\n",
197 1.1 mrg sc->sc_dev.dv_xname,
198 1.1 mrg intrstr ? intrstr : "unknown interrupt");
199 1.1 mrg } else {
200 1.1 mrg printf("%s: couldn't establish interrupt",
201 1.1 mrg sc->sc_dev.dv_xname);
202 1.1 mrg if (intrstr != NULL)
203 1.1 mrg printf(" at %s", intrstr);
204 1.1 mrg printf("\n");
205 1.1 mrg return; /* bus_unmap ? */
206 1.1 mrg }
207 1.1 mrg }
208